251 lines
6.5 KiB
C
251 lines
6.5 KiB
C
/*
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* Copyright (c) 2008 Travis Geiselbrecht
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <debug.h>
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#include <kernel/thread.h>
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#include <kernel/mutex.h>
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#include <platform/at91sam7.h>
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#include <platform/debug.h>
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#include <dev/ethernet.h>
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#include <malloc.h>
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#include <string.h>
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#include <hw/mii.h>
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void emac_init_send(void);
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#define PHYA 31
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static unsigned mi_rd(AT91EMAC *emac, unsigned addr)
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{
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addr &= 0x1f;
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thread_sleep(20);
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emac->MAN =
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(1 << 30) | /* sof: 01 */
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(2 << 28) | /* rw: 10 = read */
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(PHYA << 23) | /* phya: PHYA */
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(addr << 18) | /* rega: addr */
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(2 << 16); /* code: 10 */
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while(!(emac->NSR & NSR_IDLE)) ;
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thread_sleep(20);
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return emac->MAN & 0xffff;
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}
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static void mi_wr(AT91EMAC *emac, unsigned addr, unsigned val)
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{
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addr &= 0x1f;
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val &= 0xffff;
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emac->MAN =
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(1 << 30) | /* sof: 01 */
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(1 << 28) | /* rw: 01 = read */
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(PHYA << 23) | /* phya: PHYA */
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(addr << 18) | /* rega: addr */
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(2 << 16) | /* code: 10 */
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val; /* data: val */
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while(!(emac->NSR & NSR_IDLE)) ;
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}
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#define PIN_EMAC_ALL 0x3ffff
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#define PIN_PHY_PD (1 << 18)
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#define PIN_PHY_IRQ (1 << 26)
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#define PIN_PHYAD0 (1 << 26)
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#define PIN_PHYAD1 (1 << 14)
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#define PIN_PHYAD2 (1 << 13)
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#define PIN_PHYAD3 (1 << 6)
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#define PIN_PHYAD4 (1 << 5)
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#define PIN_LPBK (1 << 15)
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#define PIN_ISOLATE (1 << 7)
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#define PIN_RMII_MODE (1 << 16)
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#define PIN_RMII_BTB (1 << 4)
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/* select RMII w/ BTB, 100mbps duplex autonegotiate
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** disable ISOLATE and LPBK
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** phya=00001b
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*/
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#define PIN_RESET_LOW (PIN_LPBK)
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int emac_init(void)
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{
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AT91EMAC *emac = AT91EMAC_ADDR;
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AT91PIO *piob = AT91PIOB_ADDR;
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AT91PMC *pmc = AT91PMC_ADDR;
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AT91RSTC *rstc = AT91RSTC_ADDR;
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dprintf(INFO, "emac_init()\n");
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/* enable clock to EMAC */
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pmc->PCER = (1 << PID_EMAC);
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thread_sleep(10);
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/* for reset, all lines are gpio inputs and pullups are
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enabled or disabled per strapping mode defined above */
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piob->pio_enable = PIN_EMAC_ALL | PIN_PHY_PD | PIN_PHY_IRQ;
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piob->select_a = PIN_EMAC_ALL;
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piob->pullup_enable = PIN_EMAC_ALL | PIN_PHY_IRQ;
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piob->pullup_disable = PIN_LPBK | PIN_ISOLATE | PIN_RMII_MODE;
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piob->output_disable = PIN_EMAC_ALL;
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/* PHY PD becomes output and high (no powerdown mode */
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piob->data_set = PIN_PHY_PD;
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piob->output_enable = PIN_PHY_PD;
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thread_sleep(30);
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dprintf(INFO, "emac_init() - reset phy\n");
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/* assert the RST line and wait until the it deasserts */
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rstc->CR = RSTC_KEY | RSTC_EXTRST;
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while(rstc->SR & RSTC_NRSTL) ;
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thread_sleep(30);
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/* after reset all the gpios are assigned to the EMAC,
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except for PHY_PD (which remains output and high) */
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piob->pio_disable = PIN_EMAC_ALL;
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emac->USRIO = USRIO_CLKEN;
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thread_sleep(1000);
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dprintf(INFO, "emac_init() - read state\n");
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emac->NCR = NCR_MPE;
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emac->NCFG = NCFG_CLK_d64;
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dprintf(INFO, "bcr = %x\n", mi_rd(emac, MII_REG_BCR));
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dprintf(INFO, "id1 = %x\n", mi_rd(emac, MII_REG_PHY_ID1));
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dprintf(INFO, "id2 = %x\n", mi_rd(emac, MII_REG_PHY_ID2));
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#if 0
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unsigned state, last;
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last = 0xff;
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for(;;) {
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state = mi_rd(emac, MII_REG_100TX_PHY) & MII_100TX_MODE_MASK;
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if(last != state) {
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last = state;
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char *name;
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switch(state) {
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case MII_100TX_MODE_AUTO:
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name = "auto negotiate";
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break;
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case MII_100TX_MODE_10T_H:
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name = "10-T half duplex";
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break;
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case MII_100TX_MODE_10T_F:
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name = "10-T full duplex";
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break;
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case MII_100TX_MODE_100TX_H:
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name = "100-TX half duplex";
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break;
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case MII_100TX_MODE_100TX_F:
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name = "100-TX full duplex";
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break;
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case MII_100TX_MODE_ISOLATE:
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name = "isolate";
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break;
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default:
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name = "unknown";
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}
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dprintf(INFO, "link state: %s\n", name);
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}
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thread_sleep(100);
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}
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#endif
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emac_init_send();
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return 0;
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}
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#define XMIT_ENTRY_COUNT 32
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static emac_xmit_entry xmit_list[XMIT_ENTRY_COUNT];
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static unsigned xmit_next = 0;
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static mutex_t xmit_lock;
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void emac_init_send(void)
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{
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AT91EMAC *emac = AT91EMAC_ADDR;
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int i;
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for(i = 0; i < XMIT_ENTRY_COUNT; i++) {
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xmit_list[i].info = XMIT_USED;
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xmit_list[i].addr = 0;
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}
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xmit_list[i-1].info |= XMIT_LAST;
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emac->NCFG = NCFG_CLK_d64 | NCFG_SPD | NCFG_FD;
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emac->NCR = NCR_TE | NCR_MPE;
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emac->TBQP = (unsigned) xmit_list;
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mutex_init(&xmit_lock);
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}
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int ethernet_send(void *data, unsigned len)
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{
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AT91EMAC *emac = AT91EMAC_ADDR;
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emac_xmit_entry *xe;
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int waited = 0;
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mutex_acquire(&xmit_lock);
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xe = xmit_list + xmit_next;
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while(!(xe->info & XMIT_USED)) {
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thread_yield();
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waited++;
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}
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if(waited) dprintf(INFO, "W%d\n",waited);
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if(xe->addr != 0) {
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free((void*) xe->addr);
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}
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xe->addr = (unsigned) data;
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if(xmit_next == (XMIT_ENTRY_COUNT - 1)) {
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xe->info = XMIT_LENGTH(len) | XMIT_LAST | XMIT_WRAP;
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xmit_next = 0;
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} else {
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xe->info = XMIT_LENGTH(len) | XMIT_LAST;
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xmit_next++;
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}
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emac->NCR |= NCR_TSTART;
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mutex_release(&xmit_lock);
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return 0;
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}
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