173 lines
4.4 KiB
C
173 lines
4.4 KiB
C
/* $Id: scc.h,v 1.29 1997/04/02 14:56:45 jreuter Exp jreuter $ */
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#ifndef _UAPI_SCC_H
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#define _UAPI_SCC_H
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/* selection of hardware types */
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#define PA0HZP 0x00 /* hardware type for PA0HZP SCC card and compatible */
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#define EAGLE 0x01 /* hardware type for EAGLE card */
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#define PC100 0x02 /* hardware type for PC100 card */
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#define PRIMUS 0x04 /* hardware type for PRIMUS-PC (DG9BL) card */
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#define DRSI 0x08 /* hardware type for DRSI PC*Packet card */
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#define BAYCOM 0x10 /* hardware type for BayCom (U)SCC */
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/* DEV ioctl() commands */
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enum SCC_ioctl_cmds {
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SIOCSCCRESERVED = SIOCDEVPRIVATE,
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SIOCSCCCFG,
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SIOCSCCINI,
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SIOCSCCCHANINI,
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SIOCSCCSMEM,
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SIOCSCCGKISS,
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SIOCSCCSKISS,
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SIOCSCCGSTAT,
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SIOCSCCCAL
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};
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/* Device parameter control (from WAMPES) */
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enum L1_params {
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PARAM_DATA,
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PARAM_TXDELAY,
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PARAM_PERSIST,
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PARAM_SLOTTIME,
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PARAM_TXTAIL,
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PARAM_FULLDUP,
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PARAM_SOFTDCD, /* was: PARAM_HW */
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PARAM_MUTE, /* ??? */
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PARAM_DTR,
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PARAM_RTS,
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PARAM_SPEED,
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PARAM_ENDDELAY, /* ??? */
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PARAM_GROUP,
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PARAM_IDLE,
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PARAM_MIN,
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PARAM_MAXKEY,
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PARAM_WAIT,
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PARAM_MAXDEFER,
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PARAM_TX,
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PARAM_HWEVENT = 31,
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PARAM_RETURN = 255 /* reset kiss mode */
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};
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/* fulldup parameter */
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enum FULLDUP_modes {
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KISS_DUPLEX_HALF, /* normal CSMA operation */
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KISS_DUPLEX_FULL, /* fullduplex, key down trx after transmission */
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KISS_DUPLEX_LINK, /* fullduplex, key down trx after 'idletime' sec */
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KISS_DUPLEX_OPTIMA /* fullduplex, let the protocol layer control the hw */
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};
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/* misc. parameters */
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#define TIMER_OFF 65535U /* to switch off timers */
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#define NO_SUCH_PARAM 65534U /* param not implemented */
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/* HWEVENT parameter */
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enum HWEVENT_opts {
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HWEV_DCD_ON,
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HWEV_DCD_OFF,
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HWEV_ALL_SENT
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};
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/* channel grouping */
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#define RXGROUP 0100 /* if set, only tx when all channels clear */
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#define TXGROUP 0200 /* if set, don't transmit simultaneously */
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/* Tx/Rx clock sources */
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enum CLOCK_sources {
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CLK_DPLL, /* normal halfduplex operation */
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CLK_EXTERNAL, /* external clocking (G3RUH/DF9IC modems) */
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CLK_DIVIDER, /* Rx = DPLL, Tx = divider (fullduplex with */
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/* modems without clock regeneration */
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CLK_BRG /* experimental fullduplex mode with DPLL/BRG for */
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/* MODEMs without clock recovery */
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};
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/* Tx state */
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enum TX_state {
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TXS_IDLE, /* Transmitter off, no data pending */
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TXS_BUSY, /* waiting for permission to send / tailtime */
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TXS_ACTIVE, /* Transmitter on, sending data */
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TXS_NEWFRAME, /* reset CRC and send (next) frame */
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TXS_IDLE2, /* Transmitter on, no data pending */
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TXS_WAIT, /* Waiting for Mintime to expire */
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TXS_TIMEOUT /* We had a transmission timeout */
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};
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typedef unsigned long io_port; /* type definition for an 'io port address' */
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/* SCC statistical information */
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struct scc_stat {
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long rxints; /* Receiver interrupts */
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long txints; /* Transmitter interrupts */
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long exints; /* External/status interrupts */
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long spints; /* Special receiver interrupts */
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long txframes; /* Packets sent */
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long rxframes; /* Number of Frames Actually Received */
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long rxerrs; /* CRC Errors */
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long txerrs; /* KISS errors */
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unsigned int nospace; /* "Out of buffers" */
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unsigned int rx_over; /* Receiver Overruns */
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unsigned int tx_under; /* Transmitter Underruns */
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unsigned int tx_state; /* Transmitter state */
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int tx_queued; /* tx frames enqueued */
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unsigned int maxqueue; /* allocated tx_buffers */
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unsigned int bufsize; /* used buffersize */
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};
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struct scc_modem {
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long speed; /* Line speed, bps */
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char clocksrc; /* 0 = DPLL, 1 = external, 2 = divider */
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char nrz; /* NRZ instead of NRZI */
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};
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struct scc_kiss_cmd {
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int command; /* one of the KISS-Commands defined above */
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unsigned param; /* KISS-Param */
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};
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struct scc_hw_config {
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io_port data_a; /* data port channel A */
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io_port ctrl_a; /* control port channel A */
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io_port data_b; /* data port channel B */
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io_port ctrl_b; /* control port channel B */
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io_port vector_latch; /* INTACK-Latch (#) */
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io_port special; /* special function port */
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int irq; /* irq */
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long clock; /* clock */
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char option; /* command for function port */
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char brand; /* hardware type */
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char escc; /* use ext. features of a 8580/85180/85280 */
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};
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/* (#) only one INTACK latch allowed. */
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struct scc_mem_config {
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unsigned int dummy;
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unsigned int bufsize;
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};
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struct scc_calibrate {
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unsigned int time;
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unsigned char pattern;
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};
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#endif /* _UAPI_SCC_H */
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