719 lines
22 KiB
C
719 lines
22 KiB
C
/* include/linux/usb/msm_hsusb.h
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*
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* Copyright (C) 2008 Google, Inc.
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* Author: Brian Swetland <swetland@google.com>
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* Copyright (c) 2009-2016, The Linux Foundation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ASM_ARCH_MSM_HSUSB_H
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#define __ASM_ARCH_MSM_HSUSB_H
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#include <linux/types.h>
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#include <linux/usb/ch9.h>
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#include <linux/usb/gadget.h>
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#include <linux/usb/otg.h>
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#include <linux/clk.h>
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#include <linux/wakelock.h>
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#include <linux/pm_qos.h>
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#include <linux/hrtimer.h>
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#include <linux/power_supply.h>
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#include <linux/cdev.h>
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/*
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* The following are bit fields describing the usb_request.udc_priv word.
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* These bit fields are set by function drivers that wish to queue
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* usb_requests with sps/bam parameters.
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*/
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#define MSM_PIPE_ID_MASK (0x1F)
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#define MSM_TX_PIPE_ID_OFS (16)
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#define MSM_SPS_MODE BIT(5)
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#define MSM_IS_FINITE_TRANSFER BIT(6)
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#define MSM_PRODUCER BIT(7)
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#define MSM_DISABLE_WB BIT(8)
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#define MSM_ETD_IOC BIT(9)
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#define MSM_INTERNAL_MEM BIT(10)
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#define MSM_VENDOR_ID BIT(16)
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/**
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* Requested USB votes for BUS bandwidth
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*
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* USB_NO_PERF_VOTE BUS Vote for inactive USB session or disconnect
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* USB_MAX_PERF_VOTE Maximum BUS bandwidth vote
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* USB_MIN_PERF_VOTE Minimum BUS bandwidth vote (for some hw same as NO_PERF)
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*
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*/
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enum usb_bus_vote {
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USB_NO_PERF_VOTE = 0,
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USB_MAX_PERF_VOTE,
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USB_MIN_PERF_VOTE,
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};
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/**
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* Requested USB votes for NOC frequency
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*
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* USB_NOC_NOM_VOTE Vote for NOM set of NOC frequencies
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* USB_NOC_SVS_VOTE Vote for SVS set of NOC frequencies
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*
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*/
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enum usb_noc_mode {
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USB_NOC_NOM_VOTE = 0,
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USB_NOC_SVS_VOTE,
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USB_NOC_NUM_VOTE,
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};
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/**
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* Supported USB modes
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*
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* USB_PERIPHERAL Only peripheral mode is supported.
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* USB_HOST Only host mode is supported.
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* USB_OTG OTG mode is supported.
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*
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*/
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enum usb_mode_type {
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USB_NONE = 0,
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USB_PERIPHERAL,
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USB_HOST,
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USB_OTG,
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};
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/**
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* OTG control
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*
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* OTG_NO_CONTROL Id/VBUS notifications not required. Useful in host
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* only configuration.
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* OTG_PHY_CONTROL Id/VBUS notifications comes form USB PHY.
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* OTG_PMIC_CONTROL Id/VBUS notifications comes from PMIC hardware.
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* OTG_USER_CONTROL Id/VBUS notifcations comes from User via sysfs.
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*
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*/
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enum otg_control_type {
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OTG_NO_CONTROL = 0,
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OTG_PHY_CONTROL,
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OTG_PMIC_CONTROL,
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OTG_USER_CONTROL,
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};
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/**
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* PHY used in
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*
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* INVALID_PHY Unsupported PHY
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* CI_PHY Chipidea PHY
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* SNPS_PICO_PHY Synopsis Pico PHY
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* SNPS_FEMTO_PHY Synopsis Femto PHY
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* QUSB_ULPI_PHY
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*
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*/
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enum msm_usb_phy_type {
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INVALID_PHY = 0,
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CI_PHY, /* not supported */
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SNPS_PICO_PHY,
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SNPS_FEMTO_PHY,
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QUSB_ULPI_PHY,
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};
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#define IDEV_CHG_MAX 1000
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#define IUNIT 100
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#define IDEV_HVDCP_CHG_MAX 1800
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/**
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* Different states involved in USB charger detection.
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*
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* USB_CHG_STATE_UNDEFINED USB charger is not connected or detection
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* process is not yet started.
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* USB_CHG_STATE_IN_PROGRESS Charger detection in progress
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* USB_CHG_STATE_WAIT_FOR_DCD Waiting for Data pins contact.
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* USB_CHG_STATE_DCD_DONE Data pin contact is detected.
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* USB_CHG_STATE_PRIMARY_DONE Primary detection is completed (Detects
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* between SDP and DCP/CDP).
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* USB_CHG_STATE_SECONDARY_DONE Secondary detection is completed (Detects
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* between DCP and CDP).
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* USB_CHG_STATE_DETECTED USB charger type is determined.
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*
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*/
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enum usb_chg_state {
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USB_CHG_STATE_UNDEFINED = 0,
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USB_CHG_STATE_IN_PROGRESS,
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USB_CHG_STATE_WAIT_FOR_DCD,
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USB_CHG_STATE_DCD_DONE,
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USB_CHG_STATE_PRIMARY_DONE,
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USB_CHG_STATE_SECONDARY_DONE,
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USB_CHG_STATE_DETECTED,
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};
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/**
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* USB charger types
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*
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* USB_INVALID_CHARGER Invalid USB charger.
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* USB_SDP_CHARGER Standard downstream port. Refers to a downstream port
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* on USB2.0 compliant host/hub.
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* USB_DCP_CHARGER Dedicated charger port (AC charger/ Wall charger).
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* USB_CDP_CHARGER Charging downstream port. Enumeration can happen and
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* IDEV_CHG_MAX can be drawn irrespective of USB state.
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* USB_PROPRIETARY_CHARGER A proprietary charger pull DP and DM to specific
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* voltages between 2.0-3.3v for identification.
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*
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*/
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enum usb_chg_type {
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USB_INVALID_CHARGER = 0,
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USB_SDP_CHARGER,
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USB_DCP_CHARGER,
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USB_CDP_CHARGER,
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USB_PROPRIETARY_CHARGER,
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USB_FLOATED_CHARGER,
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};
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/**
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* Used different VDDCX voltage voting mechnism
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* VDDCX_CORNER Vote for VDDCX Corner voltage
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* VDDCX Vote for VDDCX Absolute voltage
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*/
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enum usb_vdd_type {
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VDDCX_CORNER = 0,
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VDDCX,
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VDD_TYPE_MAX,
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};
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/**
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* Used different VDDCX voltage values
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*/
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enum usb_vdd_value {
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VDD_NONE = 0,
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VDD_MIN,
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VDD_MAX,
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VDD_VAL_MAX,
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};
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/**
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* Maintain state for hvdcp external charger status
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* DEFAULT This is used when DCP is detected
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* ACTIVE This is used when ioctl is called to block LPM
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* INACTIVE This is used when ioctl is called to unblock LPM
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*/
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enum usb_ext_chg_status {
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DEFAULT = 1,
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ACTIVE,
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INACTIVE,
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};
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/**
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* Supported USB controllers
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*/
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enum usb_ctrl {
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DWC3_CTRL = 0, /* DWC3 controller */
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CI_CTRL, /* ChipIdea controller */
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HSIC_CTRL, /* HSIC controller */
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NUM_CTRL,
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};
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/**
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* USB ID state
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*/
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enum usb_id_state {
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USB_ID_GROUND = 0,
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USB_ID_FLOAT,
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};
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/**
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* struct msm_otg_platform_data - platform device data
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* for msm_otg driver.
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* @phy_init_seq: PHY configuration sequence values. Value of -1 is reserved as
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* "do not overwrite default vaule at this address".
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* @phy_init_sz: PHY configuration sequence size.
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* @vbus_power: VBUS power on/off routine.It should return result
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* as success(zero value) or failure(non-zero value).
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* @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
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* @mode: Supported mode (OTG/peripheral/host).
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* @otg_control: OTG switch controlled by user/Id pin
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* @default_mode: Default operational mode. Applicable only if
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* OTG switch is controller by user.
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* @pmic_id_irq: IRQ number assigned for PMIC USB ID line.
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* @mpm_otgsessvld_int: MPM wakeup pin assigned for OTG SESSVLD
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* interrupt. Used when .otg_control == OTG_PHY_CONTROL.
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* @mpm_dpshv_int: MPM wakeup pin assigned for DP SHV interrupt.
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* Used during host bus suspend.
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* @mpm_dmshv_int: MPM wakeup pin assigned for DM SHV interrupt.
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* Used during host bus suspend.
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* @mhl_enable: indicates MHL connector or not.
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* @disable_reset_on_disconnect: perform USB PHY and LINK reset
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* on USB cable disconnection.
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* @pnoc_errata_fix: workaround needed for PNOC hardware bug that
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* affects USB performance.
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* @enable_lpm_on_suspend: Enable the USB core to go into Low
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* Power Mode, when USB bus is suspended but cable
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* is connected.
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* @core_clk_always_on_workaround: Don't disable core_clk when
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* USB enters LPM.
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* @delay_lpm_on_disconnect: Use a delay before entering LPM
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* upon USB cable disconnection.
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* @enable_sec_phy: Use second HSPHY with USB2 core
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* @bus_scale_table: parameters for bus bandwidth requirements
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* @mhl_dev_name: MHL device name used to register with MHL driver.
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* @log2_itc: value of 2^(log2_itc-1) will be used as the
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* interrupt threshold (ITC), when log2_itc is
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* between 1 to 7.
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* @l1_supported: enable link power management support.
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* @dpdm_pulldown_added: Indicates whether pull down resistors are
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* connected on data lines or not.
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* @vddmin_gpio: dedictaed gpio in the platform that is used for
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* pullup the D+ line in case of bus suspend with
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* phy retention.
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* @enable_ahb2ahb_bypass: Indicates whether enable AHB2AHB BYPASS
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* mode with controller in device mode.
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* @bool disable_retention_with_vdd_min: Indicates whether to enable
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allowing VDDmin without putting PHY into retention.
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* @bool enable_phy_id_pullup: Indicates whether phy id pullup is
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enabled or not.
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* @usb_id_gpio: Gpio used for USB ID detection.
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* @hub_reset_gpio: Gpio used for hub reset.
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* @switch_sel_gpio: Gpio used for controlling switch that
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routing D+/D- from the USB HUB to the USB jack type B
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for peripheral mode.
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* @bool phy_dvdd_always_on: PHY DVDD is supplied by always on PMIC LDO.
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* @bool emulation: Indicates whether we are running on emulation platform.
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* @bool enable_streaming: Indicates whether streaming to be enabled by default.
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* @bool enable_axi_prefetch: Indicates whether AXI Prefetch interface is used
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for improving data performance.
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* @bool enable_sdp_typec_current_limit: Indicates whether type-c current for
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sdp charger to be limited.
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*/
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struct msm_otg_platform_data {
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int *phy_init_seq;
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int phy_init_sz;
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int (*vbus_power)(bool on);
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unsigned power_budget;
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enum usb_mode_type mode;
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enum otg_control_type otg_control;
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enum usb_mode_type default_mode;
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enum msm_usb_phy_type phy_type;
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void (*setup_gpio)(enum usb_otg_state state);
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int (*link_clk_reset)(struct clk *link_clk, bool assert);
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int (*phy_clk_reset)(struct clk *phy_clk);
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int pmic_id_irq;
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unsigned int mpm_otgsessvld_int;
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unsigned int mpm_dpshv_int;
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unsigned int mpm_dmshv_int;
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bool mhl_enable;
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bool disable_reset_on_disconnect;
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bool pnoc_errata_fix;
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bool enable_lpm_on_dev_suspend;
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bool core_clk_always_on_workaround;
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bool delay_lpm_on_disconnect;
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bool dp_manual_pullup;
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bool enable_sec_phy;
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struct msm_bus_scale_pdata *bus_scale_table;
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const char *mhl_dev_name;
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int log2_itc;
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bool l1_supported;
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bool dpdm_pulldown_added;
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int vddmin_gpio;
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bool enable_ahb2ahb_bypass;
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bool disable_retention_with_vdd_min;
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bool enable_phy_id_pullup;
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int usb_id_gpio;
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int hub_reset_gpio;
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int switch_sel_gpio;
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bool phy_dvdd_always_on;
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bool emulation;
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bool enable_streaming;
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bool enable_axi_prefetch;
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bool enable_sdp_typec_current_limit;
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};
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/* phy related flags */
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#define ENABLE_DP_MANUAL_PULLUP BIT(0)
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#define ENABLE_SECONDARY_PHY BIT(1)
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#define PHY_HOST_MODE BIT(2)
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#define PHY_CHARGER_CONNECTED BIT(3)
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#define PHY_VBUS_VALID_OVERRIDE BIT(4)
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#define DEVICE_IN_SS_MODE BIT(5)
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#define USB_NUM_BUS_CLOCKS 3
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/**
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* struct msm_otg: OTG driver data. Shared by HCD and DCD.
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* @otg: USB OTG Transceiver structure.
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* @pdata: otg device platform data.
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* @irq: IRQ number assigned for HSUSB controller.
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* @async_irq: IRQ number used by some controllers during low power state
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* @phy_irq: IRQ number assigned for PHY to notify events like id and line
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state changes.
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* @clk: clock struct of usb_hs_clk.
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* @pclk: clock struct of iface_clk.
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* @core_clk: clock struct of core_bus_clk.
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* @sleep_clk: clock struct of sleep_clk for USB PHY.
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* @phy_reset_clk: clock struct of phy_reset_clk for USB PHY. This clock is
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a reset only clock and resets the PHY, ULPI bridge and
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CSR wrapper.
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* @phy_por_clk: clock struct of phy_por_clk for USB PHY. This clock is
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a reset only clock and resets only the PHY (POR).
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* @phy_csr_clk: clock struct of phy_csr_clk for USB PHY. This clock is
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required to access PHY CSR registers via AHB2PHY interface.
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* @bus_clks: bimc/snoc/pcnoc clock struct.
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* @default_noc_mode: default frequency for NOC clocks - SVS or NOM
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* @core_clk_rate: core clk max frequency
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* @regs: ioremapped register base address.
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* @usb_phy_ctrl_reg: relevant PHY_CTRL_REG register base address.
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* @inputs: OTG state machine inputs(Id, SessValid etc).
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* @sm_work: OTG state machine work.
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* @sm_work_pending: OTG state machine work is pending, queued post pm_resume
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* @resume_pending: USB h/w lpm_exit pending. Done on next sm_work run
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* @pm_suspended: OTG device is system(PM) suspended.
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* @pm_notify: Notifier to receive system wide PM transition events.
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It is used to defer wakeup events processing until
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system is RESUMED.
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* @in_lpm: indicates low power mode (LPM) state.
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* @async_int: IRQ line on which ASYNC interrupt arrived in LPM.
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* @cur_power: The amount of mA available from downstream port.
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* @otg_wq: Strict order otg workqueue for OTG works (SM/ID/SUSPEND).
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* @chg_work: Charger detection work.
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* @chg_state: The state of charger detection process.
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* @chg_type: The type of charger attached.
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* @dcd_retires: The retry count used to track Data contact
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* detection process.
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* @wlock: Wake lock struct to prevent system suspend when
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* USB is active.
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* @xo_handle: TCXO buffer handle
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* @bus_perf_client: Bus performance client handle to request BUS bandwidth
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* @mhl_enabled: MHL driver registration successful and MHL enabled.
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* @host_bus_suspend: indicates host bus suspend or not.
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* @device_bus_suspend: indicates device bus suspend or not.
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* @bus_clks_enabled: indicates pcnoc/snoc/bimc clocks are on or not.
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* @chg_check_timer: The timer used to implement the workaround to detect
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* very slow plug in of wall charger.
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* @bc1p2_current_max: Max charging current allowed as per bc1.2 chg detection
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* @typec_current_max: Max charging current allowed as per type-c chg detection
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* @is_ext_chg_dcp: To indicate whether charger detected by external entity
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SMB hardware is DCP charger or not.
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* @ext_id_irq: IRQ for ID interrupt.
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* @phy_irq_pending: Gets set when PHY IRQ arrives in LPM.
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* @id_state: Indicates USBID line status.
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* @rm_pulldown: Indicates pulldown status on D+ and D- data lines.
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* @dbg_idx: Dynamic debug buffer Index.
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* @dbg_lock: Dynamic debug buffer Lock.
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* @buf: Dynamic Debug Buffer.
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* @max_nominal_system_clk_rate: max freq at which system clock can run in
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nominal mode.
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*/
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struct msm_otg {
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struct usb_phy phy;
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struct msm_otg_platform_data *pdata;
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struct platform_device *pdev;
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int irq;
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int async_irq;
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int phy_irq;
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struct clk *clk;
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struct clk *xo_clk;
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struct clk *pclk;
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struct clk *core_clk;
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struct clk *sleep_clk;
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struct clk *phy_reset_clk;
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struct clk *phy_por_clk;
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struct clk *phy_csr_clk;
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struct clk *bus_clks[USB_NUM_BUS_CLOCKS];
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struct clk *phy_ref_clk;
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long core_clk_rate;
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long core_clk_svs_rate;
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long core_clk_nominal_rate;
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enum usb_noc_mode default_noc_mode;
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struct resource *io_res;
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void __iomem *regs;
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void __iomem *phy_csr_regs;
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void __iomem *usb_phy_ctrl_reg;
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#define ID 0
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#define B_SESS_VLD 1
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#define A_BUS_SUSPEND 14
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#define MHL 17
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#define B_FALSE_SDP 18
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unsigned long inputs;
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struct work_struct sm_work;
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bool sm_work_pending;
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bool resume_pending;
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atomic_t pm_suspended;
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struct notifier_block pm_notify;
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atomic_t in_lpm;
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bool err_event_seen;
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int async_int;
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unsigned cur_power;
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int phy_number;
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struct workqueue_struct *otg_wq;
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struct delayed_work chg_work;
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struct delayed_work id_status_work;
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enum usb_chg_state chg_state;
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enum usb_chg_type chg_type;
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u8 dcd_retries;
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struct regulator *v3p3;
|
|
struct regulator *v1p8;
|
|
struct regulator *vddcx;
|
|
struct reset_control *phy_rst;
|
|
struct reset_control *link_rst;
|
|
int vdd_levels[3];
|
|
unsigned dcd_time;
|
|
struct wake_lock wlock;
|
|
unsigned long caps;
|
|
struct msm_xo_voter *xo_handle;
|
|
uint32_t bus_perf_client;
|
|
bool mhl_enabled;
|
|
bool host_bus_suspend;
|
|
bool device_bus_suspend;
|
|
bool bus_clks_enabled;
|
|
struct timer_list chg_check_timer;
|
|
/*
|
|
* Allowing PHY power collpase turns off the HSUSB 3.3v and 1.8v
|
|
* analog regulators while going to low power mode.
|
|
* Currently only 28nm PHY has the support to allowing PHY
|
|
* power collapse since it doesn't have leakage currents while
|
|
* turning off the power rails.
|
|
*/
|
|
#define ALLOW_PHY_POWER_COLLAPSE BIT(0)
|
|
/*
|
|
* Allow PHY RETENTION mode before turning off the digital
|
|
* voltage regulator(VDDCX).
|
|
*/
|
|
#define ALLOW_PHY_RETENTION BIT(1)
|
|
/*
|
|
* Allow putting the core in Low Power mode, when
|
|
* USB bus is suspended but cable is connected.
|
|
*/
|
|
#define ALLOW_LPM_ON_DEV_SUSPEND BIT(2)
|
|
/*
|
|
* Allowing PHY regulators LPM puts the HSUSB 3.3v and 1.8v
|
|
* analog regulators into LPM while going to USB low power mode.
|
|
*/
|
|
#define ALLOW_PHY_REGULATORS_LPM BIT(3)
|
|
/*
|
|
* Allow PHY RETENTION mode before turning off the digital
|
|
* voltage regulator(VDDCX) during host mode.
|
|
*/
|
|
#define ALLOW_HOST_PHY_RETENTION BIT(4)
|
|
/*
|
|
* Allow VDD minimization without putting PHY into retention
|
|
* for fixing PHY current leakage issue when LDOs ar turned off.
|
|
*/
|
|
#define ALLOW_VDD_MIN_WITH_RETENTION_DISABLED BIT(5)
|
|
|
|
/*
|
|
* PHY can keep D+ pull-up during peripheral bus suspend and
|
|
* D+/D- pull-down during host bus suspend without any
|
|
* re-work. This is possible only when PHY DVDD is supplied
|
|
* by a PMIC LDO (unlike VDDCX/VDDMX).
|
|
*/
|
|
#define ALLOW_BUS_SUSPEND_WITHOUT_REWORK BIT(6)
|
|
unsigned long lpm_flags;
|
|
#define PHY_PWR_COLLAPSED BIT(0)
|
|
#define PHY_RETENTIONED BIT(1)
|
|
#define XO_SHUTDOWN BIT(2)
|
|
#define CLOCKS_DOWN BIT(3)
|
|
#define PHY_REGULATORS_LPM BIT(4)
|
|
int reset_counter;
|
|
struct power_supply usb_psy;
|
|
unsigned int online;
|
|
unsigned int host_mode;
|
|
unsigned int voltage_max;
|
|
unsigned int current_max;
|
|
unsigned int bc1p2_current_max;
|
|
unsigned int typec_current_max;
|
|
unsigned int usbin_health;
|
|
|
|
dev_t ext_chg_dev;
|
|
struct cdev ext_chg_cdev;
|
|
struct class *ext_chg_class;
|
|
struct device *ext_chg_device;
|
|
bool ext_chg_opened;
|
|
enum usb_ext_chg_status ext_chg_active;
|
|
struct completion ext_chg_wait;
|
|
struct pinctrl *phy_pinctrl;
|
|
bool is_ext_chg_dcp;
|
|
struct qpnp_vadc_chip *vadc_dev;
|
|
int ext_id_irq;
|
|
bool phy_irq_pending;
|
|
enum usb_id_state id_state;
|
|
bool rm_pulldown;
|
|
/* Maximum debug message length */
|
|
#define DEBUG_MSG_LEN 128UL
|
|
/* Maximum number of messages */
|
|
#define DEBUG_MAX_MSG 256UL
|
|
unsigned int dbg_idx;
|
|
rwlock_t dbg_lock;
|
|
|
|
char (buf[DEBUG_MAX_MSG])[DEBUG_MSG_LEN]; /* buffer */
|
|
unsigned int vbus_state;
|
|
unsigned int usb_irq_count;
|
|
int pm_qos_latency;
|
|
struct pm_qos_request pm_qos_req_dma;
|
|
struct delayed_work perf_vote_work;
|
|
};
|
|
|
|
struct ci13xxx_platform_data {
|
|
u8 usb_core_id;
|
|
int *tlmm_init_seq;
|
|
int tlmm_seq_count;
|
|
/*
|
|
* value of 2^(log2_itc-1) will be used as the interrupt threshold
|
|
* (ITC), when log2_itc is between 1 to 7.
|
|
*/
|
|
int log2_itc;
|
|
void *prv_data;
|
|
bool l1_supported;
|
|
bool enable_ahb2ahb_bypass;
|
|
bool enable_streaming;
|
|
bool enable_axi_prefetch;
|
|
};
|
|
|
|
/**
|
|
* struct msm_hsic_host_platform_data - platform device data
|
|
* for msm_hsic_host driver.
|
|
* @phy_sof_workaround: Enable ALL PHY SOF bug related workarounds for
|
|
SUSPEND, RESET and RESUME.
|
|
* @phy_susp_sof_workaround: Enable PHY SOF workaround for
|
|
* SUSPEND.
|
|
* @phy_reset_sof_workaround: Enable PHY SOF workaround for
|
|
* RESET.
|
|
* @dis_internal_clk_gating: If set, internal clock gating in controller
|
|
* is disabled.
|
|
*
|
|
*/
|
|
struct msm_hsic_host_platform_data {
|
|
unsigned strobe;
|
|
unsigned data;
|
|
bool ignore_cal_pad_config;
|
|
bool phy_sof_workaround;
|
|
bool dis_internal_clk_gating;
|
|
bool phy_susp_sof_workaround;
|
|
bool phy_reset_sof_workaround;
|
|
u32 reset_delay;
|
|
int strobe_pad_offset;
|
|
int data_pad_offset;
|
|
|
|
struct msm_bus_scale_pdata *bus_scale_table;
|
|
unsigned log2_irq_thresh;
|
|
|
|
/* gpio used to resume peripheral */
|
|
unsigned resume_gpio;
|
|
int *tlmm_init_seq;
|
|
int tlmm_seq_count;
|
|
|
|
/*swfi latency is required while driving resume on to the bus */
|
|
u32 swfi_latency;
|
|
|
|
/*standalone latency is required when HSCI is active*/
|
|
u32 standalone_latency;
|
|
bool pool_64_bit_align;
|
|
bool enable_hbm;
|
|
bool disable_park_mode;
|
|
bool consider_ipa_handshake;
|
|
bool ahb_async_bridge_bypass;
|
|
bool disable_cerr;
|
|
};
|
|
|
|
struct msm_usb_host_platform_data {
|
|
unsigned int power_budget;
|
|
int pmic_gpio_dp_irq;
|
|
unsigned int dock_connect_irq;
|
|
bool use_sec_phy;
|
|
bool no_selective_suspend;
|
|
int resume_gpio;
|
|
int ext_hub_reset_gpio;
|
|
bool is_uicc;
|
|
int pm_qos_latency;
|
|
};
|
|
|
|
#ifdef CONFIG_USB_BAM
|
|
void msm_bam_set_usb_host_dev(struct device *dev);
|
|
void msm_bam_set_hsic_host_dev(struct device *dev);
|
|
void msm_bam_wait_for_usb_host_prod_granted(void);
|
|
void msm_bam_wait_for_hsic_host_prod_granted(void);
|
|
bool msm_bam_hsic_lpm_ok(void);
|
|
void msm_bam_usb_host_notify_on_resume(void);
|
|
void msm_bam_hsic_host_notify_on_resume(void);
|
|
bool msm_bam_hsic_host_pipe_empty(void);
|
|
bool msm_usb_bam_enable(enum usb_ctrl ctrl, bool bam_enable);
|
|
#else
|
|
static inline void msm_bam_set_usb_host_dev(struct device *dev) {}
|
|
static inline void msm_bam_set_hsic_host_dev(struct device *dev) {}
|
|
static inline void msm_bam_wait_for_usb_host_prod_granted(void) {}
|
|
static inline void msm_bam_wait_for_hsic_host_prod_granted(void) {}
|
|
static inline bool msm_bam_hsic_lpm_ok(void) { return true; }
|
|
static inline void msm_bam_hsic_host_notify_on_resume(void) {}
|
|
static inline void msm_bam_usb_host_notify_on_resume(void) {}
|
|
static inline bool msm_bam_hsic_host_pipe_empty(void) { return true; }
|
|
static inline bool msm_usb_bam_enable(enum usb_ctrl ctrl, bool bam_enable)
|
|
{
|
|
return true;
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_USB_CI13XXX_MSM
|
|
void msm_hw_bam_disable(bool bam_disable);
|
|
void msm_usb_irq_disable(bool disable);
|
|
#else
|
|
static inline void msm_hw_bam_disable(bool bam_disable)
|
|
{
|
|
}
|
|
static inline void msm_usb_irq_disable(bool disable)
|
|
{
|
|
}
|
|
#endif
|
|
|
|
/* CONFIG_PM_RUNTIME */
|
|
#ifdef CONFIG_PM_RUNTIME
|
|
static inline int get_pm_runtime_counter(struct device *dev)
|
|
{
|
|
return atomic_read(&dev->power.usage_count);
|
|
}
|
|
#else /* !CONFIG_PM_RUNTIME */
|
|
static inline int get_pm_runtime_counter(struct device *dev) { return -ENOSYS; }
|
|
#endif
|
|
|
|
#ifdef CONFIG_USB_DWC3_MSM
|
|
int msm_ep_config(struct usb_ep *ep);
|
|
int msm_ep_unconfig(struct usb_ep *ep);
|
|
void dwc3_tx_fifo_resize_request(struct usb_ep *ep, bool qdss_enable);
|
|
int msm_data_fifo_config(struct usb_ep *ep, phys_addr_t addr, u32 size,
|
|
u8 dst_pipe_idx);
|
|
bool msm_dwc3_reset_ep_after_lpm(struct usb_gadget *gadget);
|
|
int msm_dwc3_reset_dbm_ep(struct usb_ep *ep);
|
|
|
|
#else
|
|
static inline int msm_data_fifo_config(struct usb_ep *ep, phys_addr_t addr,
|
|
u32 size, u8 dst_pipe_idx)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int msm_ep_config(struct usb_ep *ep)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int msm_ep_unconfig(struct usb_ep *ep)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void dwc3_tx_fifo_resize_request(
|
|
struct usb_ep *ep, bool qdss_enable)
|
|
{
|
|
}
|
|
|
|
static inline bool msm_dwc3_reset_ep_after_lpm(struct usb_gadget *gadget)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline int msm_dwc3_reset_dbm_ep(struct usb_ep *ep)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
#endif
|
|
#endif
|