260 lines
7.8 KiB
C
260 lines
7.8 KiB
C
/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _H_MHI_MACROS
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#define _H_MHI_MACROS
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#define MHI_IPC_LOG_PAGES (100)
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#define MAX_BOUNCE_BUF_SIZE 0x2000
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#define MHI_LOG_SIZE 0x1000
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#define MHI_LINK_STABILITY_WAIT_MS 100
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#define MHI_DEVICE_WAKE_DBOUNCE_TIMEOUT_MS 10
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#define MHI_MAX_LINK_RETRIES 9
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#define DT_WAIT_RETRIES 30
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#define MHI_MAX_SUSPEND_RETRIES 1000
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#define MHI_VERSION 0x01000000
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#define ALIGNMENT_OFFSET 0xFFF
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#define NR_OF_CMD_RINGS 1
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#define EV_EL_PER_RING (256 + 16)
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#define CMD_EL_PER_RING 128
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#define ELEMENT_GAP 1
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#define MHI_EPID 4
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#define MHI_MAX_RESUME_TIMEOUT 5000
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#define MHI_MAX_SUSPEND_TIMEOUT 5000
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#define MHI_MAX_CMD_TIMEOUT 500
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#define MHI_RPM_AUTOSUSPEND_TMR_VAL_MS 1000
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#define MAX_BUF_SIZE 32
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#define PRIMARY_CMD_RING 0
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#define MHI_WORK_Q_MAX_SIZE 128
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#define MAX_XFER_WORK_ITEMS 100
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#define MHI_MAX_SUPPORTED_DEVICES 1
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#define MAX_NR_TRBS_PER_SOFT_CHAN 10
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#define MAX_NR_TRBS_PER_HARD_CHAN (128 + 16)
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#define MHI_PCIE_VENDOR_ID 0x17CB
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#define MHI_PCIE_DEVICE_ID_9x35 0x0300
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#define MHI_PCIE_DEVICE_ID_ZIRC 0x0301
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#define TRB_MAX_DATA_SIZE 0x1000
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#define MHI_DATA_SEG_WINDOW_START_ADDR 0x0ULL
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#define MHI_DATA_SEG_WINDOW_END_ADDR 0x3E800000ULL
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#define MHI_M2_DEBOUNCE_TMR_MS 10
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#define MHI_XFER_DB_INTERVAL 8
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#define MHI_EV_DB_INTERVAL 1
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#define MHI_DEV_WAKE_DB 127
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#define MHI_HANDLE_MAGIC 0x12344321
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/* PCIe Device Info */
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#define MHI_PCIE_DEVICE_BAR0_OFFSET_LOW (16)
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#define MHI_PCIE_DEVICE_BAR0_OFFSET_HIGH (20)
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#define MHI_PCIE_DEVICE_MANUFACT_ID_OFFSET (0)
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#define MHI_PCIE_DEVICE_ID_OFFSET (2)
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#define IS_HARDWARE_CHANNEL(_CHAN_NR) \
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(((enum MHI_CLIENT_CHANNEL)(_CHAN_NR) > \
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MHI_CLIENT_RESERVED_1_UPPER) && \
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((enum MHI_CLIENT_CHANNEL)(_CHAN_NR) < MHI_CLIENT_RESERVED_2_LOWER))
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#define IS_SOFTWARE_CHANNEL(_CHAN_NR) \
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(((enum MHI_CLIENT_CHANNEL)(_CHAN_NR) >= 0) && \
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((enum MHI_CLIENT_CHANNEL)(_CHAN_NR) < MHI_CLIENT_RESERVED_1_LOWER))
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#define IRQ_TO_MSI(_MHI_DEV_CTXT, _IRQ_NR) \
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((_IRQ_NR) - (_MHI_DEV_CTXT)->dev_info->core.irq_base)
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#define MSI_TO_IRQ(_MHI_DEV_CTXT, _MSI_NR) \
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((_MHI_DEV_CTXT)->dev_info->core.irq_base + (_MSI_NR))
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#define VALID_CHAN_NR(_CHAN_NR) (IS_HARDWARE_CHANNEL(_CHAN_NR) || \
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IS_SOFTWARE_CHANNEL(_CHAN_NR))
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#define VALID_BUF(_BUF_ADDR, _BUF_LEN, _MHI_DEV_CTXT) \
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(((uintptr_t)(_BUF_ADDR) >= \
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mhi_dev_ctxt->dev_space.start_win_addr) && \
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(((uintptr_t)(_BUF_ADDR) + (uintptr_t)(_BUF_LEN) < \
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mhi_dev_ctxt->dev_space.end_win_addr)))
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#define MHI_HW_INTMOD_VAL_MS 2
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/* Timeout Values */
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#define MHI_READY_STATUS_TIMEOUT_MS 50
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#define MHI_THREAD_SLEEP_TIMEOUT_MS 20
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#define MHI_RESUME_WAKE_RETRIES 20
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/* Debugging Capabilities*/
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#define MHI_DBG_MAX_EVENT_HISTORY 10
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/* MHI Transfer Ring Elements 7.4.1*/
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#define TX_TRB_LEN
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#define MHI_TX_TRB_LEN__SHIFT (0)
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#define MHI_TX_TRB_LEN__MASK (0xFFFF)
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#define MHI_TX_TRB_SET_LEN(_FIELD, _PKT, _VAL) \
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{ \
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u32 new_val = ((_PKT)->data_tx_pkt).buf_len; \
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new_val &= (~((MHI_##_FIELD ## __MASK) << MHI_##_FIELD ## __SHIFT)); \
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new_val |= (_VAL) << MHI_##_FIELD ## __SHIFT; \
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new_val &= (((MHI_##_FIELD ## __MASK) << MHI_##_FIELD ## __SHIFT)); \
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((_PKT)->data_tx_pkt).buf_len = new_val; \
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}
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#define MHI_TX_TRB_GET_LEN(_FIELD, _PKT) \
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(((_PKT)->data_tx_pkt).buf_len & (((MHI_##_FIELD ## __MASK) << \
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MHI_##_FIELD ## __SHIFT))) \
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/* MHI Event Ring Elements 7.4.1*/
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#define EV_TRB_CODE
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#define MHI_EV_TRB_CODE__MASK (0xFF)
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#define MHI_EV_TRB_CODE__SHIFT (24)
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#define MHI_EV_READ_CODE(_FIELD, _PKT) (((_PKT->type).xfer_details >> \
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MHI_##_FIELD ## __SHIFT) & \
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MHI_ ##_FIELD ## __MASK)
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#define EV_LEN
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#define MHI_EV_LEN__MASK (0xFFFF)
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#define MHI_EV_LEN__SHIFT (0)
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#define MHI_EV_READ_LEN(_FIELD, _PKT) (((_PKT->xfer_event_pkt).xfer_details >> \
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MHI_##_FIELD ## __SHIFT) & \
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MHI_ ##_FIELD ## __MASK)
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#define EV_CHID
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#define MHI_EV_CHID__MASK (0xFF)
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#define MHI_EV_CHID__SHIFT (24)
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#define MHI_EV_READ_CHID(_FIELD, _PKT) ((((_PKT)->xfer_event_pkt).info >> \
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MHI_##_FIELD ## __SHIFT) & \
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MHI_ ##_FIELD ## __MASK)
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#define EV_PTR
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#define MHI_EV_PTR__MASK (0xFFFFFFFFFFFFFFFFULL)
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#define MHI_EV_PTR__SHIFT (0)
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#define MHI_EV_READ_PTR(_FIELD, _PKT) ((((_PKT)->xfer_event_pkt).xfer_ptr >> \
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MHI_##_FIELD ## __SHIFT) & \
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MHI_ ##_FIELD ## __MASK)
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#define EV_STATE
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#define MHI_EV_STATE__MASK (0xFF)
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#define MHI_EV_STATE__SHIFT (24)
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#define MHI_READ_STATE(_PKT) ((((_PKT)->state_change_event_pkt).state >> \
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MHI_EV_STATE__SHIFT) & \
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MHI_EV_STATE__MASK)
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#define EXEC_ENV
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#define MHI_EXEC_ENV__MASK (0xFF)
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#define MHI_EXEC_ENV__SHIFT (24)
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#define MHI_READ_EXEC_ENV(_PKT) ((((_PKT)->ee_event_pkt).exec_env>> \
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MHI_EXEC_ENV__SHIFT) & \
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MHI_EXEC_ENV__MASK)
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/* MacroS for reading common "info" field for TRBs*/
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#define TX_TRB_CHAIN
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#define MHI_TX_TRB_CHAIN__SHIFT (0)
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#define MHI_TX_TRB_CHAIN__MASK (0x1)
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#define TX_TRB_IEOB
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#define MHI_TX_TRB_IEOB__MASK (0x1)
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#define MHI_TX_TRB_IEOB__SHIFT (8)
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#define TX_TRB_IEOT
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#define MHI_TX_TRB_IEOT__MASK (0x1)
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#define MHI_TX_TRB_IEOT__SHIFT (9)
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#define TX_TRB_BEI
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#define MHI_TX_TRB_BEI__MASK (0x1)
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#define MHI_TX_TRB_BEI__SHIFT (10)
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#define TX_TRB_TYPE
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#define MHI_TX_TRB_TYPE__MASK (0xFF)
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#define MHI_TX_TRB_TYPE__SHIFT (16)
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#define EV_TRB_TYPE
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#define MHI_EV_TRB_TYPE__MASK (0xFF)
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#define MHI_EV_TRB_TYPE__SHIFT (16)
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#define CMD_TRB_TYPE
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#define MHI_CMD_TRB_TYPE__MASK (0xFF)
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#define MHI_CMD_TRB_TYPE__SHIFT (16)
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#define CMD_TRB_CHID
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#define MHI_CMD_TRB_CHID__MASK (0xFF)
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#define MHI_CMD_TRB_CHID__SHIFT (24)
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#define MHI_TRB_SET_INFO(_FIELD, _PKT, _VAL) \
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do { \
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u32 new_val = ((_PKT)->type).info; \
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new_val &= (~((MHI_##_FIELD ## __MASK) << \
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MHI_##_FIELD ## __SHIFT)); \
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new_val |= _VAL << MHI_##_FIELD ## __SHIFT; \
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(_PKT->type).info = new_val; \
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} while (0)
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#define MHI_TRB_GET_INFO(_FIELD, _PKT, _DEST) \
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do { \
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_DEST = ((_PKT)->type).info; \
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_DEST &= (((MHI_##_FIELD ## __MASK) << \
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MHI_##_FIELD ## __SHIFT)); \
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_DEST >>= MHI_##_FIELD ## __SHIFT; \
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} while (0)
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#define MHI_TRB_READ_INFO(_FIELD, _PKT) \
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((((_PKT)->type).info >> MHI_##_FIELD ## __SHIFT) & \
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MHI_##_FIELD ## __MASK)
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#define HIGH_WORD(_x) ((u32)((((u64)(_x)) >> 32) & 0xFFFFFFFF))
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#define LOW_WORD(_x) ((u32)(((u64)(_x)) & 0xFFFFFFFF))
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#define EVENT_CTXT_INTMODT
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#define MHI_EVENT_CTXT_INTMODT__MASK (0xFFFF)
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#define MHI_EVENT_CTXT_INTMODT__SHIFT (16)
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#define MHI_SET_EV_CTXT(_FIELD, _CTXT, _VAL) \
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{ \
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u32 new_val = (_VAL << MHI_##_FIELD ## __SHIFT); \
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new_val &= (MHI_##_FIELD ## __MASK << MHI_##_FIELD ## __SHIFT); \
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(_CTXT)->mhi_intmodt &= (~((MHI_##_FIELD ## __MASK) << \
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MHI_##_FIELD ## __SHIFT)); \
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(_CTXT)->mhi_intmodt |= new_val; \
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}
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#define MHI_GET_EV_CTXT(_FIELD, _CTXT) \
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(((_CTXT)->mhi_intmodt >> MHI_##_FIELD ## __SHIFT) & \
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MHI_##_FIELD ## __MASK)
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#define MHI_READ_FIELD(_val, _mask, _shift) \
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do { \
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_val &= (u32)(_mask); \
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_val >>= (u32)(_shift); \
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} while (0)
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#define CHAN_BRINGUP_STAGE
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#define MHI_CHAN_BRINGUP_STAGE__MASK (3)
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#define MHI_CHAN_BRINGUP_STAGE__SHIFT (0)
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#define CHAN_DIR
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#define MHI_CHAN_DIR__MASK (3)
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#define MHI_CHAN_DIR__SHIFT (4)
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#define CHAN_TYPE
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#define MHI_CHAN_TYPE__MASK (3)
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#define MHI_CHAN_TYPE__SHIFT (6)
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#define GET_CHAN_PROPS(_FIELD, _VAL) \
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(((_VAL) >> MHI_##_FIELD ## __SHIFT) & MHI_##_FIELD ## __MASK)
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#define EV_TYPE
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#define MHI_EV_TYPE__MASK (3)
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#define MHI_EV_TYPE__SHIFT (3)
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#define EV_MANAGED
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#define MHI_EV_MANAGED__MASK (3)
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#define MHI_EV_MANAGED__SHIFT (0)
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#define GET_EV_PROPS(_FIELD, _VAL) \
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(((_VAL) >> MHI_##_FIELD ## __SHIFT) & MHI_##_FIELD ## __MASK)
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#endif
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