242 lines
6.2 KiB
C
242 lines
6.2 KiB
C
/*
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* FDT Address translation based on u-boot fdt_support.c which in turn was
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* based on the kernel unflattened DT address translation code.
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*
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* (C) Copyright 2007
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
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*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/libfdt.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/sizes.h>
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/* Max address size we deal with */
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#define OF_MAX_ADDR_CELLS 4
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#define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
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(ns) > 0)
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/* Debug utility */
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#ifdef DEBUG
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static void __init of_dump_addr(const char *s, const __be32 *addr, int na)
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{
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pr_debug("%s", s);
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while(na--)
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pr_cont(" %08x", *(addr++));
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pr_debug("\n");
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}
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#else
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static void __init of_dump_addr(const char *s, const __be32 *addr, int na) { }
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#endif
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/* Callbacks for bus specific translators */
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struct of_bus {
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void (*count_cells)(const void *blob, int parentoffset,
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int *addrc, int *sizec);
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u64 (*map)(__be32 *addr, const __be32 *range,
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int na, int ns, int pna);
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int (*translate)(__be32 *addr, u64 offset, int na);
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};
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/* Default translator (generic bus) */
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static void __init fdt_bus_default_count_cells(const void *blob, int parentoffset,
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int *addrc, int *sizec)
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{
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const __be32 *prop;
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if (addrc) {
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prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL);
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if (prop)
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*addrc = be32_to_cpup(prop);
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else
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*addrc = dt_root_addr_cells;
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}
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if (sizec) {
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prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL);
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if (prop)
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*sizec = be32_to_cpup(prop);
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else
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*sizec = dt_root_size_cells;
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}
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}
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static u64 __init fdt_bus_default_map(__be32 *addr, const __be32 *range,
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int na, int ns, int pna)
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{
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u64 cp, s, da;
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cp = of_read_number(range, na);
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s = of_read_number(range + na + pna, ns);
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da = of_read_number(addr, na);
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pr_debug("FDT: default map, cp=%llx, s=%llx, da=%llx\n",
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cp, s, da);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int __init fdt_bus_default_translate(__be32 *addr, u64 offset, int na)
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{
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u64 a = of_read_number(addr, na);
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memset(addr, 0, na * 4);
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a += offset;
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if (na > 1)
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addr[na - 2] = cpu_to_fdt32(a >> 32);
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addr[na - 1] = cpu_to_fdt32(a & 0xffffffffu);
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return 0;
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}
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/* Array of bus specific translators */
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static const struct of_bus of_busses[] __initconst = {
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/* Default */
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{
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.count_cells = fdt_bus_default_count_cells,
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.map = fdt_bus_default_map,
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.translate = fdt_bus_default_translate,
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},
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};
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static int __init fdt_translate_one(const void *blob, int parent,
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const struct of_bus *bus,
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const struct of_bus *pbus, __be32 *addr,
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int na, int ns, int pna, const char *rprop)
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{
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const __be32 *ranges;
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int rlen;
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int rone;
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u64 offset = OF_BAD_ADDR;
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ranges = fdt_getprop(blob, parent, rprop, &rlen);
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if (!ranges)
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return 1;
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if (rlen == 0) {
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offset = of_read_number(addr, na);
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memset(addr, 0, pna * 4);
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pr_debug("FDT: empty ranges, 1:1 translation\n");
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goto finish;
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}
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pr_debug("FDT: walking ranges...\n");
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/* Now walk through the ranges */
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rlen /= 4;
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rone = na + pna + ns;
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for (; rlen >= rone; rlen -= rone, ranges += rone) {
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offset = bus->map(addr, ranges, na, ns, pna);
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if (offset != OF_BAD_ADDR)
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break;
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}
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if (offset == OF_BAD_ADDR) {
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pr_debug("FDT: not found !\n");
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return 1;
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}
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memcpy(addr, ranges + na, 4 * pna);
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finish:
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of_dump_addr("FDT: parent translation for:", addr, pna);
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pr_debug("FDT: with offset: %llx\n", offset);
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/* Translate it into parent bus space */
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return pbus->translate(addr, offset, pna);
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}
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/*
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* Translate an address from the device-tree into a CPU physical address,
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* this walks up the tree and applies the various bus mappings on the
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* way.
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*
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* Note: We consider that crossing any level with #size-cells == 0 to mean
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* that translation is impossible (that is we are not dealing with a value
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* that can be mapped to a cpu physical address). This is not really specified
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* that way, but this is traditionally the way IBM at least do things
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*/
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u64 __init fdt_translate_address(const void *blob, int node_offset)
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{
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int parent, len;
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const struct of_bus *bus, *pbus;
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const __be32 *reg;
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__be32 addr[OF_MAX_ADDR_CELLS];
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int na, ns, pna, pns;
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u64 result = OF_BAD_ADDR;
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pr_debug("FDT: ** translation for device %s **\n",
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fdt_get_name(blob, node_offset, NULL));
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reg = fdt_getprop(blob, node_offset, "reg", &len);
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if (!reg) {
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pr_err("FDT: warning: device tree node '%s' has no address.\n",
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fdt_get_name(blob, node_offset, NULL));
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goto bail;
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}
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/* Get parent & match bus type */
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parent = fdt_parent_offset(blob, node_offset);
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if (parent < 0)
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goto bail;
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bus = &of_busses[0];
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/* Cound address cells & copy address locally */
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bus->count_cells(blob, parent, &na, &ns);
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if (!OF_CHECK_COUNTS(na, ns)) {
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pr_err("FDT: Bad cell count for %s\n",
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fdt_get_name(blob, node_offset, NULL));
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goto bail;
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}
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memcpy(addr, reg, na * 4);
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pr_debug("FDT: bus (na=%d, ns=%d) on %s\n",
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na, ns, fdt_get_name(blob, parent, NULL));
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of_dump_addr("OF: translating address:", addr, na);
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/* Translate */
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for (;;) {
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/* Switch to parent bus */
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node_offset = parent;
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parent = fdt_parent_offset(blob, node_offset);
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/* If root, we have finished */
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if (parent < 0) {
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pr_debug("FDT: reached root node\n");
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result = of_read_number(addr, na);
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break;
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}
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/* Get new parent bus and counts */
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pbus = &of_busses[0];
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pbus->count_cells(blob, parent, &pna, &pns);
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if (!OF_CHECK_COUNTS(pna, pns)) {
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pr_err("FDT: Bad cell count for %s\n",
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fdt_get_name(blob, node_offset, NULL));
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break;
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}
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pr_debug("FDT: parent bus (na=%d, ns=%d) on %s\n",
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pna, pns, fdt_get_name(blob, parent, NULL));
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/* Apply bus translation */
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if (fdt_translate_one(blob, node_offset, bus, pbus,
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addr, na, ns, pna, "ranges"))
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break;
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/* Complete the move up one level */
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na = pna;
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ns = pns;
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bus = pbus;
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of_dump_addr("FDT: one level translation:", addr, na);
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}
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bail:
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return result;
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}
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