150 lines
3.9 KiB
C
150 lines
3.9 KiB
C
/*
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* generic/default IDE host driver
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*
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* Copyright (C) 2004, 2008-2009 Bartlomiej Zolnierkiewicz
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* This code was split off from ide.c. See it for original copyrights.
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*
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* May be copied or modified under the terms of the GNU General Public License.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/ide.h>
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#include <linux/pci_ids.h>
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/* FIXME: convert arm and m32r to use ide_platform host driver */
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#ifdef CONFIG_ARM
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#include <asm/irq.h>
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#endif
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#ifdef CONFIG_M32R
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#include <asm/m32r.h>
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#endif
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#define DRV_NAME "ide_generic"
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static int probe_mask;
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module_param(probe_mask, int, 0);
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MODULE_PARM_DESC(probe_mask, "probe mask for legacy ISA IDE ports");
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static const struct ide_port_info ide_generic_port_info = {
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.host_flags = IDE_HFLAG_NO_DMA,
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.chipset = ide_generic,
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};
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#ifdef CONFIG_ARM
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static const u16 legacy_bases[] = { 0x1f0 };
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static const int legacy_irqs[] = { IRQ_HARDDISK };
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#elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) || \
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defined(CONFIG_PLAT_OPSPUT)
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static const u16 legacy_bases[] = { 0x1f0 };
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static const int legacy_irqs[] = { PLD_IRQ_CFIREQ };
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#elif defined(CONFIG_PLAT_MAPPI3)
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static const u16 legacy_bases[] = { 0x1f0, 0x170 };
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static const int legacy_irqs[] = { PLD_IRQ_CFIREQ, PLD_IRQ_IDEIREQ };
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#elif defined(CONFIG_ALPHA)
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static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168 };
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static const int legacy_irqs[] = { 14, 15, 11, 10 };
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#else
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static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
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static const int legacy_irqs[] = { 14, 15, 11, 10, 8, 12 };
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#endif
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static void ide_generic_check_pci_legacy_iobases(int *primary, int *secondary)
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{
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#ifdef CONFIG_PCI
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struct pci_dev *p = NULL;
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u16 val;
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for_each_pci_dev(p) {
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if (pci_resource_start(p, 0) == 0x1f0)
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*primary = 1;
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if (pci_resource_start(p, 2) == 0x170)
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*secondary = 1;
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/* Cyrix CS55{1,2}0 pre SFF MWDMA ATA on the bridge */
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if (p->vendor == PCI_VENDOR_ID_CYRIX &&
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(p->device == PCI_DEVICE_ID_CYRIX_5510 ||
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p->device == PCI_DEVICE_ID_CYRIX_5520))
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*primary = *secondary = 1;
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/* Intel MPIIX - PIO ATA on non PCI side of bridge */
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if (p->vendor == PCI_VENDOR_ID_INTEL &&
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p->device == PCI_DEVICE_ID_INTEL_82371MX) {
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pci_read_config_word(p, 0x6C, &val);
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if (val & 0x8000) {
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/* ATA port enabled */
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if (val & 0x4000)
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*secondary = 1;
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else
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*primary = 1;
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}
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}
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}
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#endif
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}
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static int __init ide_generic_init(void)
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{
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struct ide_hw hw, *hws[] = { &hw };
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unsigned long io_addr;
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int i, rc = 0, primary = 0, secondary = 0;
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ide_generic_check_pci_legacy_iobases(&primary, &secondary);
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if (!probe_mask) {
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printk(KERN_INFO DRV_NAME ": please use \"probe_mask=0x3f\" "
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"module parameter for probing all legacy ISA IDE ports\n");
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if (primary == 0)
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probe_mask |= 0x1;
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if (secondary == 0)
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probe_mask |= 0x2;
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} else
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printk(KERN_INFO DRV_NAME ": enforcing probing of I/O ports "
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"upon user request\n");
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for (i = 0; i < ARRAY_SIZE(legacy_bases); i++) {
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io_addr = legacy_bases[i];
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if ((probe_mask & (1 << i)) && io_addr) {
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if (!request_region(io_addr, 8, DRV_NAME)) {
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printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX "
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"not free.\n",
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DRV_NAME, io_addr, io_addr + 7);
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rc = -EBUSY;
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continue;
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}
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if (!request_region(io_addr + 0x206, 1, DRV_NAME)) {
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printk(KERN_ERR "%s: I/O resource 0x%lX "
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"not free.\n",
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DRV_NAME, io_addr + 0x206);
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release_region(io_addr, 8);
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rc = -EBUSY;
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continue;
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}
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memset(&hw, 0, sizeof(hw));
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ide_std_init_ports(&hw, io_addr, io_addr + 0x206);
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#ifdef CONFIG_IA64
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hw.irq = isa_irq_to_vector(legacy_irqs[i]);
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#else
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hw.irq = legacy_irqs[i];
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#endif
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rc = ide_host_add(&ide_generic_port_info, hws, 1, NULL);
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if (rc) {
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release_region(io_addr + 0x206, 1);
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release_region(io_addr, 8);
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}
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}
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}
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return rc;
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}
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module_init(ide_generic_init);
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MODULE_LICENSE("GPL");
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