457 lines
10 KiB
C
457 lines
10 KiB
C
/*
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* GPIO driver for Fintek Super-I/O F71882 and F71889
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*
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* Copyright (C) 2010-2013 LaCie
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*
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* Author: Simon Guinot <simon.guinot@sequanux.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#define DRVNAME "gpio-f7188x"
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/*
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* Super-I/O registers
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*/
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#define SIO_LDSEL 0x07 /* Logical device select */
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#define SIO_DEVID 0x20 /* Device ID (2 bytes) */
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#define SIO_DEVREV 0x22 /* Device revision */
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#define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
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#define SIO_LD_GPIO 0x06 /* GPIO logical device */
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#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
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#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
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#define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
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#define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
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#define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
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enum chips { f71882fg, f71889f };
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static const char * const f7188x_names[] = {
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"f71882fg",
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"f71889f",
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};
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struct f7188x_sio {
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int addr;
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enum chips type;
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};
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struct f7188x_gpio_bank {
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struct gpio_chip chip;
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unsigned int regbase;
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struct f7188x_gpio_data *data;
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};
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struct f7188x_gpio_data {
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struct f7188x_sio *sio;
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int nr_bank;
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struct f7188x_gpio_bank *bank;
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};
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/*
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* Super-I/O functions.
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*/
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static inline int superio_inb(int base, int reg)
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{
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outb(reg, base);
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return inb(base + 1);
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}
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static int superio_inw(int base, int reg)
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{
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int val;
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outb(reg++, base);
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val = inb(base + 1) << 8;
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outb(reg, base);
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val |= inb(base + 1);
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return val;
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}
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static inline void superio_outb(int base, int reg, int val)
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{
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outb(reg, base);
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outb(val, base + 1);
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}
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static inline int superio_enter(int base)
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{
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/* Don't step on other drivers' I/O space by accident. */
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if (!request_muxed_region(base, 2, DRVNAME)) {
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pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
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return -EBUSY;
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}
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/* According to the datasheet the key must be send twice. */
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outb(SIO_UNLOCK_KEY, base);
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outb(SIO_UNLOCK_KEY, base);
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return 0;
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}
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static inline void superio_select(int base, int ld)
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{
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outb(SIO_LDSEL, base);
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outb(ld, base + 1);
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}
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static inline void superio_exit(int base)
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{
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outb(SIO_LOCK_KEY, base);
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release_region(base, 2);
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}
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/*
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* GPIO chip.
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*/
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static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
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static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
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static int f7188x_gpio_direction_out(struct gpio_chip *chip,
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unsigned offset, int value);
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static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
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#define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
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{ \
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.chip = { \
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.label = DRVNAME, \
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.owner = THIS_MODULE, \
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.direction_input = f7188x_gpio_direction_in, \
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.get = f7188x_gpio_get, \
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.direction_output = f7188x_gpio_direction_out, \
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.set = f7188x_gpio_set, \
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.base = _base, \
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.ngpio = _ngpio, \
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.can_sleep = true, \
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}, \
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.regbase = _regbase, \
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}
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#define gpio_dir(base) (base + 0)
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#define gpio_data_out(base) (base + 1)
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#define gpio_data_in(base) (base + 2)
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/* Output mode register (0:open drain 1:push-pull). */
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#define gpio_out_mode(base) (base + 3)
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static struct f7188x_gpio_bank f71882_gpio_bank[] = {
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F7188X_GPIO_BANK(0 , 8, 0xF0),
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F7188X_GPIO_BANK(10, 8, 0xE0),
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F7188X_GPIO_BANK(20, 8, 0xD0),
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F7188X_GPIO_BANK(30, 4, 0xC0),
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F7188X_GPIO_BANK(40, 4, 0xB0),
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};
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static struct f7188x_gpio_bank f71889_gpio_bank[] = {
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F7188X_GPIO_BANK(0 , 7, 0xF0),
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F7188X_GPIO_BANK(10, 7, 0xE0),
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F7188X_GPIO_BANK(20, 8, 0xD0),
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F7188X_GPIO_BANK(30, 8, 0xC0),
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F7188X_GPIO_BANK(40, 8, 0xB0),
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F7188X_GPIO_BANK(50, 5, 0xA0),
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F7188X_GPIO_BANK(60, 8, 0x90),
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F7188X_GPIO_BANK(70, 8, 0x80),
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};
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static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
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{
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int err;
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struct f7188x_gpio_bank *bank =
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container_of(chip, struct f7188x_gpio_bank, chip);
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struct f7188x_sio *sio = bank->data->sio;
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u8 dir;
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err = superio_enter(sio->addr);
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if (err)
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return err;
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superio_select(sio->addr, SIO_LD_GPIO);
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dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
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dir &= ~(1 << offset);
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superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
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superio_exit(sio->addr);
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return 0;
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}
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static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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int err;
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struct f7188x_gpio_bank *bank =
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container_of(chip, struct f7188x_gpio_bank, chip);
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struct f7188x_sio *sio = bank->data->sio;
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u8 dir, data;
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err = superio_enter(sio->addr);
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if (err)
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return err;
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superio_select(sio->addr, SIO_LD_GPIO);
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dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
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dir = !!(dir & (1 << offset));
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if (dir)
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data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
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else
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data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
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superio_exit(sio->addr);
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return !!(data & 1 << offset);
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}
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static int f7188x_gpio_direction_out(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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int err;
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struct f7188x_gpio_bank *bank =
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container_of(chip, struct f7188x_gpio_bank, chip);
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struct f7188x_sio *sio = bank->data->sio;
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u8 dir, data_out;
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err = superio_enter(sio->addr);
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if (err)
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return err;
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superio_select(sio->addr, SIO_LD_GPIO);
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data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
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if (value)
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data_out |= (1 << offset);
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else
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data_out &= ~(1 << offset);
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superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
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dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
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dir |= (1 << offset);
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superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
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superio_exit(sio->addr);
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return 0;
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}
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static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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int err;
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struct f7188x_gpio_bank *bank =
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container_of(chip, struct f7188x_gpio_bank, chip);
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struct f7188x_sio *sio = bank->data->sio;
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u8 data_out;
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err = superio_enter(sio->addr);
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if (err)
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return;
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superio_select(sio->addr, SIO_LD_GPIO);
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data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
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if (value)
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data_out |= (1 << offset);
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else
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data_out &= ~(1 << offset);
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superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
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superio_exit(sio->addr);
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}
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/*
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* Platform device and driver.
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*/
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static int f7188x_gpio_probe(struct platform_device *pdev)
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{
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int err;
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int i;
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struct f7188x_sio *sio = pdev->dev.platform_data;
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struct f7188x_gpio_data *data;
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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switch (sio->type) {
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case f71882fg:
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data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
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data->bank = f71882_gpio_bank;
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break;
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case f71889f:
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data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
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data->bank = f71889_gpio_bank;
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break;
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default:
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return -ENODEV;
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}
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data->sio = sio;
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platform_set_drvdata(pdev, data);
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/* For each GPIO bank, register a GPIO chip. */
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for (i = 0; i < data->nr_bank; i++) {
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struct f7188x_gpio_bank *bank = &data->bank[i];
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bank->chip.dev = &pdev->dev;
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bank->data = data;
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err = gpiochip_add(&bank->chip);
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if (err) {
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dev_err(&pdev->dev,
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"Failed to register gpiochip %d: %d\n",
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i, err);
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goto err_gpiochip;
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}
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}
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return 0;
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err_gpiochip:
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for (i = i - 1; i >= 0; i--) {
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struct f7188x_gpio_bank *bank = &data->bank[i];
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gpiochip_remove(&bank->chip);
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}
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return err;
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}
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static int f7188x_gpio_remove(struct platform_device *pdev)
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{
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int i;
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struct f7188x_gpio_data *data = platform_get_drvdata(pdev);
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for (i = 0; i < data->nr_bank; i++) {
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struct f7188x_gpio_bank *bank = &data->bank[i];
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gpiochip_remove(&bank->chip);
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}
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return 0;
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}
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static int __init f7188x_find(int addr, struct f7188x_sio *sio)
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{
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int err;
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u16 devid;
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err = superio_enter(addr);
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if (err)
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return err;
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err = -ENODEV;
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devid = superio_inw(addr, SIO_MANID);
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if (devid != SIO_FINTEK_ID) {
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pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
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goto err;
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}
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devid = superio_inw(addr, SIO_DEVID);
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switch (devid) {
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case SIO_F71882_ID:
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sio->type = f71882fg;
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break;
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case SIO_F71889_ID:
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sio->type = f71889f;
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break;
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default:
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pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
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goto err;
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}
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sio->addr = addr;
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err = 0;
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pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
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f7188x_names[sio->type],
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(unsigned int) addr,
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(int) superio_inb(addr, SIO_DEVREV));
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err:
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superio_exit(addr);
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return err;
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}
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static struct platform_device *f7188x_gpio_pdev;
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static int __init
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f7188x_gpio_device_add(const struct f7188x_sio *sio)
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{
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int err;
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f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
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if (!f7188x_gpio_pdev)
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return -ENOMEM;
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err = platform_device_add_data(f7188x_gpio_pdev,
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sio, sizeof(*sio));
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if (err) {
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pr_err(DRVNAME "Platform data allocation failed\n");
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goto err;
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}
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err = platform_device_add(f7188x_gpio_pdev);
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if (err) {
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pr_err(DRVNAME "Device addition failed\n");
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goto err;
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}
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return 0;
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err:
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platform_device_put(f7188x_gpio_pdev);
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return err;
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}
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/*
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* Try to match a supported Fintech device by reading the (hard-wired)
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* configuration I/O ports. If available, then register both the platform
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* device and driver to support the GPIOs.
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*/
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static struct platform_driver f7188x_gpio_driver = {
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.driver = {
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.owner = THIS_MODULE,
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.name = DRVNAME,
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},
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.probe = f7188x_gpio_probe,
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.remove = f7188x_gpio_remove,
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};
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static int __init f7188x_gpio_init(void)
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{
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int err;
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struct f7188x_sio sio;
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if (f7188x_find(0x2e, &sio) &&
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f7188x_find(0x4e, &sio))
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return -ENODEV;
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err = platform_driver_register(&f7188x_gpio_driver);
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if (!err) {
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err = f7188x_gpio_device_add(&sio);
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if (err)
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platform_driver_unregister(&f7188x_gpio_driver);
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}
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return err;
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}
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subsys_initcall(f7188x_gpio_init);
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static void __exit f7188x_gpio_exit(void)
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{
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platform_device_unregister(f7188x_gpio_pdev);
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platform_driver_unregister(&f7188x_gpio_driver);
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}
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module_exit(f7188x_gpio_exit);
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MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71882FG and F71889F");
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MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
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MODULE_LICENSE("GPL");
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