166 lines
4.2 KiB
C
166 lines
4.2 KiB
C
/*
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* MOXA ART SoCs timer handling.
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*
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* Copyright (C) 2013 Jonas Jensen
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*
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* Jonas Jensen <jonas.jensen@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk.h>
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqreturn.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/io.h>
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#include <linux/clocksource.h>
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#include <linux/bitops.h>
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#define TIMER1_BASE 0x00
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#define TIMER2_BASE 0x10
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#define TIMER3_BASE 0x20
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#define REG_COUNT 0x0 /* writable */
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#define REG_LOAD 0x4
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#define REG_MATCH1 0x8
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#define REG_MATCH2 0xC
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#define TIMER_CR 0x30
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#define TIMER_INTR_STATE 0x34
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#define TIMER_INTR_MASK 0x38
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/*
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* TIMER_CR flags:
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*
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* TIMEREG_CR_*_CLOCK 0: PCLK, 1: EXT1CLK
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* TIMEREG_CR_*_INT overflow interrupt enable bit
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*/
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#define TIMEREG_CR_1_ENABLE BIT(0)
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#define TIMEREG_CR_1_CLOCK BIT(1)
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#define TIMEREG_CR_1_INT BIT(2)
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#define TIMEREG_CR_2_ENABLE BIT(3)
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#define TIMEREG_CR_2_CLOCK BIT(4)
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#define TIMEREG_CR_2_INT BIT(5)
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#define TIMEREG_CR_3_ENABLE BIT(6)
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#define TIMEREG_CR_3_CLOCK BIT(7)
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#define TIMEREG_CR_3_INT BIT(8)
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#define TIMEREG_CR_COUNT_UP BIT(9)
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#define TIMER1_ENABLE (TIMEREG_CR_2_ENABLE | TIMEREG_CR_1_ENABLE)
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#define TIMER1_DISABLE (TIMEREG_CR_2_ENABLE)
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static void __iomem *base;
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static unsigned int clock_count_per_tick;
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static void moxart_clkevt_mode(enum clock_event_mode mode,
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struct clock_event_device *clk)
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{
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switch (mode) {
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case CLOCK_EVT_MODE_RESUME:
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case CLOCK_EVT_MODE_ONESHOT:
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writel(TIMER1_DISABLE, base + TIMER_CR);
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writel(~0, base + TIMER1_BASE + REG_LOAD);
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break;
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case CLOCK_EVT_MODE_PERIODIC:
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writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD);
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writel(TIMER1_ENABLE, base + TIMER_CR);
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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default:
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writel(TIMER1_DISABLE, base + TIMER_CR);
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break;
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}
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}
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static int moxart_clkevt_next_event(unsigned long cycles,
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struct clock_event_device *unused)
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{
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u32 u;
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writel(TIMER1_DISABLE, base + TIMER_CR);
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u = readl(base + TIMER1_BASE + REG_COUNT) - cycles;
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writel(u, base + TIMER1_BASE + REG_MATCH1);
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writel(TIMER1_ENABLE, base + TIMER_CR);
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return 0;
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}
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static struct clock_event_device moxart_clockevent = {
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.name = "moxart_timer",
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.rating = 200,
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = moxart_clkevt_mode,
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.set_next_event = moxart_clkevt_next_event,
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};
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static irqreturn_t moxart_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = dev_id;
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static struct irqaction moxart_timer_irq = {
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.name = "moxart-timer",
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.flags = IRQF_TIMER,
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.handler = moxart_timer_interrupt,
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.dev_id = &moxart_clockevent,
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};
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static void __init moxart_timer_init(struct device_node *node)
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{
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int ret, irq;
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unsigned long pclk;
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struct clk *clk;
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base = of_iomap(node, 0);
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if (!base)
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panic("%s: of_iomap failed\n", node->full_name);
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irq = irq_of_parse_and_map(node, 0);
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if (irq <= 0)
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panic("%s: irq_of_parse_and_map failed\n", node->full_name);
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ret = setup_irq(irq, &moxart_timer_irq);
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if (ret)
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panic("%s: setup_irq failed\n", node->full_name);
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clk = of_clk_get(node, 0);
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if (IS_ERR(clk))
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panic("%s: of_clk_get failed\n", node->full_name);
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pclk = clk_get_rate(clk);
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if (clocksource_mmio_init(base + TIMER2_BASE + REG_COUNT,
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"moxart_timer", pclk, 200, 32,
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clocksource_mmio_readl_down))
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panic("%s: clocksource_mmio_init failed\n", node->full_name);
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clock_count_per_tick = DIV_ROUND_CLOSEST(pclk, HZ);
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writel(~0, base + TIMER2_BASE + REG_LOAD);
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writel(TIMEREG_CR_2_ENABLE, base + TIMER_CR);
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moxart_clockevent.cpumask = cpumask_of(0);
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moxart_clockevent.irq = irq;
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/*
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* documentation is not publicly available:
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* min_delta / max_delta obtained by trial-and-error,
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* max_delta 0xfffffffe should be ok because count
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* register size is u32
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*/
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clockevents_config_and_register(&moxart_clockevent, pclk,
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0x4, 0xfffffffe);
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}
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CLOCKSOURCE_OF_DECLARE(moxart, "moxa,moxart-timer", moxart_timer_init);
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