413 lines
14 KiB
C
413 lines
14 KiB
C
/*
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* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
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* Not a Contribution.
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* Copyright 2012 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef HW_ROME_H
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#define HW_ROME_H
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/******************************************************************************
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** Constants & Macros
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******************************************************************************/
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#define HCI_MAX_CMD_SIZE 260
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#define HCI_MAX_EVENT_SIZE 260
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#define PRINT_BUF_SIZE ((HCI_MAX_CMD_SIZE * 3) + 2)
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/* HCI Command/Event Opcode */
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#define HCI_RESET 0x0C03
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#define EVT_CMD_COMPLETE 0x0E
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/* HCI Packet types */
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#define HCI_COMMAND_PKT 0x01
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#define HCI_ACLDATA_PKT 0x02
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#define HCI_SCODATA_PKT 0x03
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#define HCI_EVENT_PKT 0x04
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#define HCI_VENDOR_PKT 0xff
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#define cmd_opcode_pack(ogf, ocf) (unsigned short)((ocf & 0x03ff)|(ogf << 10))
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#define NVITEM 0
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#define RDWR_PROT 1
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#define NVITEM_SIZE 2
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#define PERSIST_HEADER_LEN 3
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#define BD_ADDR_LEN 6
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#define MSM_DISABLE_FLOW_CTRL 0
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#define MSM_ENABLE_FLOW_CTRL 1
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#ifdef _PLATFORM_MDM_
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#define USERIAL_OP_CLK_ON 0x5441
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#define USERIAL_OP_CLK_OFF 0x5442
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#endif
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unsigned char vnd_local_bd_addr[6] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
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typedef enum {
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USERIAL_OP_FLOW_ON,
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USERIAL_OP_FLOW_OFF,
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USERIAL_OP_NOP,
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} userial_vendor_ioctl_op_t;
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/* vendor serial control block */
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typedef struct
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{
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int fd; /* fd to Bluetooth device */
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struct termios termios; /* serial terminal of BT port */
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char port_name[256];
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} vnd_userial_cb_t;
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/**** baud rates ****/
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#define USERIAL_BAUD_300 0
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#define USERIAL_BAUD_600 1
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#define USERIAL_BAUD_1200 2
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#define USERIAL_BAUD_2400 3
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#define USERIAL_BAUD_9600 4
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#define USERIAL_BAUD_19200 5
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#define USERIAL_BAUD_57600 6
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#define USERIAL_BAUD_115200 7
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#define USERIAL_BAUD_230400 8
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#define USERIAL_BAUD_460800 9
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#define USERIAL_BAUD_921600 10
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#define USERIAL_BAUD_1M 11
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#define USERIAL_BAUD_1_5M 12
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#define USERIAL_BAUD_2M 13
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#define USERIAL_BAUD_3M 14
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#define USERIAL_BAUD_4M 15
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#define USERIAL_BAUD_AUTO 16
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/* Vendor specific baud rate values */
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#define UART_Baud_Rate_Baud_9600 4
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#define UART_Baud_Rate_Baud_19200 3
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#define UART_Baud_Rate_Baud_57600 1
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#define UART_Baud_Rate_Baud_115200 0
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#define UART_Baud_Rate_Baud_230400 5
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#define UART_Baud_Rate_Baud_460800 7
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#define UART_Baud_Rate_Baud_921600 10
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#define UART_Baud_Rate_Baud_1000000 11
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#define UART_Baud_Rate_Baud_2000000 13
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#define UART_Baud_Rate_Baud_3000000 14
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#define UART_Baud_Rate_Baud_4000000 15
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#define UART_Baud_Rate_Baud_250000 6
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#define UART_Baud_Rate_Baud_500000 8
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#define UART_Baud_Rate_Baud_720000 9
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#define UART_Baud_Rate_Baud_125000 12
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#define UART_Baud_Rate_Baud_1600000 16
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#define UART_Baud_Rate_Baud_3200000 17
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#define UART_Baud_Rate_Baud_3500000 18
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#ifndef FALSE
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#define FALSE 0
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#endif
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#ifndef TRUE
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#define TRUE (!FALSE)
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#endif
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#define HCI_CHG_BAUD_CMD_OCF 0x0C
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#define HCI_VENDOR_CMD_OGF 0x3F
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#define WRITE_BDADDR_CMD_LEN 14
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#define WRITE_BAUD_CMD_LEN 6
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#define MAX_CMD_LEN WRITE_BDADDR_CMD_LEN
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#define GET_VERSION_OCF 0x1E
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#define PS_HDR_LEN 4
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#define HCI_VENDOR_CMD_OGF 0x3F
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#define HCI_PS_CMD_OCF 0x0B
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#define HCI_COMMAND_HDR_SIZE 3
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#define EVT_CMD_COMPLETE_SIZE 3
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#define EVT_CMD_STATUS 0x0F
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#define EVT_CMD_STATUS_SIZE 4
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#define HCI_EVENT_HDR_SIZE 2
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#define HCI_EV_SUCCESS 0x00
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/* HCI Socket options */
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#define HCI_DATA_DIR 1
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#define HCI_FILTER 2
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#define HCI_TIME_STAMP 3
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#define P_ID_OFFSET (0)
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#define HCI_CMD_IND (1)
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#define EVENTCODE_OFFSET (1)
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#define EVT_PLEN (2)
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#define PLEN (3)
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#define CMD_RSP_OFFSET (3)
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#define RSP_TYPE_OFFSET (4)
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#define BAUDRATE_RSP_STATUS_OFFSET (4)
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#define CMD_STATUS_OFFSET (5)
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#define P_ROME_VER_OFFSET (4)
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#define P_BUILD_VER_OFFSET (6)
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#define P_BASE_ADDR_OFFSET (8)
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#define P_ENTRY_ADDR_OFFSET (12)
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#define P_LEN_OFFSET (16)
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#define P_CRC_OFFSET (20)
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#define P_CONTROL_OFFSET (24)
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#define PATCH_HDR_LEN (28)
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#define MAX_DATA_PER_SEGMENT (239)
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#define VSEVENT_CODE (0xFF)
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#define HC_VS_MAX_CMD_EVENT (0xFF)
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#define PATCH_PROD_ID_OFFSET (5)
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#define PATCH_PATCH_VER_OFFSET (9)
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#define PATCH_ROM_BUILD_VER_OFFSET (11)
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#define PATCH_SOC_VER_OFFSET (13)
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#define MAX_SIZE_PER_TLV_SEGMENT (243)
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/* VS Opcode */
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#define HCI_PATCH_CMD_OCF (0)
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#define EDL_SET_BAUDRATE_CMD_OCF (0x48)
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/* VS Commands */
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#define VSC_SET_BAUDRATE_REQ_LEN (1)
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#define EDL_PATCH_CMD_LEN (1)
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#define EDL_PATCH_CMD_REQ_LEN (1)
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#define EDL_PATCH_DLD_REQ_CMD (0x01)
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#define EDL_PATCH_RST_REQ_CMD (0x05)
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#define EDL_PATCH_SET_REQ_CMD (0x16)
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#define EDL_PATCH_ATCH_REQ_CMD (0x17)
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#define EDL_PATCH_VER_REQ_CMD (0x19)
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#define EDL_PATCH_TLV_REQ_CMD (0x1E)
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#define VSC_DISABLE_IBS_LEN (0x04)
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/* VS Event */
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#define EDL_CMD_REQ_RES_EVT (0x00)
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#define EDL_CMD_EXE_STATUS_EVT (0x00)
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#define EDL_SET_BAUDRATE_RSP_EVT (0x92)
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#define EDL_PATCH_VER_RES_EVT (0x19)
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#define EDL_TVL_DNLD_RES_EVT (0x04)
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#define EDL_APP_VER_RES_EVT (0x02)
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/* Status Codes of HCI CMD execution*/
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#define HCI_CMD_SUCCESS (0x0)
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#define PATCH_LEN_ERROR (0x1)
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#define PATCH_VER_ERROR (0x2)
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#define PATCH_CRC_ERROR (0x3)
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#define PATCH_NOT_FOUND (0x4)
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#define TLV_TYPE_ERROR (0x10)
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#define NVM_ACCESS_CODE (0x0B)
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#define BAUDRATE_CHANGE_SUCCESS (1)
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/* TLV_TYPE */
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#define TLV_TYPE_PATCH (1)
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#define TLV_TYPE_NVM (2)
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/* NVM */
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#define MAX_TAG_CMD 30
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#define TAG_END 0xFF
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#define NVM_ACCESS_SET 0x01
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#define TAG_NUM_OFFSET 5
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#define TAG_NUM_2 2
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#define TAG_NUM_17 (17)
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#define TAG_NUM_27 27
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#define TAG_NUM_44 44
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#define TAG_BDADDR_OFFSET 7
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/* FW PCM Configuration */
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#define FWCONF_PCM_MS_OFFSET_1 9
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#define FWCONF_PCM_MS_OFFSET_2 33
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#define FWCONF_PCM_SLAVE 1
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#define FWCONF_PCM_MASTER 0
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#define FWCONF_PCM_ROLE_BIT_OFFSET 4
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/* FW IBS Configuration */
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#define FWCONF_IBS_DISABLE (0)
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#define FWCONF_IBS_ENABLE (1)
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#define FWCONF_IBS_VAL_BIT (7)
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#define FWCONF_IBS_VAL_OFFSET (0)
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/* FW DEEP SLEEP Configuration */
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#define FWCONF_DEEP_SLEEP_DISABLE 0
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#define FWCONF_DEEP_SLEEP_ENABLE 1
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#define FWCONF_DEEP_SLEEP_BYTE_OFFSET 0
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#define FWCONF_DEEP_SLEEP_BIT_OFFSET 0
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#define MAX_RETRY_CNT 1
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#define SELECT_TIMEOUT 3
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#define PARAM_LEN 20
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/* NVM Tags specifically used for ROME 1.0 */
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#define ROME_1_0_100022_1 0x101000221
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#define ROME_1_0_100019 0x101000190
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#define ROME_1_0_6002 0x100600200
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/* Default NVM Version setting for ROME 1.0 */
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#define NVM_VERSION ROME_1_0_100022_1
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#define LSH(val, n) ((unsigned int)(val) << (n))
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#define EXTRACT_BYTE(val, pos) (char) (((val) >> (8 * (pos))) & 0xFF)
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#define CALC_SEG_SIZE(len, max) ((plen) % (max))?((plen/max)+1) : ((plen) / (max))
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#define ROME_FW_PATH "/lib/firmware/rampatch.img"
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#define ROME_RAMPATCH_TLV_PATH "/lib/firmware/rampatch_tlv.img"
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#define ROME_NVM_TLV_PATH "/lib/firmware/nvm_tlv.bin"
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#define ROME_RAMPATCH_TLV_1_0_3_PATH "/lib/firmware/rampatch_tlv_1.3.tlv"
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#define ROME_NVM_TLV_1_0_3_PATH "/lib/firmware/nvm_tlv_1.3.bin"
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#define ROME_RAMPATCH_TLV_2_0_1_PATH "/lib/firmware/rampatch_tlv_2.1.tlv"
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#define ROME_NVM_TLV_2_0_1_PATH "/lib/firmware/nvm_tlv_2.1.bin"
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#define ROME_RAMPATCH_TLV_3_0_0_PATH "/lib/firmware/rampatch_tlv_3.0.tlv"
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#define ROME_NVM_TLV_3_0_0_PATH "/lib/firmware/nvm_tlv_3.0.bin"
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#define ROME_RAMPATCH_TLV_3_0_2_PATH "/lib/firmware/btfw32.tlv"
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#define ROME_NVM_TLV_3_0_2_PATH "/lib/firmware/btnv32.bin"
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#ifdef _PLATFORM_MDM_
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#define TF_RAMPATCH_TLV_1_0_0_PATH "/lib/firmware/rampatch_tlv_tf_1.0.tlv"
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#define TF_NVM_TLV_1_0_0_PATH "/lib/firmware/nvm_tlv_tf_1.0.bin"
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#define TF_RAMPATCH_TLV_1_0_1_PATH "/lib/firmware/tfbtfw11.tlv"
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#define TF_NVM_TLV_1_0_1_PATH "/lib/firmware/tfbtnv11.bin"
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#else
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#define TF_RAMPATCH_TLV_1_0_0_PATH "/lib/firmware/qca/rampatch_tlv_tf_1.0.tlv"
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#define TF_NVM_TLV_1_0_0_PATH "/lib/firmware/qca/nvm_tlv_tf_1.0.bin"
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#define TF_RAMPATCH_TLV_1_0_1_PATH "/lib/firmware/qca/tfbtfw11.tlv"
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#define TF_NVM_TLV_1_0_1_PATH "/lib/firmware/qca/tfbtnv11.bin"
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#endif
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/* This header value in rampatch file decides event handling mechanism in the HOST */
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#define ROME_SKIP_EVT_NONE 0x00
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#define ROME_SKIP_EVT_VSE 0x01
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#define ROME_SKIP_EVT_CC 0x02
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#define ROME_SKIP_EVT_VSE_CC 0x03
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#define FW_CONFIG_FILE_PATH "/etc/bluetooth/firmware.conf"
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/******************************************************************************
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** Local type definitions
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******************************************************************************/
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typedef struct {
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unsigned char ncmd;
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unsigned short opcode;
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} __attribute__ ((packed)) evt_cmd_complete;
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typedef struct {
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unsigned char status;
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unsigned char ncmd;
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unsigned short opcode;
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} __attribute__ ((packed)) evt_cmd_status;
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typedef struct {
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unsigned short opcode;
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unsigned char plen;
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} __attribute__ ((packed)) hci_command_hdr;
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typedef struct {
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unsigned char evt;
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unsigned char plen;
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} __attribute__ ((packed)) hci_event_hdr;
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typedef struct {
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unsigned short rom_version;
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unsigned short build_version;
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} __attribute__ ((packed)) patch_version;
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typedef struct {
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unsigned int patch_id;
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patch_version patch_ver;
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unsigned int patch_base_addr;
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unsigned int patch_entry_addr;
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unsigned short patch_length;
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int patch_crc;
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unsigned short patch_ctrl;
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} __attribute__ ((packed)) patch_info;
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typedef struct {
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unsigned int tlv_data_len;
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unsigned int tlv_patch_data_len;
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unsigned char sign_ver;
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unsigned char sign_algorithm;
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unsigned char dwnd_cfg;
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unsigned char reserved1;
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unsigned short prod_id;
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unsigned short build_ver;
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unsigned short patch_ver;
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unsigned short reserved2;
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unsigned int patch_entry_addr;
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} __attribute__ ((packed)) tlv_patch_hdr;
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typedef struct {
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unsigned short tag_id;
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unsigned short tag_len;
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unsigned int tag_ptr;
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unsigned int tag_ex_flag;
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} __attribute__ ((packed)) tlv_nvm_hdr;
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typedef struct {
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unsigned char tlv_type;
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unsigned char tlv_length1;
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unsigned char tlv_length2;
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unsigned char tlv_length3;
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union{
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tlv_patch_hdr patch;
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tlv_nvm_hdr nvm;
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}tlv;
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} __attribute__ ((packed)) tlv_patch_info;
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enum{
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BAUDRATE_115200 = 0x00,
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BAUDRATE_57600 = 0x01,
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BAUDRATE_38400 = 0x02,
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BAUDRATE_19200 = 0x03,
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BAUDRATE_9600 = 0x04,
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BAUDRATE_230400 = 0x05,
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BAUDRATE_250000 = 0x06,
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BAUDRATE_460800 = 0x07,
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BAUDRATE_500000 = 0x08,
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BAUDRATE_720000 = 0x09,
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BAUDRATE_921600 = 0x0A,
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BAUDRATE_1000000 = 0x0B,
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BAUDRATE_1250000 = 0x0C,
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BAUDRATE_2000000 = 0x0D,
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BAUDRATE_3000000 = 0x0E,
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BAUDRATE_4000000 = 0x0F,
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BAUDRATE_1600000 = 0x10,
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BAUDRATE_3200000 = 0x11,
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BAUDRATE_3500000 = 0x12,
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BAUDRATE_AUTO = 0xFE,
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BAUDRATE_Reserved = 0xFF
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};
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enum{
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ROME_PATCH_VER_0100 = 0x0100,
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ROME_PATCH_VER_0101 = 0x0101,
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ROME_PATCH_VER_0200 = 0x0200,
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ROME_PATCH_VER_0300 = 0x0300,
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ROME_PATCH_VER_0302 = 0x0302
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};
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enum{
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ROME_SOC_ID_00 = 0x00000000,
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ROME_SOC_ID_11 = 0x00000011,
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ROME_SOC_ID_13 = 0x00000013,
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ROME_SOC_ID_22 = 0x00000022,
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ROME_SOC_ID_23 = 0x00000023,
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ROME_SOC_ID_44 = 0x00000044
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};
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enum{
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ROME_VER_UNKNOWN = 0,
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ROME_VER_1_0 = ((ROME_PATCH_VER_0100 << 16 ) | ROME_SOC_ID_00 ),
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ROME_VER_1_1 = ((ROME_PATCH_VER_0101 << 16 ) | ROME_SOC_ID_00 ),
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ROME_VER_1_3 = ((ROME_PATCH_VER_0200 << 16 ) | ROME_SOC_ID_00 ),
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ROME_VER_2_1 = ((ROME_PATCH_VER_0200 << 16 ) | ROME_SOC_ID_11 ),
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ROME_VER_3_0 = ((ROME_PATCH_VER_0300 << 16 ) | ROME_SOC_ID_22 ),
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ROME_VER_3_2 = ((ROME_PATCH_VER_0302 << 16 ) | ROME_SOC_ID_44 ),
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TUFELLO_VER_1_0 = ((ROME_PATCH_VER_0300 << 16 ) | ROME_SOC_ID_13 ),
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TUFELLO_VER_1_1 = ((ROME_PATCH_VER_0302 << 16 ) | ROME_SOC_ID_23 )
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};
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#ifdef USE_GLIB
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#include <glib.h>
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#define strlcpy g_strlcpy
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#endif
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#endif /* HW_ROME_H */
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