378 lines
9.8 KiB
C
378 lines
9.8 KiB
C
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <debug.h>
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#include <platform/iomap.h>
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#include <reg.h>
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#include <target.h>
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#include <platform.h>
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#include <uart_dm.h>
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#include <platform/gpio.h>
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#include <lib/ptable.h>
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#include <qpic_nand.h>
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#include <dev/keys.h>
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#include <spmi_v2.h>
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#include <pm8x41.h>
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#include <board.h>
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#include <baseband.h>
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#include <hsusb.h>
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#include <scm.h>
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#include <platform/gpio.h>
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#include <platform/gpio.h>
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#include <platform/irqs.h>
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#include <platform/clock.h>
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#include <crypto5_wrapper.h>
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#include <partition_parser.h>
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#include <stdlib.h>
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#if LONG_PRESS_POWER_ON
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#include <shutdown_detect.h>
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#endif
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#define FASTBOOT_MODE 0x77665500
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#define PON_SOFT_RB_SPARE 0x88F
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extern void smem_ptable_init(void);
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extern void smem_add_modem_partitions(struct ptable *flash_ptable);
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static struct ptable flash_ptable;
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/* PMIC config data */
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#define PMIC_ARB_CHANNEL_NUM 0
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#define PMIC_ARB_OWNER_ID 0
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/* NANDc BAM pipe numbers */
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#define DATA_CONSUMER_PIPE 0
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#define DATA_PRODUCER_PIPE 1
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#define CMD_PIPE 2
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/* NANDc BAM pipe groups */
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#define DATA_PRODUCER_PIPE_GRP 0
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#define DATA_CONSUMER_PIPE_GRP 0
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#define CMD_PIPE_GRP 1
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/* NANDc EE */
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#define QPIC_NAND_EE 0
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/* NANDc max desc length. */
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#define QPIC_NAND_MAX_DESC_LEN 0x7FFF
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#define LAST_NAND_PTN_LEN_PATTERN 0xFFFFFFFF
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#define UBI_CMDLINE " rootfstype=ubifs rootflags=bulk_read,sync"
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#define CE1_INSTANCE 1
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#define CE_EE 1
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#define CE_FIFO_SIZE 64
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#define CE_READ_PIPE 3
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#define CE_WRITE_PIPE 2
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#define CE_READ_PIPE_LOCK_GRP 0
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#define CE_WRITE_PIPE_LOCK_GRP 0
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#define CE_ARRAY_SIZE 20
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#define SUB_TYPE_SKUT 0x0A
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struct qpic_nand_init_config config;
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void update_ptable_names(void)
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{
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uint32_t ptn_index;
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struct ptentry *ptentry_ptr = flash_ptable.parts;
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struct ptentry *boot_ptn;
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unsigned i;
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uint32_t len;
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/* Change all names to lower case. */
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for (ptn_index = 0; ptn_index != (uint32_t)flash_ptable.count; ptn_index++)
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{
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len = strlen(ptentry_ptr[ptn_index].name);
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for (i = 0; i < len; i++)
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{
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if (isupper(ptentry_ptr[ptn_index].name[i]))
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{
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ptentry_ptr[ptn_index].name[i] = tolower(ptentry_ptr[ptn_index].name[i]);
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}
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}
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/* SBL fills in the last partition length as 0xFFFFFFFF.
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* Update the length field based on the number of blocks on the flash.*/
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if ((uint32_t)(ptentry_ptr[ptn_index].length) == LAST_NAND_PTN_LEN_PATTERN)
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{
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ptentry_ptr[ptn_index].length = flash_num_blocks() - ptentry_ptr[ptn_index].start;
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}
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}
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}
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/* Return Non zero (i.e 0x2) if vol_down pressed */
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uint32_t target_volume_down()
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{
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/* Volume down button tied in with PMIC RESIN. */
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return pm8x41_resin_status();
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}
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static void target_keystatus()
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{
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keys_init();
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if(target_volume_down())
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keys_post_event(KEY_VOLUMEDOWN, 1);
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}
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void target_early_init(void)
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{
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#if WITH_DEBUG_UART
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/*BLSP1 and UART5*/
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uart_dm_init(5, 0, BLSP1_UART5_BASE);
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#endif
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}
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/* Configure PMIC and Drop PS_HOLD for shutdown */
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void shutdown_device()
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{
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dprintf(CRITICAL, "Going down for shutdown.\n");
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/* Configure PMIC for shutdown */
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pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN);
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/* Drop PS_HOLD for MSM */
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writel(0x00, MPM2_MPM_PS_HOLD);
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mdelay(5000);
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dprintf(CRITICAL, "shutdown failed\n");
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ASSERT(0);
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}
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void target_init(void)
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{
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uint32_t base_addr;
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uint8_t slot;
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dprintf(INFO, "target_init()\n");
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spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
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target_keystatus();
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config.pipes.read_pipe = DATA_PRODUCER_PIPE;
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config.pipes.write_pipe = DATA_CONSUMER_PIPE;
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config.pipes.cmd_pipe = CMD_PIPE;
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config.pipes.read_pipe_grp = DATA_PRODUCER_PIPE_GRP;
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config.pipes.write_pipe_grp = DATA_CONSUMER_PIPE_GRP;
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config.pipes.cmd_pipe_grp = CMD_PIPE_GRP;
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config.bam_base = MSM_NAND_BAM_BASE;
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config.nand_base = MSM_NAND_BASE;
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config.ee = QPIC_NAND_EE;
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config.max_desc_len = QPIC_NAND_MAX_DESC_LEN;
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qpic_nand_init(&config);
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ptable_init(&flash_ptable);
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smem_ptable_init();
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smem_add_modem_partitions(&flash_ptable);
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update_ptable_names();
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flash_set_ptable(&flash_ptable);
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if (target_use_signed_kernel())
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target_crypto_init_params();
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}
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/* Identify the current target */
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void target_detect(struct board_data *board)
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{
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/* This property is filled as part of board.c */
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}
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unsigned board_machtype(void)
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{
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}
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/* Identify the baseband being used */
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void target_baseband_detect(struct board_data *board)
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{
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uint32_t platform = board->platform;
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switch(platform)
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{
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case MDM9607:
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case MDM8207:
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case MDM9207:
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case MDM9307:
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case MDM9628:
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board->baseband = BASEBAND_MDM;
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break;
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default:
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dprintf(CRITICAL, "Platform type: %u is not supported\n", platform);
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ASSERT(0);
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};
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}
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void target_serialno(unsigned char *buf)
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{
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uint32_t serialno;
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serialno = board_chip_serial();
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snprintf((char *)buf, 13, "%x", serialno);
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}
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unsigned check_reboot_mode(void)
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{
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uint32_t restart_reason = 0;
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/* Read reboot reason and scrub it */
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restart_reason = readl(RESTART_REASON_ADDR);
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writel(0x00, RESTART_REASON_ADDR);
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return restart_reason;
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}
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int get_target_boot_params(const char *cmdline, const char *part, char **buf)
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{
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struct ptable *ptable;
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int system_ptn_index = -1;
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uint32_t buflen = strlen(UBI_CMDLINE) + strlen(" root=ubi0:rootfs ubi.mtd=") + sizeof(int) + 1; /* 1 byte for null character*/
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*buf = (char *)malloc(buflen);
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if(!(*buf)) {
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dprintf(CRITICAL,"Unable to allocate memory for boot params\n");
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return -1;
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}
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ptable = flash_get_ptable();
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if (!ptable) {
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dprintf(CRITICAL,"WARN: Cannot get flash partition table\n");
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free(*buf);
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return -1;
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}
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system_ptn_index = ptable_get_index(ptable, part);
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if (system_ptn_index < 0) {
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dprintf(CRITICAL,"WARN: Cannot get partition index for %s\n", part);
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free(*buf);
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return -1;
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}
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/* Adding command line parameters according to target boot type */
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snprintf(*buf, buflen, UBI_CMDLINE);
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/*check if cmdline contains "root=" at the beginning of buffer or
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* " root=" in the middle of buffer.
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*/
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if (((!strncmp(cmdline, "root=", strlen("root="))) ||
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(strstr(cmdline, " root="))))
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dprintf(DEBUG, "DEBUG: cmdline has root=\n");
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else
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snprintf(*buf+strlen(*buf), buflen, " root=ubi0:rootfs ubi.mtd=%d", system_ptn_index);
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/*in success case buf will be freed in the calling function of this*/
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return 0;
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}
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void target_usb_init(void)
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{
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uint32_t val;
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/* Select and enable external configuration with USB PHY */
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ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET);
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/* Enable sess_vld */
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val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN;
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writel(val, USB_GENCONFIG_2);
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/* Enable external vbus configuration in the LINK */
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val = readl(USB_USBCMD);
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val |= SESS_VLD_CTRL;
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writel(val, USB_USBCMD);
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}
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void target_uninit(void)
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{
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if (crypto_initialized())
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crypto_eng_cleanup();
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}
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void reboot_device(unsigned reboot_reason)
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{
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uint8_t reset_type = 0;
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/* Write the reboot reason */
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writel(reboot_reason, RESTART_REASON_ADDR);
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/* Configure PMIC for warm reset */
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/* PM 8019 v1 aligns with PM8941 v2.
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* This call should be based on the pmic version
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* when PM8019 v2 is available.
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*/
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if(reboot_reason)
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reset_type = PON_PSHOLD_WARM_RESET;
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else
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reset_type = PON_PSHOLD_HARD_RESET;
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pm8x41_v2_reset_configure(reset_type);
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/* Drop PS_HOLD for MSM */
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writel(0x00, MPM2_MPM_PS_HOLD);
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mdelay(5000);
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dprintf(CRITICAL, "Rebooting failed\n");
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return;
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}
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crypto_engine_type board_ce_type(void)
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{
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return CRYPTO_ENGINE_TYPE_HW;
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}
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/* Set up params for h/w CE. */
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void target_crypto_init_params()
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{
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struct crypto_init_params ce_params;
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/* Set up base addresses and instance. */
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ce_params.crypto_instance = CE1_INSTANCE;
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ce_params.crypto_base = MSM_CE1_BASE;
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ce_params.bam_base = MSM_CE1_BAM_BASE;
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/* Set up BAM config. */
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ce_params.bam_ee = CE_EE;
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ce_params.pipes.read_pipe = CE_READ_PIPE;
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ce_params.pipes.write_pipe = CE_WRITE_PIPE;
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ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP;
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ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP;
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/* Assign buffer sizes. */
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ce_params.num_ce = CE_ARRAY_SIZE;
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ce_params.read_fifo_size = CE_FIFO_SIZE;
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ce_params.write_fifo_size = CE_FIFO_SIZE;
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/* BAM is initialized by TZ for this platform.
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* Do not do it again as the initialization address space
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* is locked.
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*/
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ce_params.do_bam_init = 0;
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crypto_init_params(&ce_params);
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}
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