/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Qualcomm MPQ8092";
	compatible = "qcom,mpq8092";
	interrupt-parent = <&intc>;

	soc: soc { };
};

/include/ "mpq8092-iommu.dtsi"
/include/ "msm-gdsc.dtsi"
/include/ "mpq8092-ion.dtsi"

&soc {
	#address-cells = <1>;
	#size-cells = <1>;
	ranges;

	intc: interrupt-controller@f9000000 {
		compatible = "qcom,msm-qgic2";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0xf9000000 0x1000>,
		<0xf9002000 0x1000>;
	};

	msmgpio: gpio@fd510000 {
		compatible = "qcom,msm-gpio";
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		reg = <0xfd510000 0x4000>;
		ngpio = <146>;
		interrupts = <0 208 0>;
		qcom,direct-connect-irqs = <8>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <1 2 0>, <1 3 0>;
		clock-frequency = <19200000>;
	};

	timer@f9020000 {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		compatible = "arm,armv7-timer-mem";
		reg = <0xf9020000 0x1000>;
		clock-frequency = <19200000>;

		frame@f9021000 {
			frame-number = <0>;
			interrupts = <0 8 0x4>,
				     <0 7 0x4>;
			reg = <0xf9021000 0x1000>,
			      <0xf9022000 0x1000>;
		};

		frame@f9023000 {
			frame-number = <1>;
			interrupts = <0 9 0x4>;
			reg = <0xf9023000 0x1000>;
			status = "disabled";
		};

		frame@f9024000 {
			frame-number = <2>;
			interrupts = <0 10 0x4>;
			reg = <0xf9024000 0x1000>;
			status = "disabled";
		};

		frame@f9025000 {
			frame-number = <3>;
			interrupts = <0 11 0x4>;
			reg = <0xf9025000 0x1000>;
			status = "disabled";
		};

		frame@f9026000 {
			frame-number = <4>;
			interrupts = <0 12 0x4>;
			reg = <0xf9026000 0x1000>;
			status = "disabled";
		};

		frame@f9027000 {
			frame-number = <5>;
			interrupts = <0 13 0x4>;
			reg = <0xf9027000 0x1000>;
			status = "disabled";
		};

		frame@f9028000 {
			frame-number = <6>;
			interrupts = <0 14 0x4>;
			reg = <0xf9028000 0x1000>;
			status = "disabled";
		};
	};

	serial@f991f000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0xf991f000 0x1000>;
		interrupts = <0 109 0>;
		status = "disabled";
	};

	serial@f9922000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0xf9922000 0x1000>;
		interrupts = <0 112 0>;
		status = "disabled";
	};

	serial@f995e000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0xf995e000 0x1000>;
		interrupts = <0 114 0>;
		status = "disabled";
	};

	qcom,msm-imem@fe805000 {
                compatible = "qcom,msm-imem";
                reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
	};

	spmi_bus: qcom,spmi@fc4c0000 {
		cell-index = <0>;
		compatible = "qcom,spmi-pmic-arb";
		reg-names = "core", "intr", "cnfg";
		reg = <0xfc4cf000 0x1000>,
		      <0Xfc4cb000 0x1000>,
		      <0Xfc4ca000 0x1000>;
		/* 190,ee0_krait_hlos_spmi_periph_irq */
		/* 187,channel_0_krait_hlos_trans_done_irq */
		interrupts = <0 190 0 0 187 0>;
		qcom,not-wakeup;
		qcom,pmic-arb-ee = <0>;
		qcom,pmic-arb-channel = <0>;
	};

	sdcc1: qcom,sdcc@f9824000 {
		cell-index = <1>; /* SDC1 eMMC slot */
		compatible = "qcom,msm-sdcc";
		reg = <0xf9824000 0x800>;
		reg-names = "core_mem";
		interrupts = <0 123 0>;
		interrupt-names = "core_irq";

		qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
		qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
		qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
		qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

		qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
		qcom,sup-voltages = <2950 2950>;
		qcom,bus-width = <8>;
		qcom,nonremovable;
		qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
	};

	sdcc2: qcom,sdcc@f98a4000 {
		cell-index = <2>; /* SDC2 SD card slot */
		compatible = "qcom,msm-sdcc";
		reg = <0xf98a4000 0x800>;
		reg-names = "core_mem";
		interrupts = <0 125 0>;
		interrupt-names = "core_irq";

		qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
		qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
		qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
		qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

		qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
		qcom,sup-voltages = <2950 2950>;
		qcom,bus-width = <4>;
		qcom,xpc;
		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
		qcom,current-limit = <800>;
	};

	sata: sata@fc580000 {
		compatible = "qcom,msm-ahci";
		reg = <0xfc580000 0x17c>;
		interrupts = <0 243 0>;
	};

	qcom,wdt@f9017000 {
		compatible = "qcom,msm-watchdog";
		reg = <0xf9017000 0x1000>;
		interrupts = <0 3 0>, <0 4 0>;
		qcom,bark-time = <11000>;
		qcom,pet-time = <10000>;
		qcom,ipi-ping;
	};
};

&gdsc_venus {
	status = "ok";
};

&gdsc_mdss {
	status = "ok";
};

&gdsc_jpeg {
	status = "ok";
};

&gdsc_oxili_gx {
	status = "ok";
};

&gdsc_oxili_cx {
	status = "ok";
};

&gdsc_usb_hsic {
	status = "ok";
};

/include/ "msm-pma8084.dtsi"
/include/ "mpq8092-regulator.dtsi"