synopsys DWC3 CORE

DWC3- USB3 CONTROLLER

Required properties:
 - compatible: must be "snps,dwc3"
 - reg : Address and length of the register set for the device
 - interrupts: Interrupts used by the dwc3 controller.

Optional properties:
 - usb-phy : array of phandle for the PHY device.  The first element
   in the array is expected to be a handle to the USB2/HS PHY and
   the second element is expected to be a handle to the USB3/SS PHY
 - phys: from the *Generic PHY* bindings
 - phy-names: from the *Generic PHY* bindings
 - tx-fifo-resize: determines if the FIFO *has* to be reallocated.
 - snps,nominal-elastic-buffer: When set, the nominal elastic buffer setting
	is used. By default, the half-full setting is used.
 - snps,usb3-u1u2-disable: If present, disable u1u2 low power modes for DWC3 core controller in SS mode.
 - snps,bus-suspend-enable: If present then controller supports low power mode
	during bus suspend.
 - snps,disable-clk-gating: If present, disable controller's internal clock gating. Default it is enabled.
 - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
 - snps,lpm-nyet-threshold: LPM NYET threshold
 - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
			utmi_l1_suspend_n, false when asserts utmi_sleep_n
 - snps,hird-threshold: HIRD threshold
 - snps,num-normal-evt-buffs: If present, specifies number of normal event buffers. Default is 1.
 - snps,num-gsi-evt-buffs: If present, specifies number of GSI based hardware accelerated event buffers.
	1 event buffer is needed per h/w accelerated endpoint.

This is usually a subnode to DWC3 glue to which it is connected.

dwc3@4a030000 {
	compatible = "snps,dwc3";
	reg = <0x4a030000 0xcfff>;
	interrupts = <0 92 4>
	usb-phy = <&usb2_phy>, <&usb3,phy>;
	tx-fifo-resize;
	snps,usb3-u1u2-disable;
	snps,num-gsi-evt-buffs = <0x2>;
};