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35
kernel/include/linux/qpnp/clkdiv.h Normal file
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/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef QPNP_CLKDIV_H
#define QPNP_CLKDIV_H
enum q_clkdiv_cfg {
Q_CLKDIV_NO_CLK = 0,
Q_CLKDIV_XO_DIV_1,
Q_CLKDIV_XO_DIV_2,
Q_CLKDIV_XO_DIV_4,
Q_CLKDIV_XO_DIV_8,
Q_CLKDIV_XO_DIV_16,
Q_CLKDIV_XO_DIV_32,
Q_CLKDIV_XO_DIV_64,
Q_CLKDIV_INVALID,
};
struct q_clkdiv;
struct q_clkdiv *qpnp_clkdiv_get(struct device *dev, const char *name);
int qpnp_clkdiv_enable(struct q_clkdiv *q_clkdiv);
int qpnp_clkdiv_disable(struct q_clkdiv *q_clkdiv);
int qpnp_clkdiv_config(struct q_clkdiv *q_clkdiv,
enum q_clkdiv_cfg cfg);
#endif

190
kernel/include/linux/qpnp/pin.h Normal file
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/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/* Mode select */
#define QPNP_PIN_MODE_DIG_IN 0
#define QPNP_PIN_MODE_DIG_OUT 1
#define QPNP_PIN_MODE_DIG_IN_OUT 2
#define QPNP_PIN_MODE_BIDIR 3
#define QPNP_PIN_MODE_AIN 4
#define QPNP_PIN_MODE_AOUT 5
#define QPNP_PIN_MODE_SINK 6
/* Invert source select (GPIO, MPP) */
#define QPNP_PIN_INVERT_DISABLE 0
#define QPNP_PIN_INVERT_ENABLE 1
/* Output type (GPIO) */
#define QPNP_PIN_OUT_BUF_CMOS 0
#define QPNP_PIN_OUT_BUF_OPEN_DRAIN_NMOS 1
#define QPNP_PIN_OUT_BUF_OPEN_DRAIN_PMOS 2
/* Voltage select (GPIO, MPP) */
#define QPNP_PIN_VIN0 0
#define QPNP_PIN_VIN1 1
#define QPNP_PIN_VIN2 2
#define QPNP_PIN_VIN3 3
#define QPNP_PIN_VIN4 4
#define QPNP_PIN_VIN5 5
#define QPNP_PIN_VIN6 6
#define QPNP_PIN_VIN7 7
/* Pull Up Values (GPIO) */
#define QPNP_PIN_GPIO_PULL_UP_30 0
#define QPNP_PIN_GPIO_PULL_UP_1P5 1
#define QPNP_PIN_GPIO_PULL_UP_31P5 2
#define QPNP_PIN_GPIO_PULL_UP_1P5_30 3
#define QPNP_PIN_GPIO_PULL_DN 4
#define QPNP_PIN_GPIO_PULL_NO 5
/* Pull Up Values (MPP) */
#define QPNP_PIN_MPP_PULL_UP_0P6KOHM 0
#define QPNP_PIN_MPP_PULL_UP_OPEN 1
#define QPNP_PIN_MPP_PULL_UP_10KOHM 2
#define QPNP_PIN_MPP_PULL_UP_30KOHM 3
/* Out Strength (GPIO) */
#define QPNP_PIN_OUT_STRENGTH_LOW 1
#define QPNP_PIN_OUT_STRENGTH_MED 2
#define QPNP_PIN_OUT_STRENGTH_HIGH 3
/* Source Select (GPIO) / Enable Select (MPP) */
#define QPNP_PIN_SEL_FUNC_CONSTANT 0
#define QPNP_PIN_SEL_FUNC_PAIRED 1
#define QPNP_PIN_SEL_FUNC_1 2
#define QPNP_PIN_SEL_FUNC_2 3
#define QPNP_PIN_SEL_DTEST1 4
#define QPNP_PIN_SEL_DTEST2 5
#define QPNP_PIN_SEL_DTEST3 6
#define QPNP_PIN_SEL_DTEST4 7
/* Master enable (GPIO, MPP) */
#define QPNP_PIN_MASTER_DISABLE 0
#define QPNP_PIN_MASTER_ENABLE 1
/* Analog Output (MPP) */
#define QPNP_PIN_AOUT_1V25 0
#define QPNP_PIN_AOUT_0V625 1
#define QPNP_PIN_AOUT_0V3125 2
#define QPNP_PIN_AOUT_MPP 3
#define QPNP_PIN_AOUT_ABUS1 4
#define QPNP_PIN_AOUT_ABUS2 5
#define QPNP_PIN_AOUT_ABUS3 6
#define QPNP_PIN_AOUT_ABUS4 7
/* Analog Input (MPP) */
#define QPNP_PIN_AIN_AMUX_CH5 0
#define QPNP_PIN_AIN_AMUX_CH6 1
#define QPNP_PIN_AIN_AMUX_CH7 2
#define QPNP_PIN_AIN_AMUX_CH8 3
#define QPNP_PIN_AIN_AMUX_ABUS1 4
#define QPNP_PIN_AIN_AMUX_ABUS2 5
#define QPNP_PIN_AIN_AMUX_ABUS3 6
#define QPNP_PIN_AIN_AMUX_ABUS4 7
/* Current Sink (MPP) */
#define QPNP_PIN_CS_OUT_5MA 0
#define QPNP_PIN_CS_OUT_10MA 1
#define QPNP_PIN_CS_OUT_15MA 2
#define QPNP_PIN_CS_OUT_20MA 3
#define QPNP_PIN_CS_OUT_25MA 4
#define QPNP_PIN_CS_OUT_30MA 5
#define QPNP_PIN_CS_OUT_35MA 6
#define QPNP_PIN_CS_OUT_40MA 7
/**
* struct qpnp_pin_cfg - structure to specify pin configurtion values
* @mode: indicates whether the pin should be input, output, or
* both for gpios. mpp pins also support bidirectional,
* analog in, analog out and current sink. This value
* should be of type QPNP_PIN_MODE_*.
* @output_type: indicates pin should be configured as CMOS or open
* drain. Should be of the type QPNP_PIN_OUT_BUF_*. This
* setting applies for gpios only.
* @invert: Invert the signal of the line -
* QPNP_PIN_INVERT_DISABLE or QPNP_PIN_INVERT_ENABLE.
* @pull: This parameter should be programmed to different values
* depending on whether it's GPIO or MPP.
* For GPIO, it indicates whether a pull up or pull down
* should be applied. If a pullup is required the
* current strength needs to be specified.
* Current values of 30uA, 1.5uA, 31.5uA, 1.5uA with 30uA
* boost are supported. This value should be one of
* the QPNP_PIN_GPIO_PULL_*. Note that the hardware ignores
* this configuration if the GPIO is not set to input or
* output open-drain mode.
* For MPP, it indicates whether a pullup should be
* applied for bidirectitional mode only. The hardware
* ignores the configuration when operating in other modes.
* This value should be one of the QPNP_PIN_MPP_PULL_*.
* @vin_sel: specifies the voltage level when the output is set to 1.
* For an input gpio specifies the voltage level at which
* the input is interpreted as a logical 1.
* @out_strength: the amount of current supplied for an output gpio,
* should be of the type QPNP_PIN_STRENGTH_*.
* @src_sel: select alternate function for the pin. Certain pins
* can be paired (shorted) with each other. Some pins
* can act as alternate functions. In the context of
* gpio, this acts as a source select. For mpps,
* this is an enable select.
* This parameter should be of type QPNP_PIN_SEL_*.
* @master_en: QPNP_PIN_MASTER_ENABLE = Enable features within the
* pin block based on configurations.
* QPNP_PIN_MASTER_DISABLE = Completely disable the pin
* block and let the pin float with high impedance
* regardless of other settings.
* @aout_ref: Set the analog output reference. This parameter should
* be of type QPNP_PIN_AOUT_*. This parameter only applies
* to mpp pins.
* @ain_route: Set the source for analog input. This parameter
* should be of type QPNP_PIN_AIN_*. This parameter only
* applies to mpp pins.
* @cs_out: Set the the amount of current to sync in mA. This
* parameter should be of type QPNP_PIN_CS_OUT_*. This
* parameter only applies to mpp pins.
*/
struct qpnp_pin_cfg {
int mode;
int output_type;
int invert;
int pull;
int vin_sel;
int out_strength;
int src_sel;
int master_en;
int aout_ref;
int ain_route;
int cs_out;
};
/**
* qpnp_pin_config - Apply pin configuration for Linux gpio
* @gpio: Linux gpio number to configure.
* @param: parameters to configure.
*
* This routine takes a Linux gpio number that corresponds with a
* PMIC pin and applies the configuration specified in 'param'.
* This gpio number can be ascertained by of_get_gpio_flags() or
* the qpnp_pin_map_gpio() API.
*/
int qpnp_pin_config(int gpio, struct qpnp_pin_cfg *param);
/**
* qpnp_pin_map - Obtain Linux GPIO number from device spec
* @name: Name assigned by the 'label' binding for the primary node.
* @pmic_pin: PMIC pin number to lookup.
*
* This routine is used in legacy configurations that do not support
* Device Tree. If you are using Device Tree, you should not use this.
* For such cases, use of_get_gpio() or friends instead.
*/
int qpnp_pin_map(const char *name, uint32_t pmic_pin);

52
kernel/include/linux/qpnp/power-on.h Normal file
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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef QPNP_PON_H
#define QPNP_PON_H
#include <linux/errno.h>
/**
* enum pon_trigger_source: List of PON trigger sources
* %PON_SMPL: PON triggered by SMPL - Sudden Momentary Power Loss
* %PON_RTC: PON triggered by RTC alarm
* %PON_DC_CHG: PON triggered by insertion of DC charger
* %PON_USB_CHG: PON triggered by insertion of USB
* %PON_PON1: PON triggered by other PMIC (multi-PMIC option)
* %PON_CBLPWR_N: PON triggered by power-cable insertion
* %PON_KPDPWR_N: PON triggered by long press of the power-key
*/
enum pon_trigger_source {
PON_SMPL = 1,
PON_RTC,
PON_DC_CHG,
PON_USB_CHG,
PON_PON1,
PON_CBLPWR_N,
PON_KPDPWR_N,
};
#ifdef CONFIG_QPNP_POWER_ON
int qpnp_pon_system_pwr_off(bool reset);
int qpnp_pon_is_warm_reset(void);
int qpnp_pon_trigger_config(enum pon_trigger_source pon_src, bool enable);
#else
static int qpnp_pon_system_pwr_off(bool reset) { return -ENODEV; }
static inline int qpnp_pon_is_warm_reset(void) { return -ENODEV; }
static inline int qpnp_pon_trigger_config(enum pon_trigger_source pon_src,
bool enable)
{
return -ENODEV;
}
#endif
#endif

178
kernel/include/linux/qpnp/pwm.h Normal file
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/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __QPNP_PWM_H__
#define __QPNP_PWM_H__
#include <linux/pwm.h>
/* usec: 19.2M, n=6, m=0, pre=2 */
#define PM_PWM_PERIOD_MIN 7
/* 1K, n=9, m=7, pre=6 */
#define PM_PWM_PERIOD_MAX (384 * USEC_PER_SEC)
#define PM_PWM_LUT_RAMP_STEP_TIME_MAX 499
#define PM_PWM_MAX_PAUSE_CNT 8191
/*
* Formula from HSID,
* pause_time (hi/lo) = (pause_code - 1)*(duty_ms)
*/
#define PM_PWM_LUT_PAUSE_MAX \
((PM_PWM_MAX_PAUSE_CNT - 1) * PM_PWM_LUT_RAMP_STEP_TIME_MAX) /* ms */
/* Flags for Look Up Table */
#define PM_PWM_LUT_LOOP 0x01
#define PM_PWM_LUT_RAMP_UP 0x02
#define PM_PWM_LUT_REVERSE 0x04
#define PM_PWM_LUT_PAUSE_HI_EN 0x08
#define PM_PWM_LUT_PAUSE_LO_EN 0x10
#define PM_PWM_LUT_NO_TABLE 0x20
#define PM_PWM_LUT_USE_RAW_VALUE 0x40
/*
* PWM frequency/period control
*
* PWM Frequency = ClockFrequency / (N * T)
* or
* PWM Period = Clock Period * (N * T)
* where
* N = 2^9 or 2^6 for 9-bit or 6-bit PWM size
* T = Pre-divide * 2^m, m = 0..7 (exponent)
*/
/*
* enum pm_pwm_size - PWM bit mode selection
* %PM_PWM_SIZE_6BIT - Select 6 bit mode; 64 levels
* %PM_PWM_SIZE_9BIT - Select 9 bit mode; 512 levels
*/
enum pm_pwm_size {
PM_PWM_SIZE_6BIT = 6,
PM_PWM_SIZE_9BIT = 9,
};
/*
* enum pm_pwm_clk - PWM clock selection
* %PM_PWM_CLK_1KHZ - 1KHz clock
* %PM_PWM_CLK_32KHZ - 32KHz clock
* %PM_PWM_CLK_19P2MHZ - 19.2MHz clock
* Note: Here 1KHz = 1024Hz
*/
enum pm_pwm_clk {
PM_PWM_CLK_1KHZ,
PM_PWM_CLK_32KHZ,
PM_PWM_CLK_19P2MHZ,
};
/* PWM pre-divider selection */
enum pm_pwm_pre_div {
PM_PWM_PDIV_2,
PM_PWM_PDIV_3,
PM_PWM_PDIV_5,
PM_PWM_PDIV_6,
};
/*
* struct pwm_period_config - PWM period configuration
* @pwm_size: enum pm_pwm_size
* @clk: enum pm_pwm_clk
* @pre_div: enum pm_pwm_pre_div
* @pre_div_exp: exponent of 2 as part of pre-divider: 0..7
*/
struct pwm_period_config {
enum pm_pwm_size pwm_size;
enum pm_pwm_clk clk;
enum pm_pwm_pre_div pre_div;
int pre_div_exp;
};
/*
* struct pwm_duty_cycles - PWM duty cycle info
* duty_pcts - pointer to an array of duty percentage for a pwm period
* num_duty_pcts - total entries in duty_pcts array
* duty_ms - duty cycle time in ms
* start_idx - index in the LUT
*/
struct pwm_duty_cycles {
int *duty_pcts;
int num_duty_pcts;
int duty_ms;
int start_idx;
};
int pwm_config_period(struct pwm_device *pwm,
struct pwm_period_config *pwm_p);
int pwm_config_pwm_value(struct pwm_device *pwm, int pwm_value);
/*
* enum pm_pwm_mode - PWM mode selection
* %PM_PWM_MODE_PWM - Select PWM mode
* %PM_PWM_MODE_LPG - Select LPG mode
*/
enum pm_pwm_mode {
PM_PWM_MODE_PWM,
PM_PWM_MODE_LPG,
};
int pwm_change_mode(struct pwm_device *pwm, enum pm_pwm_mode mode);
/*
* lut_params: Lookup table (LUT) parameters
* @start_idx: start index in lookup table from 0 to MAX-1
* @idx_len: number of index
* @pause_lo: pause time in millisecond at low index
* @pause_hi: pause time in millisecond at high index
* @ramp_step_ms: time before loading next LUT pattern in millisecond
* @flags: control flags
*/
struct lut_params {
int start_idx;
int idx_len;
int lut_pause_hi;
int lut_pause_lo;
int ramp_step_ms;
int flags;
};
int pwm_lut_config(struct pwm_device *pwm, int period_us,
int duty_pct[], struct lut_params lut_params);
/* Standard APIs supported */
/*
* pwm_request - request a PWM device
* @pwm_id: PWM id or channel
* @label: the label to identify the user
*/
/*
* pwm_free - free a PWM device
* @pwm: the PWM device
*/
/*
* pwm_config - change a PWM device configuration
* @pwm: the PWM device
* @period_us: period in microsecond
* @duty_us: duty cycle in microsecond
*/
/*
* pwm_enable - start a PWM output toggling
* @pwm: the PWM device
*/
/*
* pwm_disable - stop a PWM output toggling
* @pwm: the PWM device
*/
#endif /* __QPNP_PWM_H__ */

1527
kernel/include/linux/qpnp/qpnp-adc.h Normal file
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39
kernel/include/linux/qpnp/vibrator.h Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __QPNP_VIBRATOR_H__
#define __QPNP_VIBRATOR_H__
enum qpnp_vib_en_mode {
QPNP_VIB_MANUAL,
QPNP_VIB_DTEST1,
QPNP_VIB_DTEST2,
QPNP_VIB_DTEST3,
};
struct qpnp_vib_config {
u16 drive_mV;
u8 active_low;
enum qpnp_vib_en_mode enable_mode;
};
#if defined(CONFIG_QPNP_VIBRATOR)
int qpnp_vibrator_config(struct qpnp_vib_config *vib_config);
#else
static inline int qpnp_vibrator_config(struct qpnp_vib_config *vib_config)
{
return -ENODEV;
}
#endif
#endif /* __QPNP_VIBRATOR_H__ */