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2024-09-09 08:52:07 +00:00
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6
kernel/drivers/usb/host/pehci/hal/Makefile Normal file
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#
# Makefile for the pehci driver (if driver is inside kernel tree).
#
obj-$(CONFIG_USB_PEHCI_HCD) += hal_msm.o

313
kernel/drivers/usb/host/pehci/hal/hal_intf.h Normal file
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/*
* Copyright (C) ST-Ericsson AP Pte Ltd 2010
*
* ISP1763 Linux OTG Controller driver : hal
*
* This program is free software; you can redistribute it and/or modify it under the terms of
* the GNU General Public License as published by the Free Software Foundation; version
* 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT ANY
* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
* details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
* This is a hardware abstraction layer header file.
*
* Author : wired support <wired.support@stericsson.com>
*
*/
#ifndef HAL_INTF_H
#define HAL_INTF_H
/* Specify package here instead of including package.h */
/* #include "package.h" */
#define HCD_PACKAGE
#define NON_PCI
//#define PXA300
//#define MSEC_INT_BASED
#ifdef MSEC_INT_BASED
#define THREAD_BASED
#endif
#ifndef DATABUS_WIDTH_16
#define DATABUS_WIDTH_16
#endif
#ifdef DATABUS_WIDTH_16
/*DMA SUPPORT */
/* #define ENABLE_PLX_DMA */
//#undef ENABLE_PLX_DMA//PXA300
#endif
//#define EDGE_INTERRUPT
//#define POL_HIGH_INTERRUPT
#define DMA_BUF_SIZE (4096 * 2)
#define ISP1763_CHIPID 0x176320
/* Values for id_flags filed of isp1763_driver_t */
#define ISP1763_HC 0 /* Host Controller Driver */
#define ISP1763_DC 1 /* Device Controller Driver */
#define ISP1763_OTG 2 /* Otg Controller Driver */
#define ISP1763_LAST_DEV (ISP1763_OTG + 1)
#define ISP1763_1ST_DEV (ISP1763_HC)
#ifdef PXA300
#define HC_SPARAMS_REG (0x04<<1) /* Structural Parameters Register */
#define HC_CPARAMS_REG (0x08<<1) /* Capability Parameters Register */
#define HC_USBCMD_REG (0x8C<<1) /* USB Command Register */
#define HC_USBSTS_REG (0x90<<1) /* USB Status Register */
#define HC_INTERRUPT_REG_EHCI (0x94<<1) /* INterrupt Enable Register */
#define HC_FRINDEX_REG (0x98<<1) /* Frame Index Register */
#define HC_CONFIGFLAG_REG (0x9C<<1) /* Conigured Flag Register */
#define HC_PORTSC1_REG (0xA0<<1) /* Port Status Control for Port1 */
/*ISO Transfer Registers */
#define HC_ISO_PTD_DONEMAP_REG (0xA4<<1) /* ISO PTD Done Map Register */
#define HC_ISO_PTD_SKIPMAP_REG (0xA6<<1) /* ISO PTD Skip Map Register */
#define HC_ISO_PTD_LASTPTD_REG (0xA8<<1) /* ISO PTD Last PTD Register */
/*INT Transfer Registers */
#define HC_INT_PTD_DONEMAP_REG (0xAA<<1) /* INT PTD Done Map Register */
#define HC_INT_PTD_SKIPMAP_REG (0xAC<<1) /* INT PTD Skip Map Register */
#define HC_INT_PTD_LASTPTD_REG (0xAE<<1) /* INT PTD Last PTD Register */
/*ATL Transfer Registers */
#define HC_ATL_PTD_DONEMAP_REG (0xB0<<1) /* ATL PTD Last PTD Register */
#define HC_ATL_PTD_SKIPMAP_REG (0xB2<<1) /* ATL PTD Last PTD Register */
#define HC_ATL_PTD_LASTPTD_REG (0xB4<<1) /* ATL PTD Last PTD Register */
/*General Purpose Registers */
#define HC_HW_MODE_REG (0x0C<<1) /* H/W Mode Register */
#define HC_CHIP_ID_REG (0x70<<1) /* Chip ID Register */
#define HC_SCRATCH_REG (0x78<<1) /* Scratch Register */
#define HC_RESET_REG (0xB8<<1) /* HC Reset Register */
#define HC_HWMODECTRL_REG (0xB6<<1)
#define HC_UNLOCK_DEVICE (0x7C<<1)
/* Interrupt Registers */
#define HC_INTERRUPT_REG (0xD4<<1) /* Interrupt Register */
#define HC_INTENABLE_REG (0xD6<<1) /* Interrupt enable Register */
#define HC_ISO_IRQ_MASK_OR_REG (0xD8<<1) /* ISO Mask OR Register */
#define HC_INT_IRQ_MASK_OR_REG (0xDA<<1) /* INT Mask OR Register */
#define HC_ATL_IRQ_MASK_OR_REG (0xDC<<1) /* ATL Mask OR Register */
#define HC_ISO_IRQ_MASK_AND_REG (0xDE<<1) /* ISO Mask AND Register */
#define HC_INT_IRQ_MASK_AND_REG (0xE0<<1) /* INT Mask AND Register */
#define HC_ATL_IRQ_MASK_AND_REG (0xE2<<1) /* ATL Mask AND Register */
/*power control reg */
#define HC_POWER_DOWN_CONTROL_REG (0xD0<<1)
/*RAM Registers */
#define HC_DMACONFIG_REG (0xBC<<1) /* DMA Config Register */
#define HC_MEM_READ_REG (0xC4<<1) /* Memory Register */
#define HC_DATA_REG (0xC6<<1) /* Data Register */
#define OTG_CTRL_SET_REG (0xE4<<1)
#define OTG_CTRL_CLEAR_REG (0xE6<<1)
#define OTG_SOURCE_REG (0xE8<<1)
#define OTG_INTR_EN_F_SET_REG (0xF0<<1)
#define OTG_INTR_EN_R_SET_REG (0xF4<<1) /* OTG Interrupt Enable Rise register */
#else
#define HC_SPARAMS_REG 0x04 /* Structural Parameters Register */
#define HC_CPARAMS_REG 0x08 /* Capability Parameters Register */
#define HC_USBCMD_REG 0x8C /* USB Command Register */
#define HC_USBSTS_REG 0x90 /* USB Status Register */
#define HC_INTERRUPT_REG_EHCI 0x94 /* INterrupt Enable Register */
#define HC_FRINDEX_REG 0x98 /* Frame Index Register */
#define HC_CONFIGFLAG_REG 0x9C /* Conigured Flag Register */
#define HC_PORTSC1_REG 0xA0 /* Port Status Control for Port1 */
/*ISO Transfer Registers */
#define HC_ISO_PTD_DONEMAP_REG 0xA4 /* ISO PTD Done Map Register */
#define HC_ISO_PTD_SKIPMAP_REG 0xA6 /* ISO PTD Skip Map Register */
#define HC_ISO_PTD_LASTPTD_REG 0xA8 /* ISO PTD Last PTD Register */
/*INT Transfer Registers */
#define HC_INT_PTD_DONEMAP_REG 0xAA /* INT PTD Done Map Register */
#define HC_INT_PTD_SKIPMAP_REG 0xAC /* INT PTD Skip Map Register */
#define HC_INT_PTD_LASTPTD_REG 0xAE /* INT PTD Last PTD Register */
/*ATL Transfer Registers */
#define HC_ATL_PTD_DONEMAP_REG 0xB0 /* ATL PTD Last PTD Register */
#define HC_ATL_PTD_SKIPMAP_REG 0xB2 /* ATL PTD Last PTD Register */
#define HC_ATL_PTD_LASTPTD_REG 0xB4 /* ATL PTD Last PTD Register */
/*General Purpose Registers */
#define HC_HW_MODE_REG 0x0C //0xB6 /* H/W Mode Register */
#define HC_CHIP_ID_REG 0x70 /* Chip ID Register */
#define HC_SCRATCH_REG 0x78 /* Scratch Register */
#define HC_RESET_REG 0xB8 /* HC Reset Register */
#define HC_HWMODECTRL_REG 0xB6 //0x0C /* H/W Mode control Register */
#define HC_UNLOCK_DEVICE 0x7C
/* Interrupt Registers */
#define HC_INTERRUPT_REG 0xD4 /* Interrupt Register */
#define HC_INTENABLE_REG 0xD6 /* Interrupt enable Register */
#define HC_ISO_IRQ_MASK_OR_REG 0xD8 /* ISO Mask OR Register */
#define HC_INT_IRQ_MASK_OR_REG 0xDA /* INT Mask OR Register */
#define HC_ATL_IRQ_MASK_OR_REG 0xDC /* ATL Mask OR Register */
#define HC_ISO_IRQ_MASK_AND_REG 0xDE /* ISO Mask AND Register */
#define HC_INT_IRQ_MASK_AND_REG 0xE0 /* INT Mask AND Register */
#define HC_ATL_IRQ_MASK_AND_REG 0xE2 /* ATL Mask AND Register */
/*power control reg */
#define HC_POWER_DOWN_CONTROL_REG 0xD0
/*RAM Registers */
#define HC_DMACONFIG_REG 0xBC /* DMA Config Register */
#define HC_MEM_READ_REG 0xC4 /* Memory Register */
#define HC_DATA_REG 0xC6 /* Data Register */
#define OTG_CTRL_SET_REG 0xE4
#define OTG_CTRL_CLEAR_REG 0xE6
#define OTG_SOURCE_REG 0xE8
#define OTG_INTR_EN_F_SET_REG 0xF0 /* OTG Interrupt Enable Fall register */
#define OTG_INTR_EN_R_SET_REG 0xF4 /* OTG Interrupt Enable Rise register */
#endif
#define OTG_CTRL_DPPULLUP 0x0001
#define OTG_CTRL_DPPULLDOWN 0x0002
#define OTG_CTRL_DMPULLDOWN 0x0004
#define OTG_CTRL_VBUS_DRV 0x0010
#define OTG_CTRL_VBUS_DISCHRG 0x0020
#define OTG_CTRL_VBUS_CHRG 0x0040
#define OTG_CTRL_SW_SEL_HC_DC 0x0080
#define OTG_CTRL_BDIS_ACON_EN 0x0100
#define OTG_CTRL_OTG_SE0_EN 0x0200
#define OTG_CTRL_OTG_DISABLE 0x0400
#define OTG_CTRL_VBUS_DRV_PORT2 0x1000
#define OTG_CTRL_SW_SEL_HC_2 0x8000
/*interrupt count and buffer status register*/
#ifdef PXA300
#define HC_BUFFER_STATUS_REG (0xBA<<1)
#define HC_INT_THRESHOLD_REG (0xC8<<1)
#else
#define HC_BUFFER_STATUS_REG 0xBA
#define HC_INT_THRESHOLD_REG 0xC8
#endif
#define HC_OTG_INTERRUPT 0x400
#ifdef PXA300
#define DC_CHIPID (0x70<<1)
#else
#define DC_CHIPID 0x70
#endif
#ifdef PXA300
#define FPGA_CONFIG_REG (0x100<<1)
#else
#define FPGA_CONFIG_REG 0x100
#endif
#define HC_HW_MODE_GOBAL_INTR_ENABLE 0x01
#define HC_HW_MODE_INTR_EDGE 0x02
#define HC_HW_MODE_INTR_POLARITY_HIGH 0x04
#define HC_HW_MODE_LOCK 0x08
#define HC_HW_MODE_DATABUSWIDTH_8 0x10
#define HC_HW_MODE_DREQ_POL_HIGH 0x20
#define HC_HW_MODE_DACK_POL_HIGH 0x40
#define HC_HW_MODE_COMN_INT 0x80
struct isp1763_driver;
typedef struct _isp1763_id {
u16 idVendor;
u16 idProduct;
u32 driver_info;
} isp1763_id;
typedef struct isp1763_dev {
/*added for pci device */
#ifdef NON_PCI
struct platform_device *dev;
#else /*PCI*/
struct pci_dev *pcidev;
#endif
struct isp1763_driver *driver; /* which driver has allocated this device */
void *driver_data; /* data private to the host controller driver */
void *otg_driver_data; /*data private for otg controler */
unsigned char index; /* local controller (HC/DC/OTG) */
unsigned int irq; /*Interrupt Channel allocated for this device */
void (*handler) (struct isp1763_dev * dev, void *isr_data); /* Interrupt Serrvice Routine */
void *isr_data; /* isr data of the driver */
unsigned long int_reg; /* Interrupt register */
unsigned long alt_int_reg; /* Interrupt register 2 */
unsigned long start;
unsigned long length;
struct resource *mem_res;
unsigned long io_base; /* Start Io address space for this device */
unsigned long io_len; /* IO address space length for this device */
unsigned long chip_id; /* Chip Id */
char name[80]; /* device name */
int active; /* device status */
/* DMA resources should come here */
unsigned long dma;
u8 *baseaddress; /*base address for i/o ops */
u8 *dmabase;
isp1763_id *id;
} isp1763_dev_t;
typedef struct isp1763_driver {
char *name;
unsigned long index; /* HC or DC or OTG */
isp1763_id *id; /*device ids */
int (*probe) (struct isp1763_dev * dev, isp1763_id * id); /* New device inserted */
void (*remove) (struct isp1763_dev * dev); /* Device removed (NULL if not a hot-plug capable driver) */
void (*suspend) (struct isp1763_dev * dev); /* Device suspended */
void (*resume) (struct isp1763_dev * dev); /* Device woken up */
void (*remotewakeup) (struct isp1763_dev *dev); /* Remote Wakeup */
void (*powerup) (struct isp1763_dev *dev); /* Device poweup mode */
void (*powerdown) (struct isp1763_dev *dev); /* Device power down mode */
} isp_1763_driver_t;
struct usb_device *phci_register_otg_device(struct isp1763_dev *dev);
/*otg exported function from host*/
int phci_suspend_otg_port(struct isp1763_dev *dev, u32 command);
int phci_enumerate_otg_port(struct isp1763_dev *dev, u32 command);
extern int isp1763_register_driver(struct isp1763_driver *drv);
extern void isp1763_unregister_driver(struct isp1763_driver *drv);
extern int isp1763_request_irq(void (*handler)(struct isp1763_dev * dev, void *isr_data),
struct isp1763_dev *dev, void *isr_data);
extern void isp1763_free_irq(struct isp1763_dev *dev, void *isr_data);
extern u32 isp1763_reg_read32(isp1763_dev_t * dev, u16 reg, u32 data);
extern u16 isp1763_reg_read16(isp1763_dev_t * dev, u16 reg, u16 data);
extern u8 isp1763_reg_read8(struct isp1763_dev *dev, u16 reg, u8 data);
extern void isp1763_reg_write32(isp1763_dev_t * dev, u16 reg, u32 data);
extern void isp1763_reg_write16(isp1763_dev_t * dev, u16 reg, u16 data);
extern void isp1763_reg_write8(struct isp1763_dev *dev, u16 reg, u8 data);
extern int isp1763_mem_read(isp1763_dev_t * dev, u32 start_add,
u32 end_add, u32 * buffer, u32 length, u16 dir);
extern int isp1763_mem_write(isp1763_dev_t * dev, u32 start_add,
u32 end_add, u32 * buffer, u32 length, u16 dir);
#endif /* __HAL_INTF_H__ */

748
kernel/drivers/usb/host/pehci/hal/hal_msm.c Normal file
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/*
* Copyright (C) ST-Ericsson AP Pte Ltd 2010
*
* ISP1763 Linux HCD Controller driver : hal
*
* This program is free software; you can redistribute it and/or modify it under the terms of
* the GNU General Public License as published by the Free Software Foundation; version
* 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT ANY
* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
* details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
* This is the main hardware abstraction layer file. Hardware initialization, interupt
* processing and read/write routines are handled here.
*
* Author : wired support <wired.support@stericsson.com>
*
*/
#include <linux/module.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/sched.h>
#include <linux/completion.h>
#include <linux/slab.h>
#include <linux/smp_lock.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/timer.h>
#include <linux/list.h>
#include <linux/interrupt.h>
#include <linux/usb.h>
#include <linux/gpio.h>
#include <mach/board.h>
#include <linux/poll.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/unaligned.h>
/*--------------------------------------------------------------*
* linux system include files
*--------------------------------------------------------------*/
#include "hal_msm.h"
#include "../hal/hal_intf.h"
#include "../hal/isp1763.h"
/*--------------------------------------------------------------*
* Local variable Definitions
*--------------------------------------------------------------*/
struct isp1763_dev isp1763_loc_dev[ISP1763_LAST_DEV];
/*--------------------------------------------------------------*
* Local # Definitions
*--------------------------------------------------------------*/
#define PCI_ACCESS_RETRY_COUNT 20
#define ISP1763_DRIVER_NAME "isp1763_usb"
/*--------------------------------------------------------------*
* Local Function
*--------------------------------------------------------------*/
static int __devexit isp1763_remove(struct platform_device *pdev);
static int __devinit isp1763_probe(struct platform_device *pdev);
/*--------------------------------------------------------------*
* Platform Driver Interface Functions
*--------------------------------------------------------------*/
static struct platform_driver isp1763_usb_driver = {
.remove = __exit_p(isp1763_remove),
.driver = {
.name = ISP1763_DRIVER_NAME,
.owner = THIS_MODULE,
},
};
/*--------------------------------------------------------------*
* ISP1763 Read write routine
*--------------------------------------------------------------*/
/*
* EBI2 on 8660 ignores the first bit and shifts the address by
* one bit to the right.
* Hence, shift left all the register addresses before accessing
* them over EBI2.
* This logic applies only for the register read/writes, for
* read/write from ISP memory this conversion is not needed
* as the ISP obtains the memory address from 'memory' register
*/
/* Write a 32 bit Register of isp1763 */
void
isp1763_reg_write32(struct isp1763_dev *dev, u16 reg, u32 data)
{
/* Write the 32bit to the register address given to us */
reg <<= 1;
#ifdef DATABUS_WIDTH_16
writew((u16) data, dev->baseaddress + ((reg)));
writew((u16) (data >> 16), dev->baseaddress + (((reg + 4))));
#else
writeb((u8) data, dev->baseaddress + (reg));
writeb((u8) (data >> 8), dev->baseaddress + ((reg + 1)));
writeb((u8) (data >> 16), dev->baseaddress + ((reg + 2)));
writeb((u8) (data >> 24), dev->baseaddress + ((reg + 3)));
#endif
}
EXPORT_SYMBOL(isp1763_reg_write32);
/* Read a 32 bit Register of isp1763 */
u32
isp1763_reg_read32(struct isp1763_dev *dev, u16 reg, u32 data)
{
#ifdef DATABUS_WIDTH_16
u16 wvalue1, wvalue2;
#else
u8 bval1, bval2, bval3, bval4;
#endif
data = 0;
reg <<= 1;
#ifdef DATABUS_WIDTH_16
wvalue1 = readw(dev->baseaddress + ((reg)));
wvalue2 = readw(dev->baseaddress + (((reg + 4))));
data |= wvalue2;
data <<= 16;
data |= wvalue1;
#else
bval1 = readb(dev->baseaddress + (reg));
bval2 = readb(dev->baseaddress + (reg + 1));
bval3 = readb(dev->baseaddress + (reg + 2));
bval4 = readb(dev->baseaddress + (reg + 3));
data = 0;
data |= bval4;
data <<= 8;
data |= bval3;
data <<= 8;
data |= bval2;
data <<= 8;
data |= bval1;
#endif
return data;
}
EXPORT_SYMBOL(isp1763_reg_read32);
/* Read a 16 bit Register of isp1763 */
u16
isp1763_reg_read16(struct isp1763_dev * dev, u16 reg, u16 data)
{
reg <<= 1;
#ifdef DATABUS_WIDTH_16
data = readw(dev->baseaddress + ((reg)));
#else
u8 bval1, bval2;
bval1 = readb(dev->baseaddress + (reg));
if (reg == HC_DATA_REG){
bval2 = readb(dev->baseaddress + (reg));
} else {
bval2 = readb(dev->baseaddress + ((reg + 1)));
}
data = 0;
data |= bval2;
data <<= 8;
data |= bval1;
#endif
return data;
}
EXPORT_SYMBOL(isp1763_reg_read16);
/* Write a 16 bit Register of isp1763 */
void
isp1763_reg_write16(struct isp1763_dev *dev, u16 reg, u16 data)
{
reg <<= 1;
#ifdef DATABUS_WIDTH_16
writew(data, dev->baseaddress + ((reg)));
#else
writeb((u8) data, dev->baseaddress + (reg));
if (reg == HC_DATA_REG){
writeb((u8) (data >> 8), dev->baseaddress + (reg));
}else{
writeb((u8) (data >> 8), dev->baseaddress + ((reg + 1)));
}
#endif
}
EXPORT_SYMBOL(isp1763_reg_write16);
/* Read a 8 bit Register of isp1763 */
u8
isp1763_reg_read8(struct isp1763_dev *dev, u16 reg, u8 data)
{
reg <<= 1;
data = readb((dev->baseaddress + (reg)));
return data;
}
EXPORT_SYMBOL(isp1763_reg_read8);
/* Write a 8 bit Register of isp1763 */
void
isp1763_reg_write8(struct isp1763_dev *dev, u16 reg, u8 data)
{
reg <<= 1;
writeb(data, (dev->baseaddress + (reg)));
}
EXPORT_SYMBOL(isp1763_reg_write8);
/*--------------------------------------------------------------*
*
* Module dtatils: isp1763_mem_read
*
* Memory read using PIO method.
*
* Input: struct isp1763_driver *drv --> Driver structure.
* u32 start_add --> Starting address of memory
* u32 end_add ---> End address
*
* u32 * buffer --> Buffer pointer.
* u32 length ---> Length
* u16 dir ---> Direction ( Inc or Dec)
*
* Output int Length ----> Number of bytes read
*
* Called by: system function
*
*
*--------------------------------------------------------------*/
/* Memory read function PIO */
int
isp1763_mem_read(struct isp1763_dev *dev, u32 start_add,
u32 end_add, u32 * buffer, u32 length, u16 dir)
{
u8 *one = (u8 *) buffer;
u16 *two = (u16 *) buffer;
u32 a = (u32) length;
u32 w;
u32 w2;
if (buffer == 0) {
printk("Buffer address zero\n");
return 0;
}
isp1763_reg_write16(dev, HC_MEM_READ_REG, start_add);
/* This delay requirement comes from the ISP1763A programming guide */
ndelay(100);
last:
w = isp1763_reg_read16(dev, HC_DATA_REG, w);
w2 = isp1763_reg_read16(dev, HC_DATA_REG, w);
w2 <<= 16;
w = w | w2;
if (a == 1) {
*one = (u8) w;
return 0;
}
if (a == 2) {
*two = (u16) w;
return 0;
}
if (a == 3) {
*two = (u16) w;
two += 1;
w >>= 16;
*two = (u8) (w);
return 0;
}
while (a > 0) {
*buffer = w;
a -= 4;
if (a <= 0) {
break;
}
if (a < 4) {
buffer += 1;
one = (u8 *) buffer;
two = (u16 *) buffer;
goto last;
}
buffer += 1;
w = isp1763_reg_read16(dev, HC_DATA_REG, w);
w2 = isp1763_reg_read16(dev, HC_DATA_REG, w);
w2 <<= 16;
w = w | w2;
}
return ((a < 0) || (a == 0)) ? 0 : (-1);
}
EXPORT_SYMBOL(isp1763_mem_read);
/*--------------------------------------------------------------*
*
* Module dtatils: isp1763_mem_write
*
* Memory write using PIO method.
*
* Input: struct isp1763_driver *drv --> Driver structure.
* u32 start_add --> Starting address of memory
* u32 end_add ---> End address
*
* u32 * buffer --> Buffer pointer.
* u32 length ---> Length
* u16 dir ---> Direction ( Inc or Dec)
*
* Output int Length ----> Number of bytes read
*
* Called by: system function
*
*
*--------------------------------------------------------------*/
/* Memory read function IO */
int
isp1763_mem_write(struct isp1763_dev *dev,
u32 start_add, u32 end_add, u32 * buffer, u32 length, u16 dir)
{
int a = length;
u8 one = (u8) (*buffer);
u16 two = (u16) (*buffer);
isp1763_reg_write16(dev, HC_MEM_READ_REG, start_add);
/* This delay requirement comes from the ISP1763A programming guide */
ndelay(100);
if (a == 1) {
isp1763_reg_write16(dev, HC_DATA_REG, one);
return 0;
}
if (a == 2) {
isp1763_reg_write16(dev, HC_DATA_REG, two);
return 0;
}
while (a > 0) {
isp1763_reg_write16(dev, HC_DATA_REG, (u16) (*buffer));
if (a >= 3)
isp1763_reg_write16(dev, HC_DATA_REG,
(u16) ((*buffer) >> 16));
start_add += 4;
a -= 4;
if (a <= 0)
break;
buffer += 1;
}
return ((a < 0) || (a == 0)) ? 0 : (-1);
}
EXPORT_SYMBOL(isp1763_mem_write);
/*--------------------------------------------------------------*
*
* Module dtatils: isp1763_register_driver
*
* This function is used by top driver (OTG, HCD, DCD) to register
* their communication functions (probe, remove, suspend, resume) using
* the drv data structure.
* This function will call the probe function of the driver if the ISP1763
* corresponding to the driver is enabled
*
* Input: struct isp1763_driver *drv --> Driver structure.
* Output result
* 0= complete
* 1= error.
*
* Called by: system function module_init
*
*
*--------------------------------------------------------------*/
int
isp1763_register_driver(struct isp1763_driver *drv)
{
struct isp1763_dev *dev;
int result = -EINVAL;
hal_entry("%s: Entered\n", __FUNCTION__);
info("isp1763_register_driver(drv=%p)\n", drv);
if (!drv) {
return -EINVAL;
}
dev = &isp1763_loc_dev[drv->index];
if (!dev->baseaddress)
return -EINVAL;
dev->active = 1; /* set the driver as active*/
if (drv->probe) {
result = drv->probe(dev, drv->id);
} else {
printk("%s no probe function for indes %d \n", __FUNCTION__,
(int)drv->index);
}
if (result >= 0) {
pr_debug(KERN_INFO __FILE__ ": Registered Driver %s\n",
drv->name);
dev->driver = drv;
}
hal_entry("%s: Exit\n", __FUNCTION__);
return result;
} /* End of isp1763_register_driver */
EXPORT_SYMBOL(isp1763_register_driver);
/*--------------------------------------------------------------*
*
* Module dtatils: isp1763_unregister_driver
*
* This function is used by top driver (OTG, HCD, DCD) to de-register
* their communication functions (probe, remove, suspend, resume) using
* the drv data structure.
* This function will check whether the driver is registered or not and
* call the remove function of the driver if registered
*
* Input: struct isp1763_driver *drv --> Driver structure.
* Output result
* 0= complete
* 1= error.
*
* Called by: system function module_init
*
*
*--------------------------------------------------------------*/
void
isp1763_unregister_driver(struct isp1763_driver *drv)
{
struct isp1763_dev *dev;
hal_entry("%s: Entered\n", __FUNCTION__);
info("isp1763_unregister_driver(drv=%p)\n", drv);
dev = &isp1763_loc_dev[drv->index];
if (dev->driver == drv) {
/* driver registered is same as the requestig driver */
drv->remove(dev);
dev->driver = NULL;
info(": De-registered Driver %s\n", drv->name);
return;
}
hal_entry("%s: Exit\n", __FUNCTION__);
} /* End of isp1763_unregister_driver */
EXPORT_SYMBOL(isp1763_unregister_driver);
/*--------------------------------------------------------------*
* ISP1763 Platform driver interface routine.
*--------------------------------------------------------------*/
/*--------------------------------------------------------------*
*
* Module dtatils: isp1763_module_init
*
* This is the module initialization function. It registers to
* driver for a isp1763 platform device. And also resets the
* internal data structures.
*
* Input: void
* Output result
* 0= complete
* 1= error.
*
* Called by: system function module_init
*
*
*
-------------------------------------------------------------------*/
static int __init
isp1763_module_init(void)
{
int result = 0;
hal_entry("%s: Entered\n", __FUNCTION__);
pr_debug(KERN_NOTICE "+isp1763_module_init\n");
memset(isp1763_loc_dev, 0, sizeof(isp1763_loc_dev));
result = platform_driver_probe(&isp1763_usb_driver, isp1763_probe);
pr_debug(KERN_NOTICE "-isp1763_module_init\n");
hal_entry("%s: Exit\n", __FUNCTION__);
return result;
}
/*--------------------------------------------------------------*
*
* Module dtatils: isp1763_module_cleanup
*
* This is the module cleanup function. It de-registers the
* Platform driver and resets the internal data structures.
*
* Input: void
* Output void
*
* Called by: system function module_cleanup
*
*
*
--------------------------------------------------------------*/
static void __exit
isp1763_module_cleanup(void)
{
pr_debug("Hal Module Cleanup\n");
platform_driver_unregister(&isp1763_usb_driver);
memset(isp1763_loc_dev, 0, sizeof(isp1763_loc_dev));
}
void dummy_mem_read(struct isp1763_dev *dev)
{
u32 w = 0;
isp1763_reg_write16(dev, HC_MEM_READ_REG, 0x0400);
w = isp1763_reg_read16(dev, HC_DATA_REG, w);
pr_debug("dummy_read DONE: %x\n", w);
msleep(10);
}
/*--------------------------------------------------------------*
*
* Module dtatils: isp1763_probe
*
* probe function of ISP1763
* This function is called from module_init if the corresponding platform
* device is present. This function initializes the information
* for the Host Controller with the assigned resources and tests the register
* access to the controller and do a software reset and makes it ready
* for the driver to play with. It also calls setup_gpio passed from pdata
* to setup GPIOs (e.g. used for IRQ and RST lines).
*
* Input:
* struct platform_device *dev ----> Platform Device structure
* Output void
*
* Called by: system function module_cleanup
*
*
*
--------------------------------------------------------------**/
static int __devinit
isp1763_probe(struct platform_device *pdev)
{
u32 reg_data = 0;
struct isp1763_dev *loc_dev;
int status = 1;
u32 hwmodectrl = 0;
u16 us_reset_hc = 0;
u32 chipid = 0;
struct isp1763_platform_data *pdata = pdev->dev.platform_data;
hal_entry("%s: Entered\n", __FUNCTION__);
hal_init(("isp1763_probe(dev=%p)\n", dev));
loc_dev = &(isp1763_loc_dev[ISP1763_HC]);
loc_dev->dev = pdev;
/* Get the Host Controller IO and INT resources */
loc_dev->mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!loc_dev->mem_res) {
pr_err("%s: failed to get platform resource mem\n", __func__);
return -ENODEV;
}
loc_dev->baseaddress = ioremap_nocache(loc_dev->mem_res->start,
resource_size(loc_dev->mem_res));
if (!loc_dev->baseaddress) {
pr_err("%s: ioremap failed\n", __func__);
status = -ENOMEM;
goto put_mem_res;
}
pr_info("%s: ioremap done at: %x\n", __func__,
(int)loc_dev->baseaddress);
loc_dev->irq = platform_get_irq(pdev, 0);
if (!loc_dev->irq) {
pr_err("%s: platform_get_irq failed\n", __func__);
status = -ENODEV;
goto free_regs;
}
loc_dev->index = ISP1763_HC; /*zero */
loc_dev->length = resource_size(loc_dev->mem_res);
hal_init(("isp1763 HC MEM Base= %p irq = %d\n",
loc_dev->baseaddress, loc_dev->irq));
/* Setup GPIOs and isssue RESET_N to Controller */
if (pdata->setup_gpio)
if (pdata->setup_gpio(1))
pr_err("%s: Failed to setup GPIOs for isp1763\n",
__func__);
if (pdata->reset_gpio) {
gpio_set_value(pdata->reset_gpio, 0);
msleep(10);
gpio_set_value(pdata->reset_gpio, 1);
} else {
pr_err("%s: Failed to issue RESET_N to isp1763\n", __func__);
}
dummy_mem_read(loc_dev);
chipid = isp1763_reg_read32(loc_dev, DC_CHIPID, chipid);
pr_info("START: chip id:%x\n", chipid);
/*reset the host controller */
pr_debug("RESETTING\n");
us_reset_hc |= 0x1;
isp1763_reg_write16(loc_dev, 0xB8, us_reset_hc);
msleep(20);
us_reset_hc = 0;
us_reset_hc |= 0x2;
isp1763_reg_write16(loc_dev, 0xB8, us_reset_hc);
chipid = isp1763_reg_read32(loc_dev, DC_CHIPID, chipid);
pr_info("after HC reset, chipid:%x\n", chipid);
msleep(20);
hwmodectrl = isp1763_reg_read16(loc_dev, HC_HWMODECTRL_REG, hwmodectrl);
pr_debug("Mode Ctrl Value b4 setting buswidth: %x\n", hwmodectrl);
#ifdef DATABUS_WIDTH_16
hwmodectrl &= 0xFFEF; /*enable the 16 bit bus */
#else
pr_debug("Setting 8-BIT mode\n");
hwmodectrl |= 0x0010; /*enable the 8 bit bus */
#endif
isp1763_reg_write16(loc_dev, HC_HWMODECTRL_REG, hwmodectrl);
pr_debug("writing 0x%x to hw mode reg\n", hwmodectrl);
hwmodectrl = isp1763_reg_read16(loc_dev, HC_HWMODECTRL_REG, hwmodectrl);
msleep(100);
pr_debug("Mode Ctrl Value after setting buswidth: %x\n", hwmodectrl);
chipid = isp1763_reg_read32(loc_dev, DC_CHIPID, chipid);
pr_debug("after setting HW MODE to 8bit, chipid:%x\n", chipid);
hal_init(("isp1763 DC MEM Base= %lx irq = %d\n",
loc_dev->io_base, loc_dev->irq));
reg_data = isp1763_reg_read16(loc_dev, HC_SCRATCH_REG, reg_data);
pr_debug("Scratch register is 0x%x\n", reg_data);
reg_data = 0xABCD;
isp1763_reg_write16(loc_dev, HC_SCRATCH_REG, reg_data);
reg_data = isp1763_reg_read16(loc_dev, HC_SCRATCH_REG, reg_data);
pr_debug("After write, Scratch register is 0x%x\n", reg_data);
if (reg_data != 0xABCD) {
pr_err("%s: Scratch register write mismatch!!\n", __func__);
status = -ENODEV;
goto free_gpios;
}
memcpy(loc_dev->name, ISP1763_DRIVER_NAME, sizeof(ISP1763_DRIVER_NAME));
loc_dev->name[sizeof(ISP1763_DRIVER_NAME)] = 0;
pr_debug(KERN_NOTICE "-isp1763_pci_probe\n");
hal_entry("%s: Exit\n", __FUNCTION__);
return 0;
free_gpios:
if (pdata->setup_gpio)
pdata->setup_gpio(0);
free_regs:
iounmap(loc_dev->baseaddress);
put_mem_res:
loc_dev->baseaddress = NULL;
hal_entry("%s: Exit\n", __FUNCTION__);
return status;
} /* End of isp1763_probe */
/*--------------------------------------------------------------*
*
* Module details: isp1763_remove
*
* cleanup function of ISP1763
* This functions de-initializes the local variables, frees GPIOs
* and releases memory resource.
*
* Input:
* struct platform_device *dev ----> Platform Device structure
*
* Output void
*
* Called by: system function module_cleanup
*
*
*
--------------------------------------------------------------*/
static int __devexit
isp1763_remove(struct platform_device *pdev)
{
struct isp1763_dev *loc_dev;
struct isp1763_platform_data *pdata = pdev->dev.platform_data;
hal_init(("isp1763_pci_remove(dev=%p)\n", dev));
loc_dev = &isp1763_loc_dev[ISP1763_HC];
iounmap(loc_dev->baseaddress);
loc_dev->baseaddress = NULL;
if (pdata->setup_gpio)
return pdata->setup_gpio(0);
return 0;
} /* End of isp1763_remove */
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
module_init(isp1763_module_init);
module_exit(isp1763_module_cleanup);

85
kernel/drivers/usb/host/pehci/hal/hal_msm.h Normal file
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/*
* Copyright (C) ST-Ericsson AP Pte Ltd 2010
*
* ISP1763 Linux OTG Controller driver : hal
*
* This program is free software; you can redistribute it and/or modify it under the terms of
* the GNU General Public License as published by the Free Software Foundation; version
* 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT ANY
* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
* details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
* This is a hardware abstraction layer header file.
*
* Author : wired support <wired.support@stericsson.com>
*
*/
#ifndef HAL_X86_H
#define HAL_X86_H
#define DRIVER_AUTHOR "ST-ERICSSON "
#define DRIVER_DESC "ISP1763 bus driver"
/* Driver tuning, per ST-ERICSSON requirements: */
#define MEM_TO_CHECK 4096 /*bytes, must be multiple of 2 */
/* BIT defines */
#define BIT0 (1 << 0)
#define BIT1 (1 << 1)
#define BIT2 (1 << 2)
#define BIT3 (1 << 3)
#define BIT4 (1 << 4)
#define BIT5 (1 << 5)
#define BIT6 (1 << 6)
#define BIT7 (1 << 7)
#define BIT8 (1 << 8)
#define BIT9 (1 << 9)
#define BIT10 (1 << 10)
#define BIT11 (1 << 11)
#define BIT12 (1 << 12)
#define BIT13 (1 << 13)
#define BIT14 (1 << 14)
#define BIT15 (1 << 15)
#define BIT16 (1 << 16)
#define BIT17 (1 << 17)
#define BIT18 (1 << 18)
#define BIT19 (1 << 19)
#define BIT20 (1 << 20)
#define BIT21 (1 << 21)
#define BIT22 (1 << 22)
#define BIT23 (1 << 23)
#define BIT24 (1 << 24)
#define BIT25 (1 << 26)
#define BIT27 (1 << 27)
#define BIT28 (1 << 28)
#define BIT29 (1 << 29)
#define BIT30 (1 << 30)
#define BIT31 (1 << 31)
/* Definitions Related to Chip Address and CPU Physical Address
* cpu_phy_add: CPU Physical Address , it uses 32 bit data per address
* chip_add : Chip Address, it uses double word(64) bit data per address
*/
#define chip_add(cpu_phy_add) (((cpu_phy_add) - 0x400) / 8)
#define cpu_phy_add(chip_add) ((8 * (chip_add)) + 0x400)
/* for getting end add, and start add, provided we have one address with us */
/* IMPORTANT length hex(base16) and dec(base10) works fine*/
#define end_add(start_add, length) (start_add + (length - 4))
#define start_add(end_add, length) (end_add - (length - 4))
/* Device Registers*/
#define DEV_UNLOCK_REGISTER 0x7C
#define DEV_INTERRUPT_REGISTER 0x18
#define INT_ENABLE_REGISTER 0x14
#endif /*_HAL_X86_H_ */

227
kernel/drivers/usb/host/pehci/hal/isp1763.h Normal file
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/*
* Copyright (C) ST-Ericsson AP Pte Ltd 2010
*
* ISP1763 Linux OTG Controller driver : hal
*
* This program is free software; you can redistribute it and/or modify it under the terms of
* the GNU General Public License as published by the Free Software Foundation; version
* 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT ANY
* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
* details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
* This is a hardware abstraction layer header file.
*
* Author : wired support <wired.support@stericsson.com>
*
*/
#ifndef ISP1763_H
#define ISP1763_H
/* For debugging option: ------------------- */
#define PTD_DUMP_SCHEDULE
#undef PTD_DUMP_SCHEDULE
#define PTD_DUMP_COMPLETE
#undef PTD_DUMP_COMPLETE
/* ------------------------------------*/
#define CONFIG_ISO_SUPPORT
#ifdef CONFIG_ISO_SUPPORT
#define ISO_DBG_ENTRY 1
#define ISO_DBG_EXIT 1
#define ISO_DBG_ADDR 1
#define ISO_DBG_DATA 1
#define ISO_DBG_ERR 1
#define ISO_DBG_INFO 1
#if 0 /* Set to 1 to enable isochronous debugging */
#define iso_dbg(category, format, arg...) \
do \
{ \
if(category) \
{ \
printk(format, ## arg); \
} \
} while(0)
#else
#define iso_dbg(category, format, arg...) while(0)
#endif
#endif /* CONFIG_ISO_SUPPORT */
/*Debug For Entry/Exit of the functions */
//#define HCD_DEBUG_LEVEL1
#ifdef HCD_DEBUG_LEVEL1
#define pehci_entry(format, args... ) printk(format, ##args)
#else
#define pehci_entry(format, args...) do { } while(0)
#endif
/*Debug for Port Info and Errors */
//#define HCD_DEBUG_LEVEL2
#ifdef HCD_DEBUG_LEVEL2
#define pehci_print(format, args... ) printk(format, ##args)
#else
#define pehci_print(format, args...) do { } while(0)
#endif
/*Debug For the Port changes and Enumeration */
//#define HCD_DEBUG_LEVEL3
#ifdef HCD_DEBUG_LEVEL3
#define pehci_info(format,arg...) printk(format, ##arg)
#else
#define pehci_info(format,arg...) do {} while (0)
#endif
/*Debug For Transfer flow */
// #define HCD_DEBUG_LEVEL4
#ifdef HCD_DEBUG_LEVEL4
#define pehci_check(format,args...) printk(format, ##args)
#else
#define pehci_check(format,args...)
#endif
/*******************END HOST CONTROLLER**********************************/
/*******************START DEVICE CONTROLLER******************************/
/* For MTP support */
#undef MTP_ENABLE /* Enable to add MTP support; But requires MTP class driver to be present to work */
/*For CHAPTER8 TEST */
#undef CHAPTER8_TEST /* Enable to Pass Chapter 8 Test */
/* Debug Entery/Exit of Function as well as some other Info */
//#define DEV_DEBUG_LEVEL2
#ifdef DEV_DEBUG_LEVEL2
#define dev_print(format,arg...) printk(format, ##arg)
#else
#define dev_print(format,arg...) do {} while (0)
#endif
/*Debug for Interrupt , Registers , device Enable/Disable and some other info */
//#define DEV_DEBUG_LEVEL3
#undef dev_info
#ifdef DEV_DEBUG_LEVEL3
#define dev_info(format,arg...) printk(format, ##arg)
#else
#define dev_info(format,arg...) do {} while (0)
#endif
/*Debug for Tranffer flow , Enumeration and Packet info */
//#define DEV_DEBUG_LEVEL4
#ifdef DEV_DEBUG_LEVEL4
#define dev_check(format,args...) printk(format, ##args)
#else
#define dev_check(format,args...) do{}while(0)
#endif
/*******************END DEVICE CONTROLLER********************************/
/*******************START MSCD*******************************************/
/*Debug Entery/Exit of Function as well as some other Information*/
//#define MSCD_DEBUG_LEVEL2
#ifdef MSCD_DEBUG_LEVEL2
#define mscd_print(format,arg...) printk(format, ##arg)
#else
#define mscd_print(format,arg...) do {} while (0)
#endif
/*Debug for Info */
//#define MSCD_DEBUG_LEVEL3
#ifdef MSCD_DEBUG_LEVEL3
#define mscd_info(format,arg...) printk(format, ##arg)
#else
#define mscd_info(format,arg...) do {} while (0)
#endif
/*******************END MSCD*********************************************/
/*******************START OTG CONTROLLER*********************************/
/*#define OTG */ /*undef for Device only and Host only */
#define ALL_FSM_FLAGS
/*Debug for Entry/Exit and Info */
/* #define OTG_DEBUG_LEVEL1 */
#ifdef OTG_DEBUG_LEVEL1
#define otg_entry(format, args... ) printk(format, ##args)
#else
#define otg_entry(format, args...) do { } while(0)
#endif
/*Debug for State Machine Flow */
/* #define OTG_DEBUG_LEVEL2 */
#ifdef OTG_DEBUG_LEVEL2
#define otg_print(format,arg...) printk(format, ##arg)
#else
#define otg_print(format,arg...) do {} while (0)
#endif
/*Debug for Info */
/* #define OTG_DEBUG_LEVEL3 */
#ifdef OTG_DEBUG_LEVEL3
#define otg_info(format,arg...) printk(format, ##arg)
#else
#define otg_info(format,arg...) do {} while (0)
#endif
/* #define OTG_DEBUG_LEVEL4 */
#ifdef OTG_DEBUG_LEVEL4
#define otg_printB(format,arg...) printk(format, ##arg)
#else
#define otg_printB(format,arg...) do {} while (0)
#endif
/*******************END OTG CONTROLLER***********************************/
/*******************START FOR HAL ***************************************/
#define info pr_debug
#define warn pr_warn
/*Debug For Entry and Exit of the functions */
#undef HAL_DEBUG_LEVEL1
#ifdef HAL_DEBUG_LEVEL1
#define hal_entry(format, args... ) printk(format, ##args)
#else
#define hal_entry(format, args...) do { } while(0)
#endif
/*Debug For Interrupt information */
#undef HAL_DEBUG_LEVEL2
#ifdef HAL_DEBUG_LEVEL2
#define hal_int(format, args... ) printk(format, ##args)
#else
#define hal_int(format, args...) do { } while(0)
#endif
/*Debug For HAL Initialisation and Mem Initialisation */
#undef HAL_DEBUG_LEVEL3
#ifdef HAL_DEBUG_LEVEL3
#define hal_init(format, args... ) printk(format, ##args)
#else
#define hal_init(format, args...) do { } while(0)
#endif
/*******************END FOR HAL*******************************************/
/*******************START FOR ALL CONTROLLERS*****************************/
/*#define CONFIG_USB_OTG */ /*undef for Device only and Host only */
/*#define ISP1763_DEVICE */
#ifdef CONFIG_USB_DEBUG
#define DEBUG
#else
#undef DEBUG
#endif
/*******************END FOR ALL CONTROLLERS*******************************/
#endif