tobi/M7350
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

M7350v1_en_gpl

Browse Source
This commit is contained in:
T
2024-09-09 08:52:07 +00:00
commit f9cc65cfda
65988 changed files with 26357421 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

43
kernel/arch/mips/include/asm/vr41xx/capcella.h Normal file
View File

@ -0,0 +1,43 @@
/*
* capcella.h, Include file for ZAO Networks Capcella.
*
* Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ZAO_CAPCELLA_H
#define __ZAO_CAPCELLA_H
#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
*/
#define PC104PLUS_INTA_PIN 2
#define PC104PLUS_INTB_PIN 3
#define PC104PLUS_INTC_PIN 4
#define PC104PLUS_INTD_PIN 5
/*
* Interrupt Number
*/
#define RTL8139_1_IRQ GIU_IRQ(PC104PLUS_INTC_PIN)
#define RTL8139_2_IRQ GIU_IRQ(PC104PLUS_INTD_PIN)
#define PC104PLUS_INTA_IRQ GIU_IRQ(PC104PLUS_INTA_PIN)
#define PC104PLUS_INTB_IRQ GIU_IRQ(PC104PLUS_INTB_PIN)
#define PC104PLUS_INTC_IRQ GIU_IRQ(PC104PLUS_INTC_PIN)
#define PC104PLUS_INTD_IRQ GIU_IRQ(PC104PLUS_INTD_PIN)
#endif /* __ZAO_CAPCELLA_H */

62
kernel/arch/mips/include/asm/vr41xx/giu.h Normal file
View File

@ -0,0 +1,62 @@
/*
* Include file for NEC VR4100 series General-purpose I/O Unit.
*
* Copyright (C) 2005-2009 Yoichi Yuasa <yuasa@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __NEC_VR41XX_GIU_H
#define __NEC_VR41XX_GIU_H
/*
* NEC VR4100 series GIU platform device IDs.
*/
enum {
GPIO_50PINS_PULLUPDOWN,
GPIO_36PINS,
GPIO_48PINS_EDGE_SELECT,
};
typedef enum {
IRQ_TRIGGER_LEVEL,
IRQ_TRIGGER_EDGE,
IRQ_TRIGGER_EDGE_FALLING,
IRQ_TRIGGER_EDGE_RISING,
} irq_trigger_t;
typedef enum {
IRQ_SIGNAL_THROUGH,
IRQ_SIGNAL_HOLD,
} irq_signal_t;
extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger,
irq_signal_t signal);
typedef enum {
IRQ_LEVEL_LOW,
IRQ_LEVEL_HIGH,
} irq_level_t;
extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level);
typedef enum {
GPIO_PULL_DOWN,
GPIO_PULL_UP,
GPIO_PULL_DISABLE,
} gpio_pull_t;
extern int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull);
#endif /* __NEC_VR41XX_GIU_H */

101
kernel/arch/mips/include/asm/vr41xx/irq.h Normal file
View File

@ -0,0 +1,101 @@
/*
* include/asm-mips/vr41xx/irq.h
*
* Interrupt numbers for NEC VR4100 series.
*
* Copyright (C) 1999 Michael Klar
* Copyright (C) 2001, 2002 Paul Mundt
* Copyright (C) 2002 MontaVista Software, Inc.
* Copyright (C) 2002 TimeSys Corp.
* Copyright (C) 2003-2006 Yoichi Yuasa <yuasa@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __NEC_VR41XX_IRQ_H
#define __NEC_VR41XX_IRQ_H
/*
* CPU core Interrupt Numbers
*/
#define MIPS_CPU_IRQ_BASE 0
#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
#define INT0_IRQ MIPS_CPU_IRQ(2)
#define INT1_IRQ MIPS_CPU_IRQ(3)
#define INT2_IRQ MIPS_CPU_IRQ(4)
#define INT3_IRQ MIPS_CPU_IRQ(5)
#define INT4_IRQ MIPS_CPU_IRQ(6)
#define TIMER_IRQ MIPS_CPU_IRQ(7)
/*
* SYINT1 Interrupt Numbers
*/
#define SYSINT1_IRQ_BASE 8
#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x))
#define BATTRY_IRQ SYSINT1_IRQ(0)
#define POWER_IRQ SYSINT1_IRQ(1)
#define RTCLONG1_IRQ SYSINT1_IRQ(2)
#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3)
/* RFU */
#define PIU_IRQ SYSINT1_IRQ(5)
#define AIU_IRQ SYSINT1_IRQ(6)
#define KIU_IRQ SYSINT1_IRQ(7)
#define GIUINT_IRQ SYSINT1_IRQ(8)
#define SIU_IRQ SYSINT1_IRQ(9)
#define BUSERR_IRQ SYSINT1_IRQ(10)
#define SOFTINT_IRQ SYSINT1_IRQ(11)
#define CLKRUN_IRQ SYSINT1_IRQ(12)
#define DOZEPIU_IRQ SYSINT1_IRQ(13)
#define SYSINT1_IRQ_LAST DOZEPIU_IRQ
/*
* SYSINT2 Interrupt Numbers
*/
#define SYSINT2_IRQ_BASE 24
#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x))
#define RTCLONG2_IRQ SYSINT2_IRQ(0)
#define LED_IRQ SYSINT2_IRQ(1)
#define HSP_IRQ SYSINT2_IRQ(2)
#define TCLOCK_IRQ SYSINT2_IRQ(3)
#define FIR_IRQ SYSINT2_IRQ(4)
#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */
#define DSIU_IRQ SYSINT2_IRQ(5)
#define PCI_IRQ SYSINT2_IRQ(6)
#define SCU_IRQ SYSINT2_IRQ(7)
#define CSI_IRQ SYSINT2_IRQ(8)
#define BCU_IRQ SYSINT2_IRQ(9)
#define ETHERNET_IRQ SYSINT2_IRQ(10)
#define SYSINT2_IRQ_LAST ETHERNET_IRQ
/*
* GIU Interrupt Numbers
*/
#define GIU_IRQ_BASE 40
#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
#define GIU_IRQ_LAST GIU_IRQ(31)
/*
* VRC4173 Interrupt Numbers
*/
#define VRC4173_IRQ_BASE 72
#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x))
#define VRC4173_USB_IRQ VRC4173_IRQ(0)
#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1)
#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2)
#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3)
#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4)
#define VRC4173_PIU_IRQ VRC4173_IRQ(5)
#define VRC4173_AIU_IRQ VRC4173_IRQ(6)
#define VRC4173_KIU_IRQ VRC4173_IRQ(7)
#define VRC4173_GIU_IRQ VRC4173_IRQ(8)
#define VRC4173_AC97_IRQ VRC4173_IRQ(9)
#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10)
/* RFU */
#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13)
#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ
#endif /* __NEC_VR41XX_IRQ_H */

37
kernel/arch/mips/include/asm/vr41xx/mpc30x.h Normal file
View File

@ -0,0 +1,37 @@
/*
* mpc30x.h, Include file for Victor MP-C303/304.
*
* Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __VICTOR_MPC30X_H
#define __VICTOR_MPC30X_H
#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
*/
#define VRC4173_PIN 1
#define MQ200_PIN 4
/*
* Interrupt Number
*/
#define VRC4173_CASCADE_IRQ GIU_IRQ(VRC4173_PIN)
#define MQ200_IRQ GIU_IRQ(MQ200_PIN)
#endif /* __VICTOR_MPC30X_H */

90
kernel/arch/mips/include/asm/vr41xx/pci.h Normal file
View File

@ -0,0 +1,90 @@
/*
* Include file for NEC VR4100 series PCI Control Unit.
*
* Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __NEC_VR41XX_PCI_H
#define __NEC_VR41XX_PCI_H
#define PCI_MASTER_ADDRESS_MASK 0x7fffffffU
struct pci_master_address_conversion {
uint32_t bus_base_address;
uint32_t address_mask;
uint32_t pci_base_address;
};
struct pci_target_address_conversion {
uint32_t address_mask;
uint32_t bus_base_address;
};
typedef enum {
CANNOT_LOCK_FROM_DEVICE,
CAN_LOCK_FROM_DEVICE,
} pci_exclusive_access_t;
struct pci_mailbox_address {
uint32_t base_address;
};
struct pci_target_address_window {
uint32_t base_address;
};
typedef enum {
PCI_ARBITRATION_MODE_FAIR,
PCI_ARBITRATION_MODE_ALTERNATE_0,
PCI_ARBITRATION_MODE_ALTERNATE_B,
} pci_arbiter_priority_control_t;
typedef enum {
PCI_TAKE_AWAY_GNT_DISABLE,
PCI_TAKE_AWAY_GNT_ENABLE,
} pci_take_away_gnt_mode_t;
struct pci_controller_unit_setup {
struct pci_master_address_conversion *master_memory1;
struct pci_master_address_conversion *master_memory2;
struct pci_target_address_conversion *target_memory1;
struct pci_target_address_conversion *target_memory2;
struct pci_master_address_conversion *master_io;
pci_exclusive_access_t exclusive_access;
uint32_t pci_clock_max;
uint8_t wait_time_limit_from_irdy_to_trdy; /* Only VR4122 is supported */
struct pci_mailbox_address *mailbox;
struct pci_target_address_window *target_window1;
struct pci_target_address_window *target_window2;
uint8_t master_latency_timer;
uint8_t retry_limit;
pci_arbiter_priority_control_t arbiter_priority_control;
pci_take_away_gnt_mode_t take_away_gnt_mode;
struct resource *mem_resource;
struct resource *io_resource;
};
extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup);
#endif /* __NEC_VR41XX_PCI_H */

58
kernel/arch/mips/include/asm/vr41xx/siu.h Normal file
View File

@ -0,0 +1,58 @@
/*
* Include file for NEC VR4100 series Serial Interface Unit.
*
* Copyright (C) 2005-2008 Yoichi Yuasa <yuasa@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __NEC_VR41XX_SIU_H
#define __NEC_VR41XX_SIU_H
#define SIU_PORTS_MAX 2
typedef enum {
SIU_INTERFACE_RS232C,
SIU_INTERFACE_IRDA,
} siu_interface_t;
extern void vr41xx_select_siu_interface(siu_interface_t interface);
typedef enum {
SIU_USE_IRDA,
FIR_USE_IRDA,
} irda_use_t;
extern void vr41xx_use_irda(irda_use_t use);
typedef enum {
SHARP_IRDA,
TEMIC_IRDA,
HP_IRDA,
} irda_module_t;
typedef enum {
IRDA_TX_1_5MBPS,
IRDA_TX_4MBPS,
} irda_speed_t;
extern void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed);
#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
extern void vr41xx_siu_early_setup(struct uart_port *port);
#else
static inline void vr41xx_siu_early_setup(struct uart_port *port) {}
#endif
#endif /* __NEC_VR41XX_SIU_H */

42
kernel/arch/mips/include/asm/vr41xx/tb0219.h Normal file
View File

@ -0,0 +1,42 @@
/*
* tb0219.h, Include file for TANBAC TB0219.
*
* Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@linux-mips.org>
*
* Modified for TANBAC TB0219:
* Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __TANBAC_TB0219_H
#define __TANBAC_TB0219_H
#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
*/
#define TB0219_PCI_SLOT1_PIN 2
#define TB0219_PCI_SLOT2_PIN 3
#define TB0219_PCI_SLOT3_PIN 4
/*
* Interrupt Number
*/
#define TB0219_PCI_SLOT1_IRQ GIU_IRQ(TB0219_PCI_SLOT1_PIN)
#define TB0219_PCI_SLOT2_IRQ GIU_IRQ(TB0219_PCI_SLOT2_PIN)
#define TB0219_PCI_SLOT3_IRQ GIU_IRQ(TB0219_PCI_SLOT3_PIN)
#endif /* __TANBAC_TB0219_H */

43
kernel/arch/mips/include/asm/vr41xx/tb0226.h Normal file
View File

@ -0,0 +1,43 @@
/*
* tb0226.h, Include file for TANBAC TB0226.
*
* Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __TANBAC_TB0226_H
#define __TANBAC_TB0226_H
#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
*/
#define GD82559_1_PIN 2
#define GD82559_2_PIN 3
#define UPD720100_INTA_PIN 4
#define UPD720100_INTB_PIN 8
#define UPD720100_INTC_PIN 13
/*
* Interrupt Number
*/
#define GD82559_1_IRQ GIU_IRQ(GD82559_1_PIN)
#define GD82559_2_IRQ GIU_IRQ(GD82559_2_PIN)
#define UPD720100_INTA_IRQ GIU_IRQ(UPD720100_INTA_PIN)
#define UPD720100_INTB_IRQ GIU_IRQ(UPD720100_INTB_PIN)
#define UPD720100_INTC_IRQ GIU_IRQ(UPD720100_INTC_PIN)
#endif /* __TANBAC_TB0226_H */

43
kernel/arch/mips/include/asm/vr41xx/tb0287.h Normal file
View File

@ -0,0 +1,43 @@
/*
* tb0287.h, Include file for TANBAC TB0287 mini-ITX board.
*
* Copyright (C) 2005 Media Lab Inc. <ito@mlb.co.jp>
*
* This code is largely based on tb0219.h.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __TANBAC_TB0287_H
#define __TANBAC_TB0287_H
#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
*/
#define TB0287_PCI_SLOT_PIN 2
#define TB0287_SM501_PIN 3
#define TB0287_SIL680A_PIN 8
#define TB0287_RTL8110_PIN 13
/*
* Interrupt Number
*/
#define TB0287_PCI_SLOT_IRQ GIU_IRQ(TB0287_PCI_SLOT_PIN)
#define TB0287_SM501_IRQ GIU_IRQ(TB0287_SM501_PIN)
#define TB0287_SIL680A_IRQ GIU_IRQ(TB0287_SIL680A_PIN)
#define TB0287_RTL8110_IRQ GIU_IRQ(TB0287_RTL8110_PIN)
#endif /* __TANBAC_TB0287_H */

152
kernel/arch/mips/include/asm/vr41xx/vr41xx.h Normal file
View File

@ -0,0 +1,152 @@
/*
* include/asm-mips/vr41xx/vr41xx.h
*
* Include file for NEC VR4100 series.
*
* Copyright (C) 1999 Michael Klar
* Copyright (C) 2001, 2002 Paul Mundt
* Copyright (C) 2002 MontaVista Software, Inc.
* Copyright (C) 2002 TimeSys Corp.
* Copyright (C) 2003-2008 Yoichi Yuasa <yuasa@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __NEC_VR41XX_H
#define __NEC_VR41XX_H
#include <linux/interrupt.h>
/*
* CPU Revision
*/
/* VR4122 0x00000c70-0x00000c72 */
#define PRID_VR4122_REV1_0 0x00000c70
#define PRID_VR4122_REV2_0 0x00000c70
#define PRID_VR4122_REV2_1 0x00000c70
#define PRID_VR4122_REV3_0 0x00000c71
#define PRID_VR4122_REV3_1 0x00000c72
/* VR4181A 0x00000c73-0x00000c7f */
#define PRID_VR4181A_REV1_0 0x00000c73
#define PRID_VR4181A_REV1_1 0x00000c74
/* VR4131 0x00000c80-0x00000c83 */
#define PRID_VR4131_REV1_2 0x00000c80
#define PRID_VR4131_REV2_0 0x00000c81
#define PRID_VR4131_REV2_1 0x00000c82
#define PRID_VR4131_REV2_2 0x00000c83
/* VR4133 0x00000c84- */
#define PRID_VR4133 0x00000c84
/*
* Bus Control Uint
*/
extern unsigned long vr41xx_calculate_clock_frequency(void);
extern unsigned long vr41xx_get_vtclock_frequency(void);
extern unsigned long vr41xx_get_tclock_frequency(void);
/*
* Clock Mask Unit
*/
typedef enum {
PIU_CLOCK,
SIU_CLOCK,
AIU_CLOCK,
KIU_CLOCK,
FIR_CLOCK,
DSIU_CLOCK,
CSI_CLOCK,
PCIU_CLOCK,
HSP_CLOCK,
PCI_CLOCK,
CEU_CLOCK,
ETHER0_CLOCK,
ETHER1_CLOCK
} vr41xx_clock_t;
extern void vr41xx_supply_clock(vr41xx_clock_t clock);
extern void vr41xx_mask_clock(vr41xx_clock_t clock);
/*
* Interrupt Control Unit
*/
extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int));
#define PIUINT_COMMAND 0x0040
#define PIUINT_DATA 0x0020
#define PIUINT_PAGE1 0x0010
#define PIUINT_PAGE0 0x0008
#define PIUINT_DATALOST 0x0004
#define PIUINT_STATUSCHANGE 0x0001
extern void vr41xx_enable_piuint(uint16_t mask);
extern void vr41xx_disable_piuint(uint16_t mask);
#define AIUINT_INPUT_DMAEND 0x0800
#define AIUINT_INPUT_DMAHALT 0x0400
#define AIUINT_INPUT_DATALOST 0x0200
#define AIUINT_INPUT_DATA 0x0100
#define AIUINT_OUTPUT_DMAEND 0x0008
#define AIUINT_OUTPUT_DMAHALT 0x0004
#define AIUINT_OUTPUT_NODATA 0x0002
extern void vr41xx_enable_aiuint(uint16_t mask);
extern void vr41xx_disable_aiuint(uint16_t mask);
#define KIUINT_DATALOST 0x0004
#define KIUINT_DATAREADY 0x0002
#define KIUINT_SCAN 0x0001
extern void vr41xx_enable_kiuint(uint16_t mask);
extern void vr41xx_disable_kiuint(uint16_t mask);
#define DSIUINT_CTS 0x0800
#define DSIUINT_RXERR 0x0400
#define DSIUINT_RX 0x0200
#define DSIUINT_TX 0x0100
#define DSIUINT_ALL 0x0f00
extern void vr41xx_enable_dsiuint(uint16_t mask);
extern void vr41xx_disable_dsiuint(uint16_t mask);
#define FIRINT_UNIT 0x0010
#define FIRINT_RX_DMAEND 0x0008
#define FIRINT_RX_DMAHALT 0x0004
#define FIRINT_TX_DMAEND 0x0002
#define FIRINT_TX_DMAHALT 0x0001
extern void vr41xx_enable_firint(uint16_t mask);
extern void vr41xx_disable_firint(uint16_t mask);
extern void vr41xx_enable_pciint(void);
extern void vr41xx_disable_pciint(void);
extern void vr41xx_enable_scuint(void);
extern void vr41xx_disable_scuint(void);
#define CSIINT_TX_DMAEND 0x0040
#define CSIINT_TX_DMAHALT 0x0020
#define CSIINT_TX_DATA 0x0010
#define CSIINT_TX_FIFOEMPTY 0x0008
#define CSIINT_RX_DMAEND 0x0004
#define CSIINT_RX_DMAHALT 0x0002
#define CSIINT_RX_FIFOEMPTY 0x0001
extern void vr41xx_enable_csiint(uint16_t mask);
extern void vr41xx_disable_csiint(uint16_t mask);
extern void vr41xx_enable_bcuint(void);
extern void vr41xx_disable_bcuint(void);
#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
extern void vr41xx_siu_setup(void);
#else
static inline void vr41xx_siu_setup(void) {}
#endif
#endif /* __NEC_VR41XX_H */