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2024-09-09 08:52:07 +00:00
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1
kernel/arch/m32r/platforms/mappi2/Makefile Normal file
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obj-y := setup.o io.o

233
kernel/arch/m32r/platforms/mappi2/dot.gdbinit.vdec2 Normal file
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# .gdbinit file
# $Id: dot.gdbinit.vdec2,v 1.2 2004/11/11 02:03:15 takata Exp $
# setting
set width 0d70
set radix 0d16
use_debug_dma
# Initialize SDRAM controller for Mappi
define sdram_init
# SDIR0
set *(unsigned long *)0x00ef6008=0x00000182
# SDIR1
set *(unsigned long *)0x00ef600c=0x00000001
# Initialize wait
shell sleep 1
# Ch0-MOD
set *(unsigned long *)0x00ef602c=0x00000020
# Ch0-TR
set *(unsigned long *)0x00ef6028=0x00041302
# Ch0-ADR
set *(unsigned long *)0x00ef6020=0x08000004
# AutoRef On
set *(unsigned long *)0x00ef6004=0x00010705
# Access enable
set *(unsigned long *)0x00ef6024=0x00000001
end
document sdram_init
Mappi SDRAM controller initialization
0x08000000 - 0x0bffffff (64MB)
end
# Initialize SDRAM controller for Mappi
define sdram_init2
# SDIR0
set *(unsigned long *)0x00ef6008=0x00000182
# Ch0-MOD
set *(unsigned long *)0x00ef602c=0x00000020
# Ch0-TR
set *(unsigned long *)0x00ef6028=0x00010002
# Ch0-ADR
set *(unsigned long *)0x00ef6020=0x08000004
# AutoRef On
set *(unsigned long *)0x00ef6004=0x00010107
# SDIR1
set *(unsigned long *)0x00ef600c=0x00000001
# Initialize wait
shell sleep 1
# Access enable
set *(unsigned long *)0x00ef6024=0x00000001
shell sleep 1
end
document sdram_init
Mappi SDRAM controller initialization
0x08000000 - 0x0bffffff (64MB)
end
# Initialize LAN controller for Mappi
define lanc_init
# Set BSEL1 (BSEL3 for the Chaos's bselc)
#set *(unsigned long *)0x00ef5004 = 0x0fff330f
#set *(unsigned long *)0x00ef5004 = 0x01113301
# set *(unsigned long *)0x00ef5004 = 0x02011101
# set *(unsigned long *)0x00ef5004 = 0x04441104
# BSEL5
# set *(unsigned long *)0x00ef5014 = 0x0ccc310c
# set *(unsigned long *)0x00ef5014 = 0x0303310f
# set *(unsigned long *)0x00ef5014 = 0x01011102 -> NG
# set *(unsigned long *)0x00ef5014 = 0x03033103
set *(unsigned long *)0x00ef500c = 0x0b0b1304
set *(unsigned long *)0x00ef5010 = 0x03033302
# set *(unsigned long *)0x00ef5018 = 0x02223302
end
# MMU enable
define mmu_enable
set $evb=0x88000000
set *(unsigned long *)0xffff0024=1
end
# MMU disable
define mmu_disable
set $evb=0
set *(unsigned long *)0xffff0024=0
end
# Show TLB entries
define show_tlb_entries
set $i = 0
set $addr = $arg0
while ($i < 0d16 )
set $tlb_tag = *(unsigned long*)$addr
set $tlb_data = *(unsigned long*)($addr + 4)
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
set $i = $i + 1
set $addr = $addr + 8
end
end
define itlb
set $itlb=0xfe000000
show_tlb_entries $itlb
end
define dtlb
set $dtlb=0xfe000800
show_tlb_entries $dtlb
end
# Cache ON
define set_cache_type
set $mctype = (void*)0xfffffff8
# chaos
# set *(unsigned long *)($mctype) = 0x0000c000
# m32102 i-cache only
set *(unsigned long *)($mctype) = 0x00008000
# m32102 d-cache only
# set *(unsigned long *)($mctype) = 0x00004000
end
define cache_on
set $param = (void*)0x08001000
set *(unsigned long *)($param) = 0x60ff6102
end
# Show current task structure
define show_current
set $current = $spi & 0xffffe000
printf "$current=0x%08lX\n",$current
print *(struct task_struct *)$current
end
# Show user assigned task structure
define show_task
set $task = $arg0 & 0xffffe000
printf "$task=0x%08lX\n",$task
print *(struct task_struct *)$task
end
document show_task
Show user assigned task structure
arg0 : task structure address
end
# Show M32R registers
define show_regs
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
printf "EVB[0x%08lX]\n",$evb
set $mests = *(unsigned long *)0xffff000c
set $mdeva = *(unsigned long *)0xffff0010
printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva
end
# Setup all
define setup
sdram_init
# lanc_init
# dispc_init
# set $evb=0x08000000
end
# Load modules
define load_modules
use_debug_dma
load
# load busybox.mot
end
# Set kernel parameters
define set_kernel_parameters
set $param = (void*)0x08001000
## MOUNT_ROOT_RDONLY
set {long}($param+0x00)=0
## RAMDISK_FLAGS
#set {long}($param+0x04)=0
## ORIG_ROOT_DEV
#set {long}($param+0x08)=0x00000100
## LOADER_TYPE
#set {long}($param+0x0C)=0
## INITRD_START
set {long}($param+0x10)=0x082a0000
## INITRD_SIZE
set {long}($param+0x14)=0d6200000
# M32R_CPUCLK
set *(unsigned long *)($param + 0x0018) = 0d25000000
# M32R_BUSCLK
set *(unsigned long *)($param + 0x001c) = 0d25000000
# M32R_TIMER_DIVIDE
set *(unsigned long *)($param + 0x0020) = 0d128
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0"
end
# Boot
define boot
set_kernel_parameters
debug_chaos
set $pc=0x08002000
set $fp=0
del b
si
end
# Restart
define restart
sdireset
sdireset
setup
load_modules
boot
end
sdireset
sdireset
file vmlinux
target m32rsdi
restart
boot

383
kernel/arch/m32r/platforms/mappi2/io.c Normal file
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/*
* linux/arch/m32r/platforms/mappi2/io.c
*
* Typical I/O routines for Mappi2 board.
*
* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
* Hitoshi Yamamoto, Mamoru Sakugawa
*/
#include <asm/m32r.h>
#include <asm/page.h>
#include <asm/io.h>
#include <asm/byteorder.h>
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
#include <linux/types.h>
#define M32R_PCC_IOMAP_SIZE 0x1000
#define M32R_PCC_IOSTART0 0x1000
#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
#define PORT2ADDR(port) _port2addr(port)
#define PORT2ADDR_NE(port) _port2addr_ne(port)
#define PORT2ADDR_USB(port) _port2addr_usb(port)
static inline void *_port2addr(unsigned long port)
{
return (void *)(port | NONCACHE_OFFSET);
}
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
static inline void *__port2addr_ata(unsigned long port)
{
static int dummy_reg;
switch (port) {
case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
default: return (void *)&dummy_reg;
}
}
#endif
#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
#ifdef CONFIG_CHIP_OPSP
static inline void *_port2addr_ne(unsigned long port)
{
return (void *)(port + 0x10000000);
}
#else
static inline void *_port2addr_ne(unsigned long port)
{
return (void *)(port + 0x04000000);
}
#endif
static inline void *_port2addr_usb(unsigned long port)
{
return (void *)(port + NONCACHE_OFFSET + 0x14000000);
}
static inline void delay(void)
{
__asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
}
/*
* NIC I/O function
*/
static inline unsigned char _ne_inb(void *portp)
{
return (unsigned char) *(volatile unsigned char *)portp;
}
static inline unsigned short _ne_inw(void *portp)
{
return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
}
static inline void _ne_insb(void *portp, void * addr, unsigned long count)
{
unsigned char *buf = addr;
while (count--)
*buf++ = *(volatile unsigned char *)portp;
}
static inline void _ne_outb(unsigned char b, void *portp)
{
*(volatile unsigned char *)portp = (unsigned char)b;
}
static inline void _ne_outw(unsigned short w, void *portp)
{
*(volatile unsigned short *)portp = cpu_to_le16(w);
}
unsigned char _inb(unsigned long port)
{
if (port >= LAN_IOSTART && port < LAN_IOEND)
return _ne_inb(PORT2ADDR_NE(port));
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
return *(volatile unsigned char *)__port2addr_ata(port);
}
#endif
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
unsigned char b;
pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
return b;
} else
#endif
return *(volatile unsigned char *)PORT2ADDR(port);
}
unsigned short _inw(unsigned long port)
{
if (port >= LAN_IOSTART && port < LAN_IOEND)
return _ne_inw(PORT2ADDR_NE(port));
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
return *(volatile unsigned short *)__port2addr_ata(port);
}
#endif
#if defined(CONFIG_USB)
else if (port >= 0x340 && port < 0x3a0)
return *(volatile unsigned short *)PORT2ADDR_USB(port);
#endif
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
unsigned short w;
pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
return w;
} else
#endif
return *(volatile unsigned short *)PORT2ADDR(port);
}
unsigned long _inl(unsigned long port)
{
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
unsigned long l;
pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
return l;
} else
#endif
return *(volatile unsigned long *)PORT2ADDR(port);
}
unsigned char _inb_p(unsigned long port)
{
unsigned char v = _inb(port);
delay();
return (v);
}
unsigned short _inw_p(unsigned long port)
{
unsigned short v = _inw(port);
delay();
return (v);
}
unsigned long _inl_p(unsigned long port)
{
unsigned long v = _inl(port);
delay();
return (v);
}
void _outb(unsigned char b, unsigned long port)
{
if (port >= LAN_IOSTART && port < LAN_IOEND)
_ne_outb(b, PORT2ADDR_NE(port));
else
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
*(volatile unsigned char *)__port2addr_ata(port) = b;
} else
#endif
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
} else
#endif
*(volatile unsigned char *)PORT2ADDR(port) = b;
}
void _outw(unsigned short w, unsigned long port)
{
if (port >= LAN_IOSTART && port < LAN_IOEND)
_ne_outw(w, PORT2ADDR_NE(port));
else
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
*(volatile unsigned short *)__port2addr_ata(port) = w;
} else
#endif
#if defined(CONFIG_USB)
if (port >= 0x340 && port < 0x3a0)
*(volatile unsigned short *)PORT2ADDR_USB(port) = w;
else
#endif
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
} else
#endif
*(volatile unsigned short *)PORT2ADDR(port) = w;
}
void _outl(unsigned long l, unsigned long port)
{
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
} else
#endif
*(volatile unsigned long *)PORT2ADDR(port) = l;
}
void _outb_p(unsigned char b, unsigned long port)
{
_outb(b, port);
delay();
}
void _outw_p(unsigned short w, unsigned long port)
{
_outw(w, port);
delay();
}
void _outl_p(unsigned long l, unsigned long port)
{
_outl(l, port);
delay();
}
void _insb(unsigned int port, void * addr, unsigned long count)
{
if (port >= LAN_IOSTART && port < LAN_IOEND)
_ne_insb(PORT2ADDR_NE(port), addr, count);
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
unsigned char *buf = addr;
unsigned char *portp = __port2addr_ata(port);
while (count--)
*buf++ = *(volatile unsigned char *)portp;
}
#endif
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
count, 1);
}
#endif
else {
unsigned char *buf = addr;
unsigned char *portp = PORT2ADDR(port);
while (count--)
*buf++ = *(volatile unsigned char *)portp;
}
}
void _insw(unsigned int port, void * addr, unsigned long count)
{
unsigned short *buf = addr;
unsigned short *portp;
if (port >= LAN_IOSTART && port < LAN_IOEND) {
portp = PORT2ADDR_NE(port);
while (count--)
*buf++ = *(volatile unsigned short *)portp;
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
count, 1);
#endif
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
portp = __port2addr_ata(port);
while (count--)
*buf++ = *(volatile unsigned short *)portp;
#endif
} else {
portp = PORT2ADDR(port);
while (count--)
*buf++ = *(volatile unsigned short *)portp;
}
}
void _insl(unsigned int port, void * addr, unsigned long count)
{
unsigned long *buf = addr;
unsigned long *portp;
portp = PORT2ADDR(port);
while (count--)
*buf++ = *(volatile unsigned long *)portp;
}
void _outsb(unsigned int port, const void * addr, unsigned long count)
{
const unsigned char *buf = addr;
unsigned char *portp;
if (port >= LAN_IOSTART && port < LAN_IOEND) {
portp = PORT2ADDR_NE(port);
while (count--)
_ne_outb(*buf++, portp);
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
portp = __port2addr_ata(port);
while (count--)
*(volatile unsigned char *)portp = *buf++;
#endif
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
count, 1);
#endif
} else {
portp = PORT2ADDR(port);
while (count--)
*(volatile unsigned char *)portp = *buf++;
}
}
void _outsw(unsigned int port, const void * addr, unsigned long count)
{
const unsigned short *buf = addr;
unsigned short *portp;
if (port >= LAN_IOSTART && port < LAN_IOEND) {
portp = PORT2ADDR_NE(port);
while (count--)
*(volatile unsigned short *)portp = *buf++;
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
portp = __port2addr_ata(port);
while (count--)
*(volatile unsigned short *)portp = *buf++;
#endif
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
count, 1);
#endif
} else {
portp = PORT2ADDR(port);
while (count--)
*(volatile unsigned short *)portp = *buf++;
}
}
void _outsl(unsigned int port, const void * addr, unsigned long count)
{
const unsigned long *buf = addr;
unsigned char *portp;
portp = PORT2ADDR(port);
while (count--)
*(volatile unsigned long *)portp = *buf++;
}

171
kernel/arch/m32r/platforms/mappi2/setup.c Normal file
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/*
* linux/arch/m32r/platforms/mappi2/setup.c
*
* Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
*
* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
* Hitoshi Yamamoto, Mamoru Sakugawa
*/
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/m32r.h>
#include <asm/io.h>
#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
icu_data_t icu_data[NR_IRQS];
static void disable_mappi2_irq(unsigned int irq)
{
unsigned long port, data;
if ((irq == 0) ||(irq >= NR_IRQS)) {
printk("bad irq 0x%08x\n", irq);
return;
}
port = irq2port(irq);
data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
outl(data, port);
}
static void enable_mappi2_irq(unsigned int irq)
{
unsigned long port, data;
if ((irq == 0) ||(irq >= NR_IRQS)) {
printk("bad irq 0x%08x\n", irq);
return;
}
port = irq2port(irq);
data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
outl(data, port);
}
static void mask_mappi2(struct irq_data *data)
{
disable_mappi2_irq(data->irq);
}
static void unmask_mappi2(struct irq_data *data)
{
enable_mappi2_irq(data->irq);
}
static void shutdown_mappi2(struct irq_data *data)
{
unsigned long port;
port = irq2port(data->irq);
outl(M32R_ICUCR_ILEVEL7, port);
}
static struct irq_chip mappi2_irq_type =
{
.name = "MAPPI2-IRQ",
.irq_shutdown = shutdown_mappi2,
.irq_mask = mask_mappi2,
.irq_unmask = unmask_mappi2,
};
void __init init_IRQ(void)
{
#if defined(CONFIG_SMC91X)
/* INT0 : LAN controller (SMC91111) */
irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
handle_level_irq);
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_mappi2_irq(M32R_IRQ_INT0);
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
handle_level_irq);
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
disable_mappi2_irq(M32R_IRQ_MFT2);
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
handle_level_irq);
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
disable_mappi2_irq(M32R_IRQ_SIO0_R);
/* SIO0_S : uart send data */
irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
handle_level_irq);
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
disable_mappi2_irq(M32R_IRQ_SIO0_S);
/* SIO1_R : uart receive data */
irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
handle_level_irq);
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
disable_mappi2_irq(M32R_IRQ_SIO1_R);
/* SIO1_S : uart send data */
irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
handle_level_irq);
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
disable_mappi2_irq(M32R_IRQ_SIO1_S);
#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
#if defined(CONFIG_USB)
/* INT1 : USB Host controller interrupt */
irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
handle_level_irq);
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
disable_mappi2_irq(M32R_IRQ_INT1);
#endif /* CONFIG_USB */
/* ICUCR40: CFC IREQ */
irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
handle_level_irq);
icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
disable_mappi2_irq(PLD_IRQ_CFIREQ);
#if defined(CONFIG_M32R_CFC)
/* ICUCR41: CFC Insert */
irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
handle_level_irq);
icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
/* ICUCR42: CFC Eject */
irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
handle_level_irq);
icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
#endif /* CONFIG_MAPPI2_CFC */
}
#define LAN_IOSTART 0x300
#define LAN_IOEND 0x320
static struct resource smc91x_resources[] = {
[0] = {
.start = (LAN_IOSTART),
.end = (LAN_IOEND),
.flags = IORESOURCE_MEM,
},
[1] = {
.start = M32R_IRQ_INT0,
.end = M32R_IRQ_INT0,
.flags = IORESOURCE_IRQ,
}
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
static int __init platform_init(void)
{
platform_device_register(&smc91x_device);
return 0;
}
arch_initcall(platform_init);