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kernel/Documentation/devicetree/bindings/fb/mdss-dsi-ctrl.txt Normal file
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Qualcomm mdss-dsi-ctrl
mdss-dsi-ctrl is a dsi controller device which supports host controllers that
are compatable with MIPI display serial interface specification.
Required properties:
- compatible: Must be "qcom,mdss-dsi-ctrl"
- cell-index: Specifies the controller used among the two controllers.
- reg: offset and length of the register set for the device.
- vdd-supply: Phandle for vdd regulator device node.
- vddio-supply: Phandle for vdd-io regulator device node.
- vdda-supply: Phandle for vreg regulator device node.
- qcom,mdss-fb-map: pHandle that specifies the framebuffer to which the
interface is mapped.
Optional properties:
- label: A string used to describe the controller used.
- qcom,supply-names: A list of strings that lists the names of the
regulator supplies.
- qcom,supply-min-voltage-level: A list that specifies minimum voltage level
of supply(ies) mentioned above. This list maps
in the order of the supply names listed above.
- qcom,supply-max-voltage-level: A list that specifies maximum voltage level of
supply(ies) mentioned above. This list maps in
the order of the supply names listed above.
- qcom,supply-peak-current: A list that specifies the peak current that will
be drawn from the supply(ies) mentioned above. This
list maps in the order of the supply names listed above.
Example:
mdss_dsi0: qcom,mdss_dsi@fd922800 {
compatible = "qcom,mdss-dsi-ctrl";
label = "MDSS DSI CTRL->0";
cell-index = <0>;
reg = <0xfd922800 0x600>;
vdd-supply = <&pm8226_l15>;
vddio-supply = <&pm8226_l8>;
vdda-supply = <&pm8226_l4>;
qcom,supply-names = "vdd", "vddio", "vdda";
qcom,supply-min-voltage-level = <2800000 1800000 1200000>;
qcom,supply-max-voltage-level = <2800000 1800000 1200000>;
qcom,supply-peak-current = <150000 100000 100000>;
qcom,mdss-fb-map = <&mdss_fb0>;
};

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Qualcomm mdss-dsi-panel
mdss-dsi-panel is a dsi panel device which supports panels that
are compatable with MIPI display serial interface specification.
Required properties:
- compatible: Specifies the version for DSI HW. that
this panel will be worked with
"qcom,mdss-dsi-panel" = DSI v6.0
"qcom,dsi-panel-v2" = DSI V2.0
- status: A string that has to be set to "okay/ok" to enable
the panel driver. By default this property will be
set to "disable". Will be set to "ok/okay" status
for specific platforms.
- qcom,dsi-ctrl-phandle: Specifies the phandle for the DSI controller that
this panel will be mapped to.
- qcom,mdss-pan-res: A two dimensional array that specifies the panel
resolution.
- qcom,mdss-pan-bpp: Specifies the panel bits per pixel. Default value is 24(rgb888).
18 = for rgb666
16 = for rgb565
- qcom,mdss-pan-dest: A string that specifies the destination display for the panel.
Default is "display_1".
"display_1" = DISPLAY_1
"display_2" = DISPLAY_2
- qcom,panel-phy-regulatorSettings: An array of length 7 that specifies the PHY
regulator settings for the panel.
- qcom,panel-phy-timingSettings: An array of length 12 that specifies the PHY
timing settings for the panel.
- qcom,panel-phy-strengthCtrl: An array of length 2 that specifies the PHY
strengthCtrl settings for the panel.
- qcom,panel-phy-bistCtrl: An array of length 6 that specifies the PHY
BIST ctrl settings for the panel.
- qcom,panel-phy-laneConfig: An array of length 45 that specifies the PHY
lane configuration settings for the panel.
- qcom,mdss-panel-on-cmds: An array of variable length that lists the init commands
of the panel. Each command will have the format specified
as below:
--> data type of the command
--> specifies whether this command packet is last.
--> virtual channel
--> Needs acknowledge from the panel or not.
--> wait time after the command is transmitter.
--> size of payload
--> payload.
- qcom,mdss-panel-off-cmds: An array of variable length that lists the panel off
commands. Each command will have the format specified
as below:
--> data type of the command
--> specifies whether this command packet is last.
--> virtual channel
--> Needs acknowledge from the panel or not.
--> wait time after the command is transmitter.
--> size of payload
--> payload.
Optional properties:
- label: A string used as a descriptive name of the panel
- qcom,enable-gpio: Specifies the panel lcd/display enable gpio.
- qcom,rst-gpio: Specifies the panel reset gpio.
- qcom,te-gpio: Specifies the gpio used for TE.
- qcom,pwm-lpg-channel: LPG channel for backlight.
- qcom,pwm-period: PWM period in microseconds.
- qcom,pwm-pmic-gpio: PMIC gpio binding to backlight.
- qcom,mdss-pan-broadcast-mode: Boolean used to enable broadcast mode.
- qcom,cont-splash-enabled: Boolean used to enable continuous splash mode.
- qcom,fbc-enabled: Boolean used to enable frame buffer compression mode.
- qcom,fbc-mode-select: An array of length 7 that specifies the fbc mode supported
by the panel. FBC enabled panels may or may not support
the modes specified here. Each entry will
have the format specified below:
--> compressed bpp supported by the panel
--> component packing
--> enable/disable quantization error calculation
--> Bias for CD
--> enable/disable PAT mode
--> enable/disable VLC mode
--> enable/disable BFLC mode
- qcom,fbc-budget-ctl: An array of length 3 that specifies the budget control settings
supported by the fbc enabled panel. Each entry will have the format
specified below:
--> per line extra budget
--> extra budget level
--> per block budget
- qcom,fbc-lossy-mode: An array of 3 that specifies the lossy mode settings
supported by the fbc enabled panel. Each entry will
have the format specified below:
--> lossless mode threshold
--> lossy mode threshold
--> lossy RGB threshold
- qcom,mdss-pan-porch-values: An array of size 6 that specifies the panel blanking values.
- qcom,mdss-pan-underflow-clr: Specifies the controller settings for the panel underflow clear
settings. Default value is 0xff.
- qcom,mdss-pan-bl-ctrl: A string that specifies the implementation of backlight
control for this panel.
"bl_ctrl_pwm" = Backlight controlled by PWM gpio.
"bl_ctrl_wled" = Backlight controlled by WLED.
"bl_ctrl_dcs_cmds" = Backlight controlled by DCS commands.
- qcom,mdss-pan-bl-levels: Specifies the backlight levels supported by the panel.
Default range is 1 to 255.
- qcom,mdss-pan-dsi-mode: Specifies the panel operating mode.
0 = enable video mode(default mode).
1 = enable command mode.
- qcom,mdss-vsync-enable: Specifies Tear Check configuration.
0 = TE disable.
1 = TE enable.
- qcom,mdss-hw-vsync-mode: Specifies TE type.
0 = software vsync.
1 = hardware vsync (TE gpio pin).
- qcom,mdss-pan-te-sel: Specifies TE operating mode.
0 = TE through embedded dcs command
1 = TE through TE gpio pin.
- qcom,mdss-pan-dsi-h-pulse-mode: Specifies the pulse mode option for the panel.
0 = Don't send hsa/he following vs/ve packet(default)
1 = Send hsa/he following vs/ve packet
- qcom,mdss-pan-dsi-h-power-stop: An Array of size 3 that specifies the power mode
during horizontal porch and sync periods of the panel.
0 = high speed mode(default mode).
1 = Low power mode for horizontal porches and sync pulse.
- qcom,mdss-pan-dsi-bllp-power-stop: An Array of size 2 that specifies the power mode
during blanking period and after EOF(end of frame).
0 = high speed mode(default mode).
1 = Low power mode during blanking and EOF.
- qcom,mdss-pan-dsi-traffic-mode: Specifies the panel traffic mode.
0 = non burst with sync pulses (default mode).
1 = non burst with sync start event.
2 = burst mode.
- qcom,mdss-pan-dsi-dst-format: Specifies the destination format.
0 = DSI_VIDEO_DST_FORMAT_RGB565.
1 = DSI_VIDEO_DST_FORMAT_RGB666.
2 = DSI_VIDEO_DST_FORMAT_RGB666_LOOSE.
3 = DSI_VIDEO_DST_FORMAT_RGB888 (Default format)
6 = DSI_CMD_DST_FORMAT_RGB565
7 = DSI_CMD_DST_FORMAT_RGB666
8 = DSI_CMD_DST_FORMAT_RGB888
- qcom,mdss-pan-dsi-vc: Specifies the virtual channel identefier.
0 = default value.
- qcom,mdss-pan-dsi-rgb-swap: Specifies the R, G and B channel ordering.
0 = DSI_RGB_SWAP_RGB (default value)
1 = DSI_RGB_SWAP_RBG
2 = DSI_RGB_SWAP_BGR
3 = DSI_RGB_SWAP_BRG
4 = DSI_RGB_SWAP_GRB
5 = DSI_RGB_SWAP_GBR
- qcom,mdss-pan-dsi-data-lanes: An array that specifies the data lanes enabled.
<1 1 0 0> = data lanes 1 and 2 are enabled.(default).
- qcom,mdss-pan-dsi-dlane-swap: Specifies the data lane swap configuration.
0 = <0 1 2 3> (default value)
1 = <3 0 1 2>
2 = <2 3 0 1>
3 = <1 2 3 0>
4 = <0 3 2 1>
5 = <1 0 3 2>
6 = <2 1 0 3>
7 = <3 2 1 0>
- qcom,mdss-pan-dsi-t-clk: An array that specifies the byte clock cycles
before and after each mode switch.
- qcom,mdss-pan-dsi-stream: Specifies the packet stream to be used.
0 = stream 0 (default)
1 = stream 1
- qcom,mdss-pan-dsi-mdp-tr: Specifies the trigger mechanism to be used for MDP path.
0 = no trigger
2 = Tear check signal line used for trigger
4 = Triggered by software (default mode)
6 = Software trigger and TE
- qcom,mdss-pan-dsi-dma-tr: Specifies the trigger mechanism to be used for DMA path.
0 = no trigger
2 = Tear check signal line used for trigger
4 = Triggered by software (default mode)
5 = Software trigger and start/end of frame trigger.
6 = Software trigger and TE
- qcom,mdss-pan-dsi-frame-rate: Specifies the frame rate for the panel.
60 = 60 frames per second (default)
- qcom,on-cmds-dsi-state: A string that Specifies the ctrl state for sending ON commands.
Supported modes are "DSI_LP_MODE" and "DSI_HS_MODE".
- qcom,off-cmds-dsi-state: A string that Specifies the ctrl state for sending ON commands.
Supported modes are "DSI_LP_MODE" and "DSI_HS_MODE".
- qcom,panel-on-cmds: A byte stream formed by multiple dcs packets base on
qcom dsi controller protocol.
byte 0 : dcs data type
byte 1 : set to indicate this is an individual packet
(no chain).
byte 2 : virtual channel number
byte 3 : expect ack from client (dcs read command)
byte 4 : wait number of specified ms after dcs command
transmitted
byte 5, 6: 16 bits length in network byte order
byte 7 and beyond: number byte of payload
Note, if a given optional qcom,* binding is not present, then the driver will configure
the default values specified.
Example:
/ {
qcom,mdss_dsi_sim_video {
compatible = "qcom,mdss-dsi-panel";
label = "simulator video mode dsi panel";
status = "disable";
qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
qcom,mdss-pan-res = <640 480>;
qcom,mdss-pan-bpp = <24>;
qcom,mdss-pan-dest = "display_1";
qcom,mdss-pan-porch-values = <6 2 6 6 2 6>;
qcom,mdss-pan-underflow-clr = <0xff>;
qcom,mdss-pan-bl-levels = <1 15>;
qcom,mdss-pan-dsi-mode = <0>;
qcom,mdss-pan-dsi-h-pulse-mode = <1>;
qcom,mdss-pan-dsi-h-power-stop = <1 1 1>;
qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
qcom,mdss-pan-dsi-traffic-mode = <0>;
qcom,mdss-pan-dsi-dst-format = <3>;
qcom,mdss-pan-dsi-vc = <0>;
qcom,mdss-pan-dsi-rgb-swap = <0>;
qcom,mdss-pan-dsi-data-lanes = <1 1 0 0>;
qcom,mdss-pan-dsi-t-clk = <0x24 0x03>;
qcom,mdss-pan-dsi-stream = <0>;
qcom,mdss-pan-dsi-mdp-tr = <0x04>;
qcom,mdss-pan-dsi-dma-tr = <0x04>;
qcom,mdss-pan-frame-rate = <60>;
qcom,panel-on-cmds = [32 01 00 00 00 00 02 00 00];
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
qcom,panel-off-cmds = [22 01 00 00 00 00 00];
qcom,off-cmds-dsi-state = "DSI LP MODE";
qcom,fbc-enabled;
qcom,fbc-mode = <12 0 1 2 1 1 1>;
qcom,fbc-budget-ctl = <675 5 91>;
qcom,fbc-lossy-mode = <0 0xc0 0 3>;
};
};

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Qualcomm MDSS EDP
MDSS EDP is a edp driver which supports panels that are compatable with
VESA EDP display interface specification.
Required properties
- compatible : Must be "qcom,mdss-edp".
- reg : Offset and length of the register set for the
device.
- reg-names : Names to refer to register sets related to this
device
- vdda-supply : Phandle for vdd regulator device node.
- gpio-panel-en : GPIO for supplying power to panel and backlight
driver.
- qcom,panel-lpg-channel : LPG channel for backlight.
- qcom,panel-pwm-period : PWM period in microseconds.
- status : A string that has to be set to "okay/ok" to enable
the driver. By default this property will be set to
"disable". Will be set to "ok/okay" status for
specific platforms.
- qcom,mdss-fb-map: pHandle that specifies the framebuffer to which the
interface is mapped.
Example:
mdss_edp: qcom,mdss_edp@fd923400 {
compatible = "qcom,mdss-edp";
reg = <0xfd923400 0x700>,
<0xfd8c2000 0x1000>;
reg-names = "edp_base", "mmss_cc_base";
vdda-supply = <&pm8941_l12>;
gpio-panel-en = <&msmgpio 58 0>;
qcom,panel-lpg-channel = <7>; /* LPG Channel 8 */
qcom,panel-pwm-period = <53>;
status = "disable";
};

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Qualcomm MDSS MDP
MDSS is Mobile Display SubSystem which implements Linux framebuffer APIs to
drive user interface to different panel interfaces. MDP driver is the core of
MDSS which manage all data paths to different panel interfaces.
Required properties
- compatible : Must be "qcom,mdss_mdp"
- reg : offset and length of the register set for the device.
- reg-names : names to refer to register sets related to this device
- interrupts : Interrupt associated with MDSS.
- vdd-supply : Phandle for vdd regulator device node.
- qcom,max-clk-rate: Specify maximum MDP core clock rate in hz that this
device supports.
- qcom,mdss-pipe-vig-off: Array of offset for MDP source surface pipes of
type VIG, the offsets are calculated from
register "mdp_phys" defined in reg property.
The number of offsets defined here should
reflect the amount of VIG pipes that can be
active in MDP for this configuration.
- qcom,mdss-pipe-vig-fetch-id: Array of shared memory pool fetch ids
corresponding to the VIG pipe offsets defined in
previous property, the amount of fetch ids
defined should match the number of offsets
defined in property: qcom,mdss-pipe-vig-off
- qcom,mdss-pipe-rgb-off: Array of offsets for MDP source surface pipes of
type RGB, the offsets are calculated from
register "mdp_phys" defined in reg property.
The number of offsets defined here should
reflect the amount of RGB pipes that can be
active in MDP for this configuration.
- qcom,mdss-pipe-rgb-fetch-id: Array of shared memory pool fetch ids
corresponding to the RGB pipe offsets defined in
previous property, the amount of fetch ids
defined should match the number of offsets
defined in property: qcom,mdss-pipe-rgb-off
- qcom,mdss-pipe-dma-off: Array of offsets for MDP source surface pipes of
type DMA, the offsets are calculated from
register "mdp_phys" defined in reg property.
The number of offsets defined here should
reflect the amount of DMA pipes that can be
active in MDP for this configuration.
- qcom,mdss-pipe-dma-fetch-id: Array of shared memory pool fetch ids
corresponding to the DMA pipe offsets defined in
previous property, the amount of fetch ids
defined should match the number of offsets
defined in property: qcom,mdss-pipe-dma-off
- qcom,mdss-smp-data: Array of shared memory pool data. There should
be only two values in this property. The first
value corresponds to the number of smp blocks
and the second is the size of each block
present in the mdss hardware.
- qcom,mdss-ctl-off: Array of offset addresses for the available ctl
hw blocks within MDP, these offsets are
calculated from register "mdp_phys" defined in
reg property. The number of ctl offsets defined
here should reflect the number of control paths
that can be configured concurrently on MDP for
this configuration.
- qcom,mdss-wb-off: Array of offset addresses for the progammable
writeback blocks within MDP. The number of
offsets defined should match the number of ctl
blocks defined in property: qcom,mdss-ctl-off
- qcom,mdss-mixer-intf-off: Array of offset addresses for the available
mixer blocks that can drive data to panel
interfaces.
These offsets are be calculated from register
"mdp_phys" defined in reg property.
The number of offsets defined should reflect the
amount of mixers that can drive data to a panel
interface.
- qcom,mdss-dspp-off: Array of offset addresses for the available dspp
blocks. These offsets are calculated from
regsiter "mdp_phys" defined in reg property.
The number of dspp blocks should match the
number of mixers driving data to interface
defined in property: qcom,mdss-mixer-intf-off
- qcom,mdss-pingpong-off: Array of offset addresses for the available
pingpong blocks. These offsets are calculated
from regsiter "mdp_phys" defined in reg property.
The number of pingpong blocks should match the
number of mixers driving data to interface
defined in property: qcom,mdss-mixer-intf-off
- qcom,mdss-mixer-wb-off: Array of offset addresses for the available
mixer blocks that can be drive data to writeback
block. These offsets will be calculated from
register "mdp_phys" defined in reg property.
The number of writeback mixer offsets defined
should reflect the number of mixers that can
drive data to a writeback block.
- qcom,mdss-intf-off: Array of offset addresses for the available MDP
video interface blocks that can drive data to a
panel controller through timing engine.
The offsets are calculated from "mdp_phys"
defined in reg property. The number of offsets
defiend should reflect the number of progammable
interface blocks avaialble in hardware.
Optional properties:
- qcom,vbif-settings : Array with key-value pairs of constant VBIF register
settings used to setup MDSS QoS for optimum performance.
The key used should be offset from "vbif_phys" register
defined in reg property.
- qcom,mdp-settings : Array with key-value pairs of constant MDP register
settings used to setup MDSS QoS for best performance.
The key used should be offset from "mdp_phys" register
defined in reg property.
- qcom,mdss-rot-block-size: The size of a memory block (in pixels) to be used
by the rotator. If this property is not specified,
then a default value of 128 pixels would be used.
- qcom,mdss-has-bwc: Boolean property to indicate the presence of bandwidth
compression feature in the rotator.
- qcom,mdss-has-decimation: Boolean property to indicate the presence of
decimation feature in fetch.
- qcom,mdss-ad-off: Array of offset addresses for the available
Assertive Display (AD) blocks. These offsets
are calculated from the register "mdp_phys"
defined in reg property. The number of AD
offsets should be less than or equal to the
number of mixers driving interfaces defined in
property: qcom,mdss-mixer-intf-off. Assumes
that AD blocks are aligned with the mixer
offsets as well (i.e. the first mixer offset
corresponds to the same pathway as the first
AD offset).
Optional subnodes:
Child nodes representing the frame buffer virtual devices.
Subnode properties:
- compatible : Must be "qcom,mdss-fb"
- cell-index : Index representing frame buffer
- qcom,mdss-mixer-swap: A boolean property that indicates if the mixer muxes
need to be swapped based on the target panel.
By default the property is not defined.
Example:
qcom,mdss_mdp@fd900000 {
compatible = "qcom,mdss_mdp";
reg = <0xfd900000 0x22100>,
<0xfd924000 0x1000>;
reg-names = "mdp_phys", "vbif_phys";
interrupts = <0 72 0>;
vdd-supply = <&gdsc_mdss>;
qcom,max-clk-rate = <320000000>;
qcom,vbif-settings = <0x0004 0x00000001>,
<0x00D8 0x00000707>;
qcom,mdp-settings = <0x02E0 0x000000AA>,
<0x02E4 0x00000055>;
qcom,mdss-pipe-vig-off = <0x00001200 0x00001600
0x00001A00>;
qcom,mdss-pipe-rgb-off = <0x00001E00 0x00002200
0x00002600>;
qcom,mdss-pipe-dma-off = <0x00002A00 0x00002E00>;
qcom,mdss-pipe-vig-fetch-id = <1 4 7>;
qcom,mdss-pipe-rgb-fetch-id = <16 17 18>;
qcom,mdss-pipe-dma-fetch-id = <10 13>;
qcom,mdss-smp-data = <22 4096>;
qcom,mdss-rot-block-size = <64>;
qcom,mdss-has-bwc;
qcom,mdss-has-decimation;
qcom,mdss-ctl-off = <0x00000600 0x00000700 0x00000800
0x00000900 0x0000A00>;
qcom,mdss-mixer-intf-off = <0x00003200 0x00003600
0x00003A00>;
qcom,mdss-mixer-wb-off = <0x00003E00 0x00004200>;
qcom,mdss-dspp-off = <0x00004600 0x00004A00 0x00004E00>;
qcom,mdss-pingpong-off = <0x00012D00 0x00012E00 0x00012F00>;
qcom,mdss-wb-off = <0x00011100 0x00013100 0x00015100
0x00017100 0x00019100>;
qcom,mdss-intf-off = <0x00021100 0x00021300
0x00021500 0x00021700>;
mdss_fb0: qcom,mdss_fb_primary {
cell-index = <0>;
compatible = "qcom,mdss-fb";
qcom,mdss-mixer-swap;
};
};

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Qualcomm mdss-qpic-panel
mdss-qpic-panel is a panel device which can be driven by qpic.
Required properties:
- compatible: Must be "qcom,mdss-qpic-panel"
- qcom,mdss-pan-res: A two dimensional array that specifies the panel
resolution.
- qcom,mdss-pan-bpp: Specifies the panel bits per pixel.
- qcom,refresh_rate: Panel refresh rate
- vdd-supply: Phandle for vdd regulator device node.
- avdd-supply: Phandle for avdd regulator device node.
- qcom,cs-gpio: Phandle for cs gpio device node.
- qcom,te-gpio: Phandle for te gpio device node.
- qcom,rst-gpio: Phandle for rst gpio device node.
- qcom,ad8-gpio: Phandle for ad8 gpio device node.
Optional properties:
- label: A string used as a descriptive name of the panel
Example:
/ {
qcom,mdss_lcdc_ili9341_qvga {
compatible = "qcom,mdss-qpic-panel";
label = "ili qvga lcdc panel";
vdd-supply = <&pm8019_l11>;
avdd-supply = <&pm8019_l14>;
qcom,cs-gpio = <&msmgpio 21 0>;
qcom,te-gpio = <&msmgpio 22 0>;
qcom,rst-gpio = <&msmgpio 23 0>;
qcom,ad8-gpio = <&msmgpio 20 0>;
qcom,mdss-pan-res = <240 320>;
qcom,mdss-pan-bpp = <18>;
qcom,refresh_rate = <60>;
};
};

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Qualcomm mdss-qpic
mdss-qpic is a qpic controller device which supports dma transmission to MIPI
and LCDC panel.
Required properties:
- compatible: must be "qcom,mdss_qpic"
- reg: offset and length of the register set for the device.
- reg-names : names to refer to register sets related to this device
- interrupts: IRQ line
Example:
qcom,msm_qpic@f9ac0000 {
compatible = "qcom,mdss_qpic";
reg = <0xf9ac0000 0x24000>;
reg-names = "qpic_base";
interrupts = <0 251 0>;
};

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* Qualcomm HDMI Tx
Required properties:
- cell-index: hdmi tx controller index
- compatible: must be "qcom,hdmi-tx"
- reg: offset and length of the register regions(s) for the device.
- reg-names: a list of strings that map in order to the list of regs.
- hpd-gdsc-supply: phandle to the mdss gdsc regulator device tree node.
- hpd-5v-supply: phandle to the 5V regulator device tree node.
- core-vdda-supply: phandle to the HDMI vdda regulator device tree node.
- core-vcc-supply: phandle to the HDMI vcc regulator device tree node.
- qcom,hdmi-tx-supply-names: a list of strings that map in order
to the list of supplies.
- qcom,hdmi-tx-min-voltage-level: specifies minimum voltage level
of supply(ies) mentioned above.
- qcom,hdmi-tx-max-voltage-level: specifies maximum voltage level
of supply(ies) mentioned above.
- qcom,hdmi-tx-peak-current: specifies the peak current that will be
drawn from the supply(ies) mentioned above.
- qcom,hdmi-tx-cec: gpio for Consumer Electronics Control (cec) line.
- qcom,hdmi-tx-ddc-clk: gpio for Display Data Channel (ddc) clock line.
- qcom,hdmi-tx-ddc-data: gpio for ddc data line.
- qcom,hdmi-tx-hpd: gpio required for HDMI hot-plug detect.
Optional properties:
- qcom,hdmi-tx-mux-sel: gpio required to toggle HDMI output between
docking station, type A, and liquid device, type D, ports. Required
property for liquid devices.
- qcom,hdmi-tx-mux-en: gpio required to enable mux for HDMI output
on liquid devices. Required property for liquid devices.
[Optional child nodes]: These nodes are for devices which are
dependent on HDMI Tx controller. If HDMI Tx controller is disabled then
these devices will be disabled as well. Ex. HDMI Audio Codec device.
- qcom,msm-hdmi-audio-rx: Node for HDMI audio codec.
Required properties:
- compatible : "msm-hdmi-audio-codec-rx";
Example:
mdss_hdmi_tx: qcom,hdmi_tx@fd922100 {
cell-index = <0>;
compatible = "qcom,hdmi-tx";
reg = <0xfd922100 0x35C>,
<0xfd922500 0x7C>,
<0xfc4b8000 0x60F0>;
reg-names = "core_physical", "phy_physical", "qfprom_physical";
hpd-gdsc-supply = <&gdsc_mdss>;
hpd-5v-supply = <&pm8941_mvs2>;
core-vdda-supply = <&pm8941_l12>;
core-vcc-supply = <&pm8941_s3>;
qcom,hdmi-tx-supply-names = "hpd-gdsc", "hpd-5v", "core-vdda", "core-vcc";
qcom,hdmi-tx-min-voltage-level = <0 0 1800000 1800000>;
qcom,hdmi-tx-max-voltage-level = <0 0 1800000 1800000>;
qcom,hdmi-tx-peak-current = <0 0 1800000 0>;
qcom,hdmi-tx-cec = <&msmgpio 31 0>;
qcom,hdmi-tx-ddc-clk = <&msmgpio 32 0>;
qcom,hdmi-tx-ddc-data = <&msmgpio 33 0>;
qcom,hdmi-tx-hpd = <&msmgpio 34 0>;
qcom,msm-hdmi-audio-rx {
compatible = "qcom,msm-hdmi-audio-codec-rx";
};
};

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* SM SM501
The SM SM501 is a LCD controller, with proper hardware, it can also
drive DVI monitors.
Required properties:
- compatible : should be "smi,sm501".
- reg : contain two entries:
- First entry: System Configuration register
- Second entry: IO space (Display Controller register)
- interrupts : SMI interrupt to the cpu should be described here.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
Optional properties:
- mode : select a video mode:
<xres>x<yres>[-<bpp>][@<refresh>]
- edid : verbatim EDID data block describing attached display.
Data from the detailed timing descriptor will be used to
program the display controller.
- little-endian: available on big endian systems, to
set different foreign endian.
- big-endian: available on little endian systems, to
set different foreign endian.
Example for MPC5200:
display@1,0 {
compatible = "smi,sm501";
reg = <1 0x00000000 0x00800000
1 0x03e00000 0x00200000>;
interrupts = <1 1 3>;
mode = "640x480-32@60";
edid = [edid-data];
};