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2024-09-09 08:52:07 +00:00
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external/compat-wireless/include/linux/ath9k_platform.h
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/*
* Copyright (c) 2008 Atheros Communications Inc.
* Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _LINUX_ATH9K_PLATFORM_H
#define _LINUX_ATH9K_PLATFORM_H
#define ATH9K_PLAT_EEP_MAX_WORDS 2048
struct ath9k_platform_data {
u16 eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS];
u8 *macaddr;
int led_pin;
u32 gpio_mask;
u32 gpio_val;
bool is_clk_25mhz;
int (*get_mac_revision)(void);
int (*external_reset)(void);
};
#endif /* _LINUX_ATH9K_PLATFORM_H */
external/compat-wireless/include/linux/atomic.h
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#ifndef _COMPAT_LINUX_ATOMIC_H
#define _COMPAT_LINUX_ATOMIC_H 1
#include <linux/version.h>
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,36))
#include_next <linux/atomic.h>
#else
#include <asm/atomic.h>
/**
* atomic_inc_not_zero_hint - increment if not null
* @v: pointer of type atomic_t
* @hint: probable value of the atomic before the increment
*
* This version of atomic_inc_not_zero() gives a hint of probable
* value of the atomic. This helps processor to not read the memory
* before doing the atomic read/modify/write cycle, lowering
* number of bus transactions on some arches.
*
* Returns: 0 if increment was not done, 1 otherwise.
*/
#ifndef atomic_inc_not_zero_hint
static inline int atomic_inc_not_zero_hint(atomic_t *v, int hint)
{
int val, c = hint;
/* sanity test, should be removed by compiler if hint is a constant */
if (!hint)
return atomic_inc_not_zero(v);
do {
val = atomic_cmpxchg(v, c, c + 1);
if (val == c)
return 1;
c = val;
} while (c);
return 0;
}
#endif
#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,36)) */
#endif /* _COMPAT_LINUX_ATOMIC_H */
external/compat-wireless/include/linux/average.h
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#include <linux/version.h>
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,37))
#include_next <linux/average.h>
#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,37)) */
external/compat-wireless/include/linux/bcma/bcma.h
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#ifndef LINUX_BCMA_H_
#define LINUX_BCMA_H_
#include <linux/pci.h>
#include <linux/mod_devicetable.h>
#include <linux/bcma/bcma_driver_chipcommon.h>
#include <linux/bcma/bcma_driver_pci.h>
#include <linux/bcma/bcma_driver_mips.h>
#include <linux/ssb/ssb.h> /* SPROM sharing */
#include "bcma_regs.h"
struct bcma_device;
struct bcma_bus;
enum bcma_hosttype {
BCMA_HOSTTYPE_PCI,
BCMA_HOSTTYPE_SDIO,
BCMA_HOSTTYPE_SOC,
};
struct bcma_chipinfo {
u16 id;
u8 rev;
u8 pkg;
};
struct bcma_boardinfo {
u16 vendor;
u16 type;
};
enum bcma_clkmode {
BCMA_CLKMODE_FAST,
BCMA_CLKMODE_DYNAMIC,
};
struct bcma_host_ops {
u8 (*read8)(struct bcma_device *core, u16 offset);
u16 (*read16)(struct bcma_device *core, u16 offset);
u32 (*read32)(struct bcma_device *core, u16 offset);
void (*write8)(struct bcma_device *core, u16 offset, u8 value);
void (*write16)(struct bcma_device *core, u16 offset, u16 value);
void (*write32)(struct bcma_device *core, u16 offset, u32 value);
#ifdef CONFIG_BCMA_BLOCKIO
void (*block_read)(struct bcma_device *core, void *buffer,
size_t count, u16 offset, u8 reg_width);
void (*block_write)(struct bcma_device *core, const void *buffer,
size_t count, u16 offset, u8 reg_width);
#endif
/* Agent ops */
u32 (*aread32)(struct bcma_device *core, u16 offset);
void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
};
/* Core manufacturers */
#define BCMA_MANUF_ARM 0x43B
#define BCMA_MANUF_MIPS 0x4A7
#define BCMA_MANUF_BCM 0x4BF
/* Core class values. */
#define BCMA_CL_SIM 0x0
#define BCMA_CL_EROM 0x1
#define BCMA_CL_CORESIGHT 0x9
#define BCMA_CL_VERIF 0xB
#define BCMA_CL_OPTIMO 0xD
#define BCMA_CL_GEN 0xE
#define BCMA_CL_PRIMECELL 0xF
/* Core-ID values. */
#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
#define BCMA_CORE_4706_CHIPCOMMON 0x500
#define BCMA_CORE_4706_SOC_RAM 0x50E
#define BCMA_CORE_4706_MAC_GBIT 0x52D
#define BCMA_CORE_AMEMC 0x52E /* DDR1/2 memory controller core */
#define BCMA_CORE_ALTA 0x534 /* I2S core */
#define BCMA_CORE_4706_MAC_GBIT_COMMON 0x5DC
#define BCMA_CORE_DDR23_PHY 0x5DD
#define BCMA_CORE_INVALID 0x700
#define BCMA_CORE_CHIPCOMMON 0x800
#define BCMA_CORE_ILINE20 0x801
#define BCMA_CORE_SRAM 0x802
#define BCMA_CORE_SDRAM 0x803
#define BCMA_CORE_PCI 0x804
#define BCMA_CORE_MIPS 0x805
#define BCMA_CORE_ETHERNET 0x806
#define BCMA_CORE_V90 0x807
#define BCMA_CORE_USB11_HOSTDEV 0x808
#define BCMA_CORE_ADSL 0x809
#define BCMA_CORE_ILINE100 0x80A
#define BCMA_CORE_IPSEC 0x80B
#define BCMA_CORE_UTOPIA 0x80C
#define BCMA_CORE_PCMCIA 0x80D
#define BCMA_CORE_INTERNAL_MEM 0x80E
#define BCMA_CORE_MEMC_SDRAM 0x80F
#define BCMA_CORE_OFDM 0x810
#define BCMA_CORE_EXTIF 0x811
#define BCMA_CORE_80211 0x812
#define BCMA_CORE_PHY_A 0x813
#define BCMA_CORE_PHY_B 0x814
#define BCMA_CORE_PHY_G 0x815
#define BCMA_CORE_MIPS_3302 0x816
#define BCMA_CORE_USB11_HOST 0x817
#define BCMA_CORE_USB11_DEV 0x818
#define BCMA_CORE_USB20_HOST 0x819
#define BCMA_CORE_USB20_DEV 0x81A
#define BCMA_CORE_SDIO_HOST 0x81B
#define BCMA_CORE_ROBOSWITCH 0x81C
#define BCMA_CORE_PARA_ATA 0x81D
#define BCMA_CORE_SATA_XORDMA 0x81E
#define BCMA_CORE_ETHERNET_GBIT 0x81F
#define BCMA_CORE_PCIE 0x820
#define BCMA_CORE_PHY_N 0x821
#define BCMA_CORE_SRAM_CTL 0x822
#define BCMA_CORE_MINI_MACPHY 0x823
#define BCMA_CORE_ARM_1176 0x824
#define BCMA_CORE_ARM_7TDMI 0x825
#define BCMA_CORE_PHY_LP 0x826
#define BCMA_CORE_PMU 0x827
#define BCMA_CORE_PHY_SSN 0x828
#define BCMA_CORE_SDIO_DEV 0x829
#define BCMA_CORE_ARM_CM3 0x82A
#define BCMA_CORE_PHY_HT 0x82B
#define BCMA_CORE_MIPS_74K 0x82C
#define BCMA_CORE_MAC_GBIT 0x82D
#define BCMA_CORE_DDR12_MEM_CTL 0x82E
#define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */
#define BCMA_CORE_OCP_OCP_BRIDGE 0x830
#define BCMA_CORE_SHARED_COMMON 0x831
#define BCMA_CORE_OCP_AHB_BRIDGE 0x832
#define BCMA_CORE_SPI_HOST 0x833
#define BCMA_CORE_I2S 0x834
#define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
#define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
#define BCMA_CORE_DEFAULT 0xFFF
#define BCMA_MAX_NR_CORES 16
/* Chip IDs of PCIe devices */
#define BCMA_CHIP_ID_BCM4313 0x4313
#define BCMA_CHIP_ID_BCM43224 43224
#define BCMA_PKG_ID_BCM43224_FAB_CSM 0x8
#define BCMA_PKG_ID_BCM43224_FAB_SMIC 0xa
#define BCMA_CHIP_ID_BCM43225 43225
#define BCMA_CHIP_ID_BCM43227 43227
#define BCMA_CHIP_ID_BCM43228 43228
#define BCMA_CHIP_ID_BCM43421 43421
#define BCMA_CHIP_ID_BCM43428 43428
#define BCMA_CHIP_ID_BCM43431 43431
#define BCMA_CHIP_ID_BCM43460 43460
#define BCMA_CHIP_ID_BCM4331 0x4331
#define BCMA_CHIP_ID_BCM6362 0x6362
#define BCMA_CHIP_ID_BCM4360 0x4360
#define BCMA_CHIP_ID_BCM4352 0x4352
/* Chip IDs of SoCs */
#define BCMA_CHIP_ID_BCM4706 0x5300
#define BCMA_CHIP_ID_BCM4716 0x4716
#define BCMA_PKG_ID_BCM4716 8
#define BCMA_PKG_ID_BCM4717 9
#define BCMA_PKG_ID_BCM4718 10
#define BCMA_CHIP_ID_BCM47162 47162
#define BCMA_CHIP_ID_BCM4748 0x4748
#define BCMA_CHIP_ID_BCM4749 0x4749
#define BCMA_CHIP_ID_BCM5356 0x5356
#define BCMA_CHIP_ID_BCM5357 0x5357
#define BCMA_CHIP_ID_BCM53572 53572
struct bcma_device {
struct bcma_bus *bus;
struct bcma_device_id id;
struct device dev;
struct device *dma_dev;
unsigned int irq;
bool dev_registered;
u8 core_index;
u8 core_unit;
u32 addr;
u32 addr1;
u32 wrap;
void __iomem *io_addr;
void __iomem *io_wrap;
void *drvdata;
struct list_head list;
};
static inline void *bcma_get_drvdata(struct bcma_device *core)
{
return core->drvdata;
}
static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata)
{
core->drvdata = drvdata;
}
struct bcma_driver {
const char *name;
const struct bcma_device_id *id_table;
int (*probe)(struct bcma_device *dev);
void (*remove)(struct bcma_device *dev);
int (*suspend)(struct bcma_device *dev);
int (*resume)(struct bcma_device *dev);
void (*shutdown)(struct bcma_device *dev);
struct device_driver drv;
};
extern
int __bcma_driver_register(struct bcma_driver *drv, struct module *owner);
#define bcma_driver_register(drv) \
__bcma_driver_register(drv, THIS_MODULE)
extern void bcma_driver_unregister(struct bcma_driver *drv);
/* Set a fallback SPROM.
* See kdoc at the function definition for complete documentation. */
extern int bcma_arch_register_fallback_sprom(
int (*sprom_callback)(struct bcma_bus *bus,
struct ssb_sprom *out));
struct bcma_bus {
/* The MMIO area. */
void __iomem *mmio;
const struct bcma_host_ops *ops;
enum bcma_hosttype hosttype;
union {
/* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
struct pci_dev *host_pci;
/* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
struct sdio_func *host_sdio;
};
struct bcma_chipinfo chipinfo;
struct bcma_boardinfo boardinfo;
struct bcma_device *mapped_core;
struct list_head cores;
u8 nr_cores;
u8 init_done:1;
u8 num;
struct bcma_drv_cc drv_cc;
struct bcma_drv_pci drv_pci;
struct bcma_drv_mips drv_mips;
/* We decided to share SPROM struct with SSB as long as we do not need
* any hacks for BCMA. This simplifies drivers code. */
struct ssb_sprom sprom;
};
static inline u32 bcma_read8(struct bcma_device *core, u16 offset)
{
return core->bus->ops->read8(core, offset);
}
static inline u32 bcma_read16(struct bcma_device *core, u16 offset)
{
return core->bus->ops->read16(core, offset);
}
static inline u32 bcma_read32(struct bcma_device *core, u16 offset)
{
return core->bus->ops->read32(core, offset);
}
static inline
void bcma_write8(struct bcma_device *core, u16 offset, u32 value)
{
core->bus->ops->write8(core, offset, value);
}
static inline
void bcma_write16(struct bcma_device *core, u16 offset, u32 value)
{
core->bus->ops->write16(core, offset, value);
}
static inline
void bcma_write32(struct bcma_device *core, u16 offset, u32 value)
{
core->bus->ops->write32(core, offset, value);
}
#ifdef CONFIG_BCMA_BLOCKIO
static inline void bcma_block_read(struct bcma_device *core, void *buffer,
size_t count, u16 offset, u8 reg_width)
{
core->bus->ops->block_read(core, buffer, count, offset, reg_width);
}
static inline void bcma_block_write(struct bcma_device *core,
const void *buffer, size_t count,
u16 offset, u8 reg_width)
{
core->bus->ops->block_write(core, buffer, count, offset, reg_width);
}
#endif
static inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
{
return core->bus->ops->aread32(core, offset);
}
static inline
void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value)
{
core->bus->ops->awrite32(core, offset, value);
}
static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask)
{
bcma_write32(cc, offset, bcma_read32(cc, offset) & mask);
}
static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set)
{
bcma_write32(cc, offset, bcma_read32(cc, offset) | set);
}
static inline void bcma_maskset32(struct bcma_device *cc,
u16 offset, u32 mask, u32 set)
{
bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set);
}
static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask)
{
bcma_write16(cc, offset, bcma_read16(cc, offset) & mask);
}
static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set)
{
bcma_write16(cc, offset, bcma_read16(cc, offset) | set);
}
static inline void bcma_maskset16(struct bcma_device *cc,
u16 offset, u16 mask, u16 set)
{
bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
}
extern struct bcma_device *bcma_find_core(struct bcma_bus *bus, u16 coreid);
extern bool bcma_core_is_enabled(struct bcma_device *core);
extern void bcma_core_disable(struct bcma_device *core, u32 flags);
extern int bcma_core_enable(struct bcma_device *core, u32 flags);
extern void bcma_core_set_clockmode(struct bcma_device *core,
enum bcma_clkmode clkmode);
extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
bool on);
#define BCMA_DMA_TRANSLATION_MASK 0xC0000000
#define BCMA_DMA_TRANSLATION_NONE 0x00000000
#define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
#define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
extern u32 bcma_core_dma_translation(struct bcma_device *core);
#endif /* LINUX_BCMA_H_ */
external/compat-wireless/include/linux/bcma/bcma_driver_chipcommon.h
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#ifndef LINUX_BCMA_DRIVER_CC_H_
#define LINUX_BCMA_DRIVER_CC_H_
/** ChipCommon core registers. **/
#define BCMA_CC_ID 0x0000
#define BCMA_CC_ID_ID 0x0000FFFF
#define BCMA_CC_ID_ID_SHIFT 0
#define BCMA_CC_ID_REV 0x000F0000
#define BCMA_CC_ID_REV_SHIFT 16
#define BCMA_CC_ID_PKG 0x00F00000
#define BCMA_CC_ID_PKG_SHIFT 20
#define BCMA_CC_ID_NRCORES 0x0F000000
#define BCMA_CC_ID_NRCORES_SHIFT 24
#define BCMA_CC_ID_TYPE 0xF0000000
#define BCMA_CC_ID_TYPE_SHIFT 28
#define BCMA_CC_CAP 0x0004 /* Capabilities */
#define BCMA_CC_CAP_NRUART 0x00000003 /* # of UARTs */
#define BCMA_CC_CAP_MIPSEB 0x00000004 /* MIPS in BigEndian Mode */
#define BCMA_CC_CAP_UARTCLK 0x00000018 /* UART clock select */
#define BCMA_CC_CAP_UARTCLK_INT 0x00000008 /* UARTs are driven by internal divided clock */
#define BCMA_CC_CAP_UARTGPIO 0x00000020 /* UARTs on GPIO 15-12 */
#define BCMA_CC_CAP_EXTBUS 0x000000C0 /* External buses present */
#define BCMA_CC_CAP_FLASHT 0x00000700 /* Flash Type */
#define BCMA_CC_FLASHT_NONE 0x00000000 /* No flash */
#define BCMA_CC_FLASHT_STSER 0x00000100 /* ST serial flash */
#define BCMA_CC_FLASHT_ATSER 0x00000200 /* Atmel serial flash */
#define BCMA_CC_FLASHT_NFLASH 0x00000200
#define BCMA_CC_FLASHT_PARA 0x00000700 /* Parallel flash */
#define BCMA_CC_CAP_PLLT 0x00038000 /* PLL Type */
#define BCMA_PLLTYPE_NONE 0x00000000
#define BCMA_PLLTYPE_1 0x00010000 /* 48Mhz base, 3 dividers */
#define BCMA_PLLTYPE_2 0x00020000 /* 48Mhz, 4 dividers */
#define BCMA_PLLTYPE_3 0x00030000 /* 25Mhz, 2 dividers */
#define BCMA_PLLTYPE_4 0x00008000 /* 48Mhz, 4 dividers */
#define BCMA_PLLTYPE_5 0x00018000 /* 25Mhz, 4 dividers */
#define BCMA_PLLTYPE_6 0x00028000 /* 100/200 or 120/240 only */
#define BCMA_PLLTYPE_7 0x00038000 /* 25Mhz, 4 dividers */
#define BCMA_CC_CAP_PCTL 0x00040000 /* Power Control */
#define BCMA_CC_CAP_OTPS 0x00380000 /* OTP size */
#define BCMA_CC_CAP_OTPS_SHIFT 19
#define BCMA_CC_CAP_OTPS_BASE 5
#define BCMA_CC_CAP_JTAGM 0x00400000 /* JTAG master present */
#define BCMA_CC_CAP_BROM 0x00800000 /* Internal boot ROM active */
#define BCMA_CC_CAP_64BIT 0x08000000 /* 64-bit Backplane */
#define BCMA_CC_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */
#define BCMA_CC_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */
#define BCMA_CC_CAP_SPROM 0x40000000 /* SPROM present */
#define BCMA_CC_CORECTL 0x0008
#define BCMA_CC_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */
#define BCMA_CC_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */
#define BCMA_CC_CORECTL_UARTCLKEN 0x00000008 /* UART clock enable (rev >= 21) */
#define BCMA_CC_BIST 0x000C
#define BCMA_CC_OTPS 0x0010 /* OTP status */
#define BCMA_CC_OTPS_PROGFAIL 0x80000000
#define BCMA_CC_OTPS_PROTECT 0x00000007
#define BCMA_CC_OTPS_HW_PROTECT 0x00000001
#define BCMA_CC_OTPS_SW_PROTECT 0x00000002
#define BCMA_CC_OTPS_CID_PROTECT 0x00000004
#define BCMA_CC_OTPS_GU_PROG_IND 0x00000F00 /* General Use programmed indication */
#define BCMA_CC_OTPS_GU_PROG_IND_SHIFT 8
#define BCMA_CC_OTPS_GU_PROG_HW 0x00000100 /* HW region programmed */
#define BCMA_CC_OTPC 0x0014 /* OTP control */
#define BCMA_CC_OTPC_RECWAIT 0xFF000000
#define BCMA_CC_OTPC_PROGWAIT 0x00FFFF00
#define BCMA_CC_OTPC_PRW_SHIFT 8
#define BCMA_CC_OTPC_MAXFAIL 0x00000038
#define BCMA_CC_OTPC_VSEL 0x00000006
#define BCMA_CC_OTPC_SELVL 0x00000001
#define BCMA_CC_OTPP 0x0018 /* OTP prog */
#define BCMA_CC_OTPP_COL 0x000000FF
#define BCMA_CC_OTPP_ROW 0x0000FF00
#define BCMA_CC_OTPP_ROW_SHIFT 8
#define BCMA_CC_OTPP_READERR 0x10000000
#define BCMA_CC_OTPP_VALUE 0x20000000
#define BCMA_CC_OTPP_READ 0x40000000
#define BCMA_CC_OTPP_START 0x80000000
#define BCMA_CC_OTPP_BUSY 0x80000000
#define BCMA_CC_OTPL 0x001C /* OTP layout */
#define BCMA_CC_OTPL_GURGN_OFFSET 0x00000FFF /* offset of general use region */
#define BCMA_CC_IRQSTAT 0x0020
#define BCMA_CC_IRQMASK 0x0024
#define BCMA_CC_IRQ_GPIO 0x00000001 /* gpio intr */
#define BCMA_CC_IRQ_EXT 0x00000002 /* ro: ext intr pin (corerev >= 3) */
#define BCMA_CC_IRQ_WDRESET 0x80000000 /* watchdog reset occurred */
#define BCMA_CC_CHIPCTL 0x0028 /* Rev >= 11 only */
#define BCMA_CC_CHIPSTAT 0x002C /* Rev >= 11 only */
#define BCMA_CC_CHIPST_4313_SPROM_PRESENT 1
#define BCMA_CC_CHIPST_4313_OTP_PRESENT 2
#define BCMA_CC_CHIPST_4331_SPROM_PRESENT 2
#define BCMA_CC_CHIPST_4331_OTP_PRESENT 4
#define BCMA_CC_JCMD 0x0030 /* Rev >= 10 only */
#define BCMA_CC_JCMD_START 0x80000000
#define BCMA_CC_JCMD_BUSY 0x80000000
#define BCMA_CC_JCMD_PAUSE 0x40000000
#define BCMA_CC_JCMD0_ACC_MASK 0x0000F000
#define BCMA_CC_JCMD0_ACC_IRDR 0x00000000
#define BCMA_CC_JCMD0_ACC_DR 0x00001000
#define BCMA_CC_JCMD0_ACC_IR 0x00002000
#define BCMA_CC_JCMD0_ACC_RESET 0x00003000
#define BCMA_CC_JCMD0_ACC_IRPDR 0x00004000
#define BCMA_CC_JCMD0_ACC_PDR 0x00005000
#define BCMA_CC_JCMD0_IRW_MASK 0x00000F00
#define BCMA_CC_JCMD_ACC_MASK 0x000F0000 /* Changes for corerev 11 */
#define BCMA_CC_JCMD_ACC_IRDR 0x00000000
#define BCMA_CC_JCMD_ACC_DR 0x00010000
#define BCMA_CC_JCMD_ACC_IR 0x00020000
#define BCMA_CC_JCMD_ACC_RESET 0x00030000
#define BCMA_CC_JCMD_ACC_IRPDR 0x00040000
#define BCMA_CC_JCMD_ACC_PDR 0x00050000
#define BCMA_CC_JCMD_IRW_MASK 0x00001F00
#define BCMA_CC_JCMD_IRW_SHIFT 8
#define BCMA_CC_JCMD_DRW_MASK 0x0000003F
#define BCMA_CC_JIR 0x0034 /* Rev >= 10 only */
#define BCMA_CC_JDR 0x0038 /* Rev >= 10 only */
#define BCMA_CC_JCTL 0x003C /* Rev >= 10 only */
#define BCMA_CC_JCTL_FORCE_CLK 4 /* Force clock */
#define BCMA_CC_JCTL_EXT_EN 2 /* Enable external targets */
#define BCMA_CC_JCTL_EN 1 /* Enable Jtag master */
#define BCMA_CC_FLASHCTL 0x0040
#define BCMA_CC_FLASHCTL_START 0x80000000
#define BCMA_CC_FLASHCTL_BUSY BCMA_CC_FLASHCTL_START
#define BCMA_CC_FLASHADDR 0x0044
#define BCMA_CC_FLASHDATA 0x0048
#define BCMA_CC_BCAST_ADDR 0x0050
#define BCMA_CC_BCAST_DATA 0x0054
#define BCMA_CC_GPIOPULLUP 0x0058 /* Rev >= 20 only */
#define BCMA_CC_GPIOPULLDOWN 0x005C /* Rev >= 20 only */
#define BCMA_CC_GPIOIN 0x0060
#define BCMA_CC_GPIOOUT 0x0064
#define BCMA_CC_GPIOOUTEN 0x0068
#define BCMA_CC_GPIOCTL 0x006C
#define BCMA_CC_GPIOPOL 0x0070
#define BCMA_CC_GPIOIRQ 0x0074
#define BCMA_CC_WATCHDOG 0x0080
#define BCMA_CC_GPIOTIMER 0x0088 /* LED powersave (corerev >= 16) */
#define BCMA_CC_GPIOTIMER_OFFTIME 0x0000FFFF
#define BCMA_CC_GPIOTIMER_OFFTIME_SHIFT 0
#define BCMA_CC_GPIOTIMER_ONTIME 0xFFFF0000
#define BCMA_CC_GPIOTIMER_ONTIME_SHIFT 16
#define BCMA_CC_GPIOTOUTM 0x008C /* LED powersave (corerev >= 16) */
#define BCMA_CC_CLOCK_N 0x0090
#define BCMA_CC_CLOCK_SB 0x0094
#define BCMA_CC_CLOCK_PCI 0x0098
#define BCMA_CC_CLOCK_M2 0x009C
#define BCMA_CC_CLOCK_MIPS 0x00A0
#define BCMA_CC_CLKDIV 0x00A4 /* Rev >= 3 only */
#define BCMA_CC_CLKDIV_SFLASH 0x0F000000
#define BCMA_CC_CLKDIV_SFLASH_SHIFT 24
#define BCMA_CC_CLKDIV_OTP 0x000F0000
#define BCMA_CC_CLKDIV_OTP_SHIFT 16
#define BCMA_CC_CLKDIV_JTAG 0x00000F00
#define BCMA_CC_CLKDIV_JTAG_SHIFT 8
#define BCMA_CC_CLKDIV_UART 0x000000FF
#define BCMA_CC_CAP_EXT 0x00AC /* Capabilities */
#define BCMA_CC_PLLONDELAY 0x00B0 /* Rev >= 4 only */
#define BCMA_CC_FREFSELDELAY 0x00B4 /* Rev >= 4 only */
#define BCMA_CC_SLOWCLKCTL 0x00B8 /* 6 <= Rev <= 9 only */
#define BCMA_CC_SLOWCLKCTL_SRC 0x00000007 /* slow clock source mask */
#define BCMA_CC_SLOWCLKCTL_SRC_LPO 0x00000000 /* source of slow clock is LPO */
#define BCMA_CC_SLOWCLKCTL_SRC_XTAL 0x00000001 /* source of slow clock is crystal */
#define BCMA_CC_SLOECLKCTL_SRC_PCI 0x00000002 /* source of slow clock is PCI */
#define BCMA_CC_SLOWCLKCTL_LPOFREQ 0x00000200 /* LPOFreqSel, 1: 160Khz, 0: 32KHz */
#define BCMA_CC_SLOWCLKCTL_LPOPD 0x00000400 /* LPOPowerDown, 1: LPO is disabled, 0: LPO is enabled */
#define BCMA_CC_SLOWCLKCTL_FSLOW 0x00000800 /* ForceSlowClk, 1: sb/cores running on slow clock, 0: power logic control */
#define BCMA_CC_SLOWCLKCTL_IPLL 0x00001000 /* IgnorePllOffReq, 1/0: power logic ignores/honors PLL clock disable requests from core */
#define BCMA_CC_SLOWCLKCTL_ENXTAL 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't disable crystal when appropriate */
#define BCMA_CC_SLOWCLKCTL_XTALPU 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */
#define BCMA_CC_SLOWCLKCTL_CLKDIV 0xFFFF0000 /* ClockDivider (SlowClk = 1/(4+divisor)) */
#define BCMA_CC_SLOWCLKCTL_CLKDIV_SHIFT 16
#define BCMA_CC_SYSCLKCTL 0x00C0 /* Rev >= 3 only */
#define BCMA_CC_SYSCLKCTL_IDLPEN 0x00000001 /* ILPen: Enable Idle Low Power */
#define BCMA_CC_SYSCLKCTL_ALPEN 0x00000002 /* ALPen: Enable Active Low Power */
#define BCMA_CC_SYSCLKCTL_PLLEN 0x00000004 /* ForcePLLOn */
#define BCMA_CC_SYSCLKCTL_FORCEALP 0x00000008 /* Force ALP (or HT if ALPen is not set */
#define BCMA_CC_SYSCLKCTL_FORCEHT 0x00000010 /* Force HT */
#define BCMA_CC_SYSCLKCTL_CLKDIV 0xFFFF0000 /* ClkDiv (ILP = 1/(4+divisor)) */
#define BCMA_CC_SYSCLKCTL_CLKDIV_SHIFT 16
#define BCMA_CC_CLKSTSTR 0x00C4 /* Rev >= 3 only */
#define BCMA_CC_EROM 0x00FC
#define BCMA_CC_PCMCIA_CFG 0x0100
#define BCMA_CC_PCMCIA_MEMWAIT 0x0104
#define BCMA_CC_PCMCIA_ATTRWAIT 0x0108
#define BCMA_CC_PCMCIA_IOWAIT 0x010C
#define BCMA_CC_IDE_CFG 0x0110
#define BCMA_CC_IDE_MEMWAIT 0x0114
#define BCMA_CC_IDE_ATTRWAIT 0x0118
#define BCMA_CC_IDE_IOWAIT 0x011C
#define BCMA_CC_PROG_CFG 0x0120
#define BCMA_CC_PROG_WAITCNT 0x0124
#define BCMA_CC_FLASH_CFG 0x0128
#define BCMA_CC_FLASH_CFG_DS 0x0010 /* Data size, 0=8bit, 1=16bit */
#define BCMA_CC_FLASH_WAITCNT 0x012C
#define BCMA_CC_SROM_CONTROL 0x0190
#define BCMA_CC_SROM_CONTROL_START 0x80000000
#define BCMA_CC_SROM_CONTROL_BUSY 0x80000000
#define BCMA_CC_SROM_CONTROL_OPCODE 0x60000000
#define BCMA_CC_SROM_CONTROL_OP_READ 0x00000000
#define BCMA_CC_SROM_CONTROL_OP_WRITE 0x20000000
#define BCMA_CC_SROM_CONTROL_OP_WRDIS 0x40000000
#define BCMA_CC_SROM_CONTROL_OP_WREN 0x60000000
#define BCMA_CC_SROM_CONTROL_OTPSEL 0x00000010
#define BCMA_CC_SROM_CONTROL_LOCK 0x00000008
#define BCMA_CC_SROM_CONTROL_SIZE_MASK 0x00000006
#define BCMA_CC_SROM_CONTROL_SIZE_1K 0x00000000
#define BCMA_CC_SROM_CONTROL_SIZE_4K 0x00000002
#define BCMA_CC_SROM_CONTROL_SIZE_16K 0x00000004
#define BCMA_CC_SROM_CONTROL_SIZE_SHIFT 1
#define BCMA_CC_SROM_CONTROL_PRESENT 0x00000001
/* 0x1E0 is defined as shared BCMA_CLKCTLST */
#define BCMA_CC_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */
#define BCMA_CC_UART0_DATA 0x0300
#define BCMA_CC_UART0_IMR 0x0304
#define BCMA_CC_UART0_FCR 0x0308
#define BCMA_CC_UART0_LCR 0x030C
#define BCMA_CC_UART0_MCR 0x0310
#define BCMA_CC_UART0_LSR 0x0314
#define BCMA_CC_UART0_MSR 0x0318
#define BCMA_CC_UART0_SCRATCH 0x031C
#define BCMA_CC_UART1_DATA 0x0400
#define BCMA_CC_UART1_IMR 0x0404
#define BCMA_CC_UART1_FCR 0x0408
#define BCMA_CC_UART1_LCR 0x040C
#define BCMA_CC_UART1_MCR 0x0410
#define BCMA_CC_UART1_LSR 0x0414
#define BCMA_CC_UART1_MSR 0x0418
#define BCMA_CC_UART1_SCRATCH 0x041C
/* PMU registers (rev >= 20) */
#define BCMA_CC_PMU_CTL 0x0600 /* PMU control */
#define BCMA_CC_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */
#define BCMA_CC_PMU_CTL_ILP_DIV_SHIFT 16
#define BCMA_CC_PMU_CTL_PLL_UPD 0x00000400
#define BCMA_CC_PMU_CTL_NOILPONW 0x00000200 /* No ILP on wait */
#define BCMA_CC_PMU_CTL_HTREQEN 0x00000100 /* HT req enable */
#define BCMA_CC_PMU_CTL_ALPREQEN 0x00000080 /* ALP req enable */
#define BCMA_CC_PMU_CTL_XTALFREQ 0x0000007C /* Crystal freq */
#define BCMA_CC_PMU_CTL_XTALFREQ_SHIFT 2
#define BCMA_CC_PMU_CTL_ILPDIVEN 0x00000002 /* ILP div enable */
#define BCMA_CC_PMU_CTL_LPOSEL 0x00000001 /* LPO sel */
#define BCMA_CC_PMU_CAP 0x0604 /* PMU capabilities */
#define BCMA_CC_PMU_CAP_REVISION 0x000000FF /* Revision mask */
#define BCMA_CC_PMU_STAT 0x0608 /* PMU status */
#define BCMA_CC_PMU_STAT_INTPEND 0x00000040 /* Interrupt pending */
#define BCMA_CC_PMU_STAT_SBCLKST 0x00000030 /* Backplane clock status? */
#define BCMA_CC_PMU_STAT_HAVEALP 0x00000008 /* ALP available */
#define BCMA_CC_PMU_STAT_HAVEHT 0x00000004 /* HT available */
#define BCMA_CC_PMU_STAT_RESINIT 0x00000003 /* Res init */
#define BCMA_CC_PMU_RES_STAT 0x060C /* PMU res status */
#define BCMA_CC_PMU_RES_PEND 0x0610 /* PMU res pending */
#define BCMA_CC_PMU_TIMER 0x0614 /* PMU timer */
#define BCMA_CC_PMU_MINRES_MSK 0x0618 /* PMU min res mask */
#define BCMA_CC_PMU_MAXRES_MSK 0x061C /* PMU max res mask */
#define BCMA_CC_PMU_RES_TABSEL 0x0620 /* PMU res table sel */
#define BCMA_CC_PMU_RES_DEPMSK 0x0624 /* PMU res dep mask */
#define BCMA_CC_PMU_RES_UPDNTM 0x0628 /* PMU res updown timer */
#define BCMA_CC_PMU_RES_TIMER 0x062C /* PMU res timer */
#define BCMA_CC_PMU_CLKSTRETCH 0x0630 /* PMU clockstretch */
#define BCMA_CC_PMU_WATCHDOG 0x0634 /* PMU watchdog */
#define BCMA_CC_PMU_RES_REQTS 0x0640 /* PMU res req timer sel */
#define BCMA_CC_PMU_RES_REQT 0x0644 /* PMU res req timer */
#define BCMA_CC_PMU_RES_REQM 0x0648 /* PMU res req mask */
#define BCMA_CC_CHIPCTL_ADDR 0x0650
#define BCMA_CC_CHIPCTL_DATA 0x0654
#define BCMA_CC_REGCTL_ADDR 0x0658
#define BCMA_CC_REGCTL_DATA 0x065C
#define BCMA_CC_PLLCTL_ADDR 0x0660
#define BCMA_CC_PLLCTL_DATA 0x0664
#define BCMA_CC_SPROM 0x0800 /* SPROM beginning */
/* Divider allocation in 4716/47162/5356 */
#define BCMA_CC_PMU5_MAINPLL_CPU 1
#define BCMA_CC_PMU5_MAINPLL_MEM 2
#define BCMA_CC_PMU5_MAINPLL_SSB 3
/* PLL usage in 4716/47162 */
#define BCMA_CC_PMU4716_MAINPLL_PLL0 12
/* PLL usage in 5356/5357 */
#define BCMA_CC_PMU5356_MAINPLL_PLL0 0
#define BCMA_CC_PMU5357_MAINPLL_PLL0 0
/* 4706 PMU */
#define BCMA_CC_PMU4706_MAINPLL_PLL0 0
/* ALP clock on pre-PMU chips */
#define BCMA_CC_PMU_ALP_CLOCK 20000000
/* HT clock for systems with PMU-enabled chipcommon */
#define BCMA_CC_PMU_HT_CLOCK 80000000
/* PMU rev 5 (& 6) */
#define BCMA_CC_PPL_P1P2_OFF 0
#define BCMA_CC_PPL_P1_MASK 0x0f000000
#define BCMA_CC_PPL_P1_SHIFT 24
#define BCMA_CC_PPL_P2_MASK 0x00f00000
#define BCMA_CC_PPL_P2_SHIFT 20
#define BCMA_CC_PPL_M14_OFF 1
#define BCMA_CC_PPL_MDIV_MASK 0x000000ff
#define BCMA_CC_PPL_MDIV_WIDTH 8
#define BCMA_CC_PPL_NM5_OFF 2
#define BCMA_CC_PPL_NDIV_MASK 0xfff00000
#define BCMA_CC_PPL_NDIV_SHIFT 20
#define BCMA_CC_PPL_FMAB_OFF 3
#define BCMA_CC_PPL_MRAT_MASK 0xf0000000
#define BCMA_CC_PPL_MRAT_SHIFT 28
#define BCMA_CC_PPL_ABRAT_MASK 0x08000000
#define BCMA_CC_PPL_ABRAT_SHIFT 27
#define BCMA_CC_PPL_FDIV_MASK 0x07ffffff
#define BCMA_CC_PPL_PLLCTL_OFF 4
#define BCMA_CC_PPL_PCHI_OFF 5
#define BCMA_CC_PPL_PCHI_MASK 0x0000003f
#define BCMA_CC_PMU_PLL_CTL0 0
#define BCMA_CC_PMU_PLL_CTL1 1
#define BCMA_CC_PMU_PLL_CTL2 2
#define BCMA_CC_PMU_PLL_CTL3 3
#define BCMA_CC_PMU_PLL_CTL4 4
#define BCMA_CC_PMU_PLL_CTL5 5
#define BCMA_CC_PMU1_PLL0_PC0_P1DIV_MASK 0x00f00000
#define BCMA_CC_PMU1_PLL0_PC0_P1DIV_SHIFT 20
#define BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000
#define BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_SHIFT 20
/* BCM4331 ChipControl numbers. */
#define BCMA_CHIPCTL_4331_BT_COEXIST BIT(0) /* 0 disable */
#define BCMA_CHIPCTL_4331_SECI BIT(1) /* 0 SECI is disabled (JATG functional) */
#define BCMA_CHIPCTL_4331_EXT_LNA BIT(2) /* 0 disable */
#define BCMA_CHIPCTL_4331_SPROM_GPIO13_15 BIT(3) /* sprom/gpio13-15 mux */
#define BCMA_CHIPCTL_4331_EXTPA_EN BIT(4) /* 0 ext pa disable, 1 ext pa enabled */
#define BCMA_CHIPCTL_4331_GPIOCLK_ON_SPROMCS BIT(5) /* set drive out GPIO_CLK on sprom_cs pin */
#define BCMA_CHIPCTL_4331_PCIE_MDIO_ON_SPROMCS BIT(6) /* use sprom_cs pin as PCIE mdio interface */
#define BCMA_CHIPCTL_4331_EXTPA_ON_GPIO2_5 BIT(7) /* aband extpa will be at gpio2/5 and sprom_dout */
#define BCMA_CHIPCTL_4331_OVR_PIPEAUXCLKEN BIT(8) /* override core control on pipe_AuxClkEnable */
#define BCMA_CHIPCTL_4331_OVR_PIPEAUXPWRDOWN BIT(9) /* override core control on pipe_AuxPowerDown */
#define BCMA_CHIPCTL_4331_PCIE_AUXCLKEN BIT(10) /* pcie_auxclkenable */
#define BCMA_CHIPCTL_4331_PCIE_PIPE_PLLDOWN BIT(11) /* pcie_pipe_pllpowerdown */
#define BCMA_CHIPCTL_4331_EXTPA_EN2 BIT(12) /* 0 ext pa disable, 1 ext pa enabled */
#define BCMA_CHIPCTL_4331_BT_SHD0_ON_GPIO4 BIT(16) /* enable bt_shd0 at gpio4 */
#define BCMA_CHIPCTL_4331_BT_SHD1_ON_GPIO5 BIT(17) /* enable bt_shd1 at gpio5 */
/* 43224 chip-specific ChipControl register bits */
#define BCMA_CCTRL_43224_GPIO_TOGGLE 0x8000 /* gpio[3:0] pins as btcoex or s/w gpio */
#define BCMA_CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 /* 12 mA drive strength */
#define BCMA_CCTRL_43224B0_12MA_LED_DRIVE 0xF0 /* 12 mA drive strength for later 43224s */
/* 4313 Chip specific ChipControl register bits */
#define BCMA_CCTRL_4313_12MA_LED_DRIVE 0x00000007 /* 12 mA drive strengh for later 4313 */
/* Data for the PMU, if available.
* Check availability with ((struct bcma_chipcommon)->capabilities & BCMA_CC_CAP_PMU)
*/
struct bcma_chipcommon_pmu {
u8 rev; /* PMU revision */
u32 crystalfreq; /* The active crystal frequency (in kHz) */
};
#ifdef CONFIG_BCMA_DRIVER_MIPS
struct bcma_pflash {
u8 buswidth;
u32 window;
u32 window_size;
};
struct bcma_serial_port {
void *regs;
unsigned long clockspeed;
unsigned int irq;
unsigned int baud_base;
unsigned int reg_shift;
};
#endif /* CONFIG_BCMA_DRIVER_MIPS */
struct bcma_drv_cc {
struct bcma_device *core;
u32 status;
u32 capabilities;
u32 capabilities_ext;
u8 setup_done:1;
/* Fast Powerup Delay constant */
u16 fast_pwrup_delay;
struct bcma_chipcommon_pmu pmu;
#ifdef CONFIG_BCMA_DRIVER_MIPS
struct bcma_pflash pflash;
int nr_serial_ports;
struct bcma_serial_port serial_ports[4];
#endif /* CONFIG_BCMA_DRIVER_MIPS */
};
/* Register access */
#define bcma_cc_read32(cc, offset) \
bcma_read32((cc)->core, offset)
#define bcma_cc_write32(cc, offset, val) \
bcma_write32((cc)->core, offset, val)
#define bcma_cc_mask32(cc, offset, mask) \
bcma_cc_write32(cc, offset, bcma_cc_read32(cc, offset) & (mask))
#define bcma_cc_set32(cc, offset, set) \
bcma_cc_write32(cc, offset, bcma_cc_read32(cc, offset) | (set))
#define bcma_cc_maskset32(cc, offset, mask, set) \
bcma_cc_write32(cc, offset, (bcma_cc_read32(cc, offset) & (mask)) | (set))
extern void bcma_core_chipcommon_init(struct bcma_drv_cc *cc);
extern void bcma_chipco_suspend(struct bcma_drv_cc *cc);
extern void bcma_chipco_resume(struct bcma_drv_cc *cc);
void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable);
extern void bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc,
u32 ticks);
void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value);
u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask);
/* Chipcommon GPIO pin access. */
u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask);
u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value);
u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value);
u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value);
u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value);
u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value);
/* PMU support */
extern void bcma_pmu_init(struct bcma_drv_cc *cc);
extern void bcma_chipco_pll_write(struct bcma_drv_cc *cc, u32 offset,
u32 value);
extern void bcma_chipco_pll_maskset(struct bcma_drv_cc *cc, u32 offset,
u32 mask, u32 set);
extern void bcma_chipco_chipctl_maskset(struct bcma_drv_cc *cc,
u32 offset, u32 mask, u32 set);
extern void bcma_chipco_regctl_maskset(struct bcma_drv_cc *cc,
u32 offset, u32 mask, u32 set);
extern void bcma_pmu_spuravoid_pllupdate(struct bcma_drv_cc *cc, int spuravoid);
#endif /* LINUX_BCMA_DRIVER_CC_H_ */
external/compat-wireless/include/linux/bcma/bcma_driver_mips.h
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#ifndef LINUX_BCMA_DRIVER_MIPS_H_
#define LINUX_BCMA_DRIVER_MIPS_H_
#define BCMA_MIPS_IPSFLAG 0x0F08
/* which sbflags get routed to mips interrupt 1 */
#define BCMA_MIPS_IPSFLAG_IRQ1 0x0000003F
#define BCMA_MIPS_IPSFLAG_IRQ1_SHIFT 0
/* which sbflags get routed to mips interrupt 2 */
#define BCMA_MIPS_IPSFLAG_IRQ2 0x00003F00
#define BCMA_MIPS_IPSFLAG_IRQ2_SHIFT 8
/* which sbflags get routed to mips interrupt 3 */
#define BCMA_MIPS_IPSFLAG_IRQ3 0x003F0000
#define BCMA_MIPS_IPSFLAG_IRQ3_SHIFT 16
/* which sbflags get routed to mips interrupt 4 */
#define BCMA_MIPS_IPSFLAG_IRQ4 0x3F000000
#define BCMA_MIPS_IPSFLAG_IRQ4_SHIFT 24
/* MIPS 74K core registers */
#define BCMA_MIPS_MIPS74K_CORECTL 0x0000
#define BCMA_MIPS_MIPS74K_EXCEPTBASE 0x0004
#define BCMA_MIPS_MIPS74K_BIST 0x000C
#define BCMA_MIPS_MIPS74K_INTMASK_INT0 0x0014
#define BCMA_MIPS_MIPS74K_INTMASK(int) \
((int) * 4 + BCMA_MIPS_MIPS74K_INTMASK_INT0)
#define BCMA_MIPS_MIPS74K_NMIMASK 0x002C
#define BCMA_MIPS_MIPS74K_GPIOSEL 0x0040
#define BCMA_MIPS_MIPS74K_GPIOOUT 0x0044
#define BCMA_MIPS_MIPS74K_GPIOEN 0x0048
#define BCMA_MIPS_MIPS74K_CLKCTLST 0x01E0
#define BCMA_MIPS_OOBSELOUTA30 0x100
struct bcma_device;
struct bcma_drv_mips {
struct bcma_device *core;
u8 setup_done:1;
unsigned int assigned_irqs;
};
#ifdef CONFIG_BCMA_DRIVER_MIPS
extern void bcma_core_mips_init(struct bcma_drv_mips *mcore);
#else
static inline void bcma_core_mips_init(struct bcma_drv_mips *mcore) { }
#endif
extern u32 bcma_cpu_clock(struct bcma_drv_mips *mcore);
extern unsigned int bcma_core_mips_irq(struct bcma_device *dev);
#endif /* LINUX_BCMA_DRIVER_MIPS_H_ */
external/compat-wireless/include/linux/bcma/bcma_driver_pci.h
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#ifndef LINUX_BCMA_DRIVER_PCI_H_
#define LINUX_BCMA_DRIVER_PCI_H_
#include <linux/types.h>
struct pci_dev;
/** PCI core registers. **/
#define BCMA_CORE_PCI_CTL 0x0000 /* PCI Control */
#define BCMA_CORE_PCI_CTL_RST_OE 0x00000001 /* PCI_RESET Output Enable */
#define BCMA_CORE_PCI_CTL_RST 0x00000002 /* PCI_RESET driven out to pin */
#define BCMA_CORE_PCI_CTL_CLK_OE 0x00000004 /* Clock gate Output Enable */
#define BCMA_CORE_PCI_CTL_CLK 0x00000008 /* Gate for clock driven out to pin */
#define BCMA_CORE_PCI_ARBCTL 0x0010 /* PCI Arbiter Control */
#define BCMA_CORE_PCI_ARBCTL_INTERN 0x00000001 /* Use internal arbiter */
#define BCMA_CORE_PCI_ARBCTL_EXTERN 0x00000002 /* Use external arbiter */
#define BCMA_CORE_PCI_ARBCTL_PARKID 0x00000006 /* Mask, selects which agent is parked on an idle bus */
#define BCMA_CORE_PCI_ARBCTL_PARKID_LAST 0x00000000 /* Last requestor */
#define BCMA_CORE_PCI_ARBCTL_PARKID_4710 0x00000002 /* 4710 */
#define BCMA_CORE_PCI_ARBCTL_PARKID_EXT0 0x00000004 /* External requestor 0 */
#define BCMA_CORE_PCI_ARBCTL_PARKID_EXT1 0x00000006 /* External requestor 1 */
#define BCMA_CORE_PCI_ISTAT 0x0020 /* Interrupt status */
#define BCMA_CORE_PCI_ISTAT_INTA 0x00000001 /* PCI INTA# */
#define BCMA_CORE_PCI_ISTAT_INTB 0x00000002 /* PCI INTB# */
#define BCMA_CORE_PCI_ISTAT_SERR 0x00000004 /* PCI SERR# (write to clear) */
#define BCMA_CORE_PCI_ISTAT_PERR 0x00000008 /* PCI PERR# (write to clear) */
#define BCMA_CORE_PCI_ISTAT_PME 0x00000010 /* PCI PME# */
#define BCMA_CORE_PCI_IMASK 0x0024 /* Interrupt mask */
#define BCMA_CORE_PCI_IMASK_INTA 0x00000001 /* PCI INTA# */
#define BCMA_CORE_PCI_IMASK_INTB 0x00000002 /* PCI INTB# */
#define BCMA_CORE_PCI_IMASK_SERR 0x00000004 /* PCI SERR# */
#define BCMA_CORE_PCI_IMASK_PERR 0x00000008 /* PCI PERR# */
#define BCMA_CORE_PCI_IMASK_PME 0x00000010 /* PCI PME# */
#define BCMA_CORE_PCI_MBOX 0x0028 /* Backplane to PCI Mailbox */
#define BCMA_CORE_PCI_MBOX_F0_0 0x00000100 /* PCI function 0, INT 0 */
#define BCMA_CORE_PCI_MBOX_F0_1 0x00000200 /* PCI function 0, INT 1 */
#define BCMA_CORE_PCI_MBOX_F1_0 0x00000400 /* PCI function 1, INT 0 */
#define BCMA_CORE_PCI_MBOX_F1_1 0x00000800 /* PCI function 1, INT 1 */
#define BCMA_CORE_PCI_MBOX_F2_0 0x00001000 /* PCI function 2, INT 0 */
#define BCMA_CORE_PCI_MBOX_F2_1 0x00002000 /* PCI function 2, INT 1 */
#define BCMA_CORE_PCI_MBOX_F3_0 0x00004000 /* PCI function 3, INT 0 */
#define BCMA_CORE_PCI_MBOX_F3_1 0x00008000 /* PCI function 3, INT 1 */
#define BCMA_CORE_PCI_BCAST_ADDR 0x0050 /* Backplane Broadcast Address */
#define BCMA_CORE_PCI_BCAST_ADDR_MASK 0x000000FF
#define BCMA_CORE_PCI_BCAST_DATA 0x0054 /* Backplane Broadcast Data */
#define BCMA_CORE_PCI_GPIO_IN 0x0060 /* rev >= 2 only */
#define BCMA_CORE_PCI_GPIO_OUT 0x0064 /* rev >= 2 only */
#define BCMA_CORE_PCI_GPIO_ENABLE 0x0068 /* rev >= 2 only */
#define BCMA_CORE_PCI_GPIO_CTL 0x006C /* rev >= 2 only */
#define BCMA_CORE_PCI_SBTOPCI0 0x0100 /* Backplane to PCI translation 0 (sbtopci0) */
#define BCMA_CORE_PCI_SBTOPCI0_MASK 0xFC000000
#define BCMA_CORE_PCI_SBTOPCI1 0x0104 /* Backplane to PCI translation 1 (sbtopci1) */
#define BCMA_CORE_PCI_SBTOPCI1_MASK 0xFC000000
#define BCMA_CORE_PCI_SBTOPCI2 0x0108 /* Backplane to PCI translation 2 (sbtopci2) */
#define BCMA_CORE_PCI_SBTOPCI2_MASK 0xC0000000
#define BCMA_CORE_PCI_CONFIG_ADDR 0x0120 /* pcie config space access */
#define BCMA_CORE_PCI_CONFIG_DATA 0x0124 /* pcie config space access */
#define BCMA_CORE_PCI_MDIO_CONTROL 0x0128 /* controls the mdio access */
#define BCMA_CORE_PCI_MDIOCTL_DIVISOR_MASK 0x7f /* clock to be used on MDIO */
#define BCMA_CORE_PCI_MDIOCTL_DIVISOR_VAL 0x2
#define BCMA_CORE_PCI_MDIOCTL_PREAM_EN 0x80 /* Enable preamble sequnce */
#define BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE 0x100 /* Tranaction complete */
#define BCMA_CORE_PCI_MDIO_DATA 0x012c /* Data to the mdio access */
#define BCMA_CORE_PCI_MDIODATA_MASK 0x0000ffff /* data 2 bytes */
#define BCMA_CORE_PCI_MDIODATA_TA 0x00020000 /* Turnaround */
#define BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift (rev < 10) */
#define BCMA_CORE_PCI_MDIODATA_REGADDR_MASK_OLD 0x003c0000 /* Regaddr Mask (rev < 10) */
#define BCMA_CORE_PCI_MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift (rev < 10) */
#define BCMA_CORE_PCI_MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 /* Physmedia devaddr Mask (rev < 10) */
#define BCMA_CORE_PCI_MDIODATA_REGADDR_SHF 18 /* Regaddr shift */
#define BCMA_CORE_PCI_MDIODATA_REGADDR_MASK 0x007c0000 /* Regaddr Mask */
#define BCMA_CORE_PCI_MDIODATA_DEVADDR_SHF 23 /* Physmedia devaddr shift */
#define BCMA_CORE_PCI_MDIODATA_DEVADDR_MASK 0x0f800000 /* Physmedia devaddr Mask */
#define BCMA_CORE_PCI_MDIODATA_WRITE 0x10000000 /* write Transaction */
#define BCMA_CORE_PCI_MDIODATA_READ 0x20000000 /* Read Transaction */
#define BCMA_CORE_PCI_MDIODATA_START 0x40000000 /* start of Transaction */
#define BCMA_CORE_PCI_MDIODATA_DEV_ADDR 0x0 /* dev address for serdes */
#define BCMA_CORE_PCI_MDIODATA_BLK_ADDR 0x1F /* blk address for serdes */
#define BCMA_CORE_PCI_MDIODATA_DEV_PLL 0x1d /* SERDES PLL Dev */
#define BCMA_CORE_PCI_MDIODATA_DEV_TX 0x1e /* SERDES TX Dev */
#define BCMA_CORE_PCI_MDIODATA_DEV_RX 0x1f /* SERDES RX Dev */
#define BCMA_CORE_PCI_PCIEIND_ADDR 0x0130 /* indirect access to the internal register */
#define BCMA_CORE_PCI_PCIEIND_DATA 0x0134 /* Data to/from the internal regsiter */
#define BCMA_CORE_PCI_CLKREQENCTRL 0x0138 /* >= rev 6, Clkreq rdma control */
#define BCMA_CORE_PCI_PCICFG0 0x0400 /* PCI config space 0 (rev >= 8) */
#define BCMA_CORE_PCI_PCICFG1 0x0500 /* PCI config space 1 (rev >= 8) */
#define BCMA_CORE_PCI_PCICFG2 0x0600 /* PCI config space 2 (rev >= 8) */
#define BCMA_CORE_PCI_PCICFG3 0x0700 /* PCI config space 3 (rev >= 8) */
#define BCMA_CORE_PCI_SPROM(wordoffset) (0x0800 + ((wordoffset) * 2)) /* SPROM shadow area (72 bytes) */
#define BCMA_CORE_PCI_SPROM_PI_OFFSET 0 /* first word */
#define BCMA_CORE_PCI_SPROM_PI_MASK 0xf000 /* bit 15:12 */
#define BCMA_CORE_PCI_SPROM_PI_SHIFT 12 /* bit 15:12 */
#define BCMA_CORE_PCI_SPROM_MISC_CONFIG 5 /* word 5 */
#define BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */
#define BCMA_CORE_PCI_SPROM_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */
#define BCMA_CORE_PCI_SPROM_CLKREQ_ENB 0x0800 /* bit 11 */
/* SBtoPCIx */
#define BCMA_CORE_PCI_SBTOPCI_MEM 0x00000000
#define BCMA_CORE_PCI_SBTOPCI_IO 0x00000001
#define BCMA_CORE_PCI_SBTOPCI_CFG0 0x00000002
#define BCMA_CORE_PCI_SBTOPCI_CFG1 0x00000003
#define BCMA_CORE_PCI_SBTOPCI_PREF 0x00000004 /* Prefetch enable */
#define BCMA_CORE_PCI_SBTOPCI_BURST 0x00000008 /* Burst enable */
#define BCMA_CORE_PCI_SBTOPCI_MRM 0x00000020 /* Memory Read Multiple */
#define BCMA_CORE_PCI_SBTOPCI_RC 0x00000030 /* Read Command mask (rev >= 11) */
#define BCMA_CORE_PCI_SBTOPCI_RC_READ 0x00000000 /* Memory read */
#define BCMA_CORE_PCI_SBTOPCI_RC_READL 0x00000010 /* Memory read line */
#define BCMA_CORE_PCI_SBTOPCI_RC_READM 0x00000020 /* Memory read multiple */
/* PCIE protocol PHY diagnostic registers */
#define BCMA_CORE_PCI_PLP_MODEREG 0x200 /* Mode */
#define BCMA_CORE_PCI_PLP_STATUSREG 0x204 /* Status */
#define BCMA_CORE_PCI_PLP_POLARITYINV_STAT 0x10 /* Status reg PCIE_PLP_STATUSREG */
#define BCMA_CORE_PCI_PLP_LTSSMCTRLREG 0x208 /* LTSSM control */
#define BCMA_CORE_PCI_PLP_LTLINKNUMREG 0x20c /* Link Training Link number */
#define BCMA_CORE_PCI_PLP_LTLANENUMREG 0x210 /* Link Training Lane number */
#define BCMA_CORE_PCI_PLP_LTNFTSREG 0x214 /* Link Training N_FTS */
#define BCMA_CORE_PCI_PLP_ATTNREG 0x218 /* Attention */
#define BCMA_CORE_PCI_PLP_ATTNMASKREG 0x21C /* Attention Mask */
#define BCMA_CORE_PCI_PLP_RXERRCTR 0x220 /* Rx Error */
#define BCMA_CORE_PCI_PLP_RXFRMERRCTR 0x224 /* Rx Framing Error */
#define BCMA_CORE_PCI_PLP_RXERRTHRESHREG 0x228 /* Rx Error threshold */
#define BCMA_CORE_PCI_PLP_TESTCTRLREG 0x22C /* Test Control reg */
#define BCMA_CORE_PCI_PLP_SERDESCTRLOVRDREG 0x230 /* SERDES Control Override */
#define BCMA_CORE_PCI_PLP_TIMINGOVRDREG 0x234 /* Timing param override */
#define BCMA_CORE_PCI_PLP_RXTXSMDIAGREG 0x238 /* RXTX State Machine Diag */
#define BCMA_CORE_PCI_PLP_LTSSMDIAGREG 0x23C /* LTSSM State Machine Diag */
/* PCIE protocol DLLP diagnostic registers */
#define BCMA_CORE_PCI_DLLP_LCREG 0x100 /* Link Control */
#define BCMA_CORE_PCI_DLLP_LSREG 0x104 /* Link Status */
#define BCMA_CORE_PCI_DLLP_LAREG 0x108 /* Link Attention */
#define BCMA_CORE_PCI_DLLP_LSREG_LINKUP (1 << 16)
#define BCMA_CORE_PCI_DLLP_LAMASKREG 0x10C /* Link Attention Mask */
#define BCMA_CORE_PCI_DLLP_NEXTTXSEQNUMREG 0x110 /* Next Tx Seq Num */
#define BCMA_CORE_PCI_DLLP_ACKEDTXSEQNUMREG 0x114 /* Acked Tx Seq Num */
#define BCMA_CORE_PCI_DLLP_PURGEDTXSEQNUMREG 0x118 /* Purged Tx Seq Num */
#define BCMA_CORE_PCI_DLLP_RXSEQNUMREG 0x11C /* Rx Sequence Number */
#define BCMA_CORE_PCI_DLLP_LRREG 0x120 /* Link Replay */
#define BCMA_CORE_PCI_DLLP_LACKTOREG 0x124 /* Link Ack Timeout */
#define BCMA_CORE_PCI_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */
#define BCMA_CORE_PCI_ASPMTIMER_EXTEND 0x01000000 /* > rev7: enable extend ASPM timer */
#define BCMA_CORE_PCI_DLLP_RTRYWPREG 0x12C /* Retry buffer write ptr */
#define BCMA_CORE_PCI_DLLP_RTRYRPREG 0x130 /* Retry buffer Read ptr */
#define BCMA_CORE_PCI_DLLP_RTRYPPREG 0x134 /* Retry buffer Purged ptr */
#define BCMA_CORE_PCI_DLLP_RTRRWREG 0x138 /* Retry buffer Read/Write */
#define BCMA_CORE_PCI_DLLP_ECTHRESHREG 0x13C /* Error Count Threshold */
#define BCMA_CORE_PCI_DLLP_TLPERRCTRREG 0x140 /* TLP Error Counter */
#define BCMA_CORE_PCI_DLLP_ERRCTRREG 0x144 /* Error Counter */
#define BCMA_CORE_PCI_DLLP_NAKRXCTRREG 0x148 /* NAK Received Counter */
#define BCMA_CORE_PCI_DLLP_TESTREG 0x14C /* Test */
#define BCMA_CORE_PCI_DLLP_PKTBIST 0x150 /* Packet BIST */
#define BCMA_CORE_PCI_DLLP_PCIE11 0x154 /* DLLP PCIE 1.1 reg */
/* SERDES RX registers */
#define BCMA_CORE_PCI_SERDES_RX_CTRL 1 /* Rx cntrl */
#define BCMA_CORE_PCI_SERDES_RX_CTRL_FORCE 0x80 /* rxpolarity_force */
#define BCMA_CORE_PCI_SERDES_RX_CTRL_POLARITY 0x40 /* rxpolarity_value */
#define BCMA_CORE_PCI_SERDES_RX_TIMER1 2 /* Rx Timer1 */
#define BCMA_CORE_PCI_SERDES_RX_CDR 6 /* CDR */
#define BCMA_CORE_PCI_SERDES_RX_CDRBW 7 /* CDR BW */
/* SERDES PLL registers */
#define BCMA_CORE_PCI_SERDES_PLL_CTRL 1 /* PLL control reg */
#define BCMA_CORE_PCI_PLL_CTRL_FREQDET_EN 0x4000 /* bit 14 is FREQDET on */
/* PCIcore specific boardflags */
#define BCMA_CORE_PCI_BFL_NOPCI 0x00000400 /* Board leaves PCI floating */
/* PCIE Config space accessing MACROS */
#define BCMA_CORE_PCI_CFG_BUS_SHIFT 24 /* Bus shift */
#define BCMA_CORE_PCI_CFG_SLOT_SHIFT 19 /* Slot/Device shift */
#define BCMA_CORE_PCI_CFG_FUN_SHIFT 16 /* Function shift */
#define BCMA_CORE_PCI_CFG_OFF_SHIFT 0 /* Register shift */
#define BCMA_CORE_PCI_CFG_BUS_MASK 0xff /* Bus mask */
#define BCMA_CORE_PCI_CFG_SLOT_MASK 0x1f /* Slot/Device mask */
#define BCMA_CORE_PCI_CFG_FUN_MASK 7 /* Function mask */
#define BCMA_CORE_PCI_CFG_OFF_MASK 0xfff /* Register mask */
/* PCIE Root Capability Register bits (Host mode only) */
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
struct bcma_drv_pci;
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
struct bcma_drv_pci_host {
struct bcma_drv_pci *pdev;
u32 host_cfg_addr;
spinlock_t cfgspace_lock;
struct pci_controller pci_controller;
struct pci_ops pci_ops;
struct resource mem_resource;
struct resource io_resource;
};
#endif
struct bcma_drv_pci {
struct bcma_device *core;
u8 setup_done:1;
u8 hostmode:1;
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
struct bcma_drv_pci_host *host_controller;
#endif
};
/* Register access */
#define pcicore_read16(pc, offset) bcma_read16((pc)->core, offset)
#define pcicore_read32(pc, offset) bcma_read32((pc)->core, offset)
#define pcicore_write16(pc, offset, val) bcma_write16((pc)->core, offset, val)
#define pcicore_write32(pc, offset, val) bcma_write32((pc)->core, offset, val)
extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc);
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
struct bcma_device *core, bool enable);
extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
#endif /* LINUX_BCMA_DRIVER_PCI_H_ */
external/compat-wireless/include/linux/bcma/bcma_regs.h
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#ifndef LINUX_BCMA_REGS_H_
#define LINUX_BCMA_REGS_H_
/* Some single registers are shared between many cores */
/* BCMA_CLKCTLST: ChipCommon (rev >= 20), PCIe, 80211 */
#define BCMA_CLKCTLST 0x01E0 /* Clock control and status */
#define BCMA_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */
#define BCMA_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */
#define BCMA_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */
#define BCMA_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */
#define BCMA_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */
#define BCMA_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */
#define BCMA_CLKCTLST_EXTRESREQ 0x00000700 /* Mask of external resource requests */
#define BCMA_CLKCTLST_HAVEALP 0x00010000 /* ALP available */
#define BCMA_CLKCTLST_HAVEHT 0x00020000 /* HT available */
#define BCMA_CLKCTLST_BP_ON_ALP 0x00040000 /* RO: running on ALP clock */
#define BCMA_CLKCTLST_BP_ON_HT 0x00080000 /* RO: running on HT clock */
#define BCMA_CLKCTLST_EXTRESST 0x07000000 /* Mask of external resource status */
/* Is there any BCM4328 on BCMA bus? */
#define BCMA_CLKCTLST_4328A0_HAVEHT 0x00010000 /* 4328a0 has reversed bits */
#define BCMA_CLKCTLST_4328A0_HAVEALP 0x00020000 /* 4328a0 has reversed bits */
/* Agent registers (common for every core) */
#define BCMA_IOCTL 0x0408 /* IO control */
#define BCMA_IOCTL_CLK 0x0001
#define BCMA_IOCTL_FGC 0x0002
#define BCMA_IOCTL_CORE_BITS 0x3FFC
#define BCMA_IOCTL_PME_EN 0x4000
#define BCMA_IOCTL_BIST_EN 0x8000
#define BCMA_IOST 0x0500 /* IO status */
#define BCMA_IOST_CORE_BITS 0x0FFF
#define BCMA_IOST_DMA64 0x1000
#define BCMA_IOST_GATED_CLK 0x2000
#define BCMA_IOST_BIST_ERROR 0x4000
#define BCMA_IOST_BIST_DONE 0x8000
#define BCMA_RESET_CTL 0x0800
#define BCMA_RESET_CTL_RESET 0x0001
/* BCMA PCI config space registers. */
#define BCMA_PCI_PMCSR 0x44
#define BCMA_PCI_PE 0x100
#define BCMA_PCI_BAR0_WIN 0x80 /* Backplane address space 0 */
#define BCMA_PCI_BAR1_WIN 0x84 /* Backplane address space 1 */
#define BCMA_PCI_SPROMCTL 0x88 /* SPROM control */
#define BCMA_PCI_SPROMCTL_WE 0x10 /* SPROM write enable */
#define BCMA_PCI_BAR1_CONTROL 0x8c /* Address space 1 burst control */
#define BCMA_PCI_IRQS 0x90 /* PCI interrupts */
#define BCMA_PCI_IRQMASK 0x94 /* PCI IRQ control and mask (pcirev >= 6 only) */
#define BCMA_PCI_BACKPLANE_IRQS 0x98 /* Backplane Interrupts */
#define BCMA_PCI_BAR0_WIN2 0xAC
#define BCMA_PCI_GPIO_IN 0xB0 /* GPIO Input (pcirev >= 3 only) */
#define BCMA_PCI_GPIO_OUT 0xB4 /* GPIO Output (pcirev >= 3 only) */
#define BCMA_PCI_GPIO_OUT_ENABLE 0xB8 /* GPIO Output Enable/Disable (pcirev >= 3 only) */
#define BCMA_PCI_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */
#define BCMA_PCI_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */
#define BCMA_PCI_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */
#define BCMA_PCI_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */
/* SiliconBackplane Address Map.
* All regions may not exist on all chips.
*/
#define BCMA_SOC_SDRAM_BASE 0x00000000U /* Physical SDRAM */
#define BCMA_SOC_PCI_MEM 0x08000000U /* Host Mode sb2pcitranslation0 (64 MB) */
#define BCMA_SOC_PCI_MEM_SZ (64 * 1024 * 1024)
#define BCMA_SOC_PCI_CFG 0x0c000000U /* Host Mode sb2pcitranslation1 (64 MB) */
#define BCMA_SOC_SDRAM_SWAPPED 0x10000000U /* Byteswapped Physical SDRAM */
#define BCMA_SOC_SDRAM_R2 0x80000000U /* Region 2 for sdram (512 MB) */
#define BCMA_SOC_PCI_DMA 0x40000000U /* Client Mode sb2pcitranslation2 (1 GB) */
#define BCMA_SOC_PCI_DMA2 0x80000000U /* Client Mode sb2pcitranslation2 (1 GB) */
#define BCMA_SOC_PCI_DMA_SZ 0x40000000U /* Client Mode sb2pcitranslation2 size in bytes */
#define BCMA_SOC_PCIE_DMA_L32 0x00000000U /* PCIE Client Mode sb2pcitranslation2
* (2 ZettaBytes), low 32 bits
*/
#define BCMA_SOC_PCIE_DMA_H32 0x80000000U /* PCIE Client Mode sb2pcitranslation2
* (2 ZettaBytes), high 32 bits
*/
#define BCMA_SOC_PCI1_MEM 0x40000000U /* Host Mode sb2pcitranslation0 (64 MB) */
#define BCMA_SOC_PCI1_CFG 0x44000000U /* Host Mode sb2pcitranslation1 (64 MB) */
#define BCMA_SOC_PCIE1_DMA_H32 0xc0000000U /* PCIE Client Mode sb2pcitranslation2
* (2 ZettaBytes), high 32 bits
*/
#endif /* LINUX_BCMA_REGS_H_ */
external/compat-wireless/include/linux/bcma/bcma_soc.h
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#ifndef LINUX_BCMA_SOC_H_
#define LINUX_BCMA_SOC_H_
#include <linux/bcma/bcma.h>
struct bcma_soc {
struct bcma_bus bus;
struct bcma_device core_cc;
struct bcma_device core_mips;
};
int __init bcma_host_soc_register(struct bcma_soc *soc);
int bcma_bus_register(struct bcma_bus *bus);
#endif /* LINUX_BCMA_SOC_H_ */
external/compat-wireless/include/linux/bitops.h
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#ifndef _LINUX_BITOPS_H
#define _LINUX_BITOPS_H
#include <asm/types.h>
#ifdef __KERNEL__
#define BIT(nr) (1UL << (nr))
#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
#define BITS_PER_BYTE 8
#ifndef BITS_TO_LONGS /* Older kernels define this already */
#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
#endif
#endif
extern unsigned int __sw_hweight8(unsigned int w);
extern unsigned int __sw_hweight16(unsigned int w);
extern unsigned int __sw_hweight32(unsigned int w);
extern unsigned long __sw_hweight64(__u64 w);
/*
* Include this here because some architectures need generic_ffs/fls in
* scope
*/
#include <asm/bitops.h>
#define for_each_set_bit(bit, addr, size) \
for ((bit) = find_first_bit((addr), (size)); \
(bit) < (size); \
(bit) = find_next_bit((addr), (size), (bit) + 1))
static __inline__ int get_bitmask_order(unsigned int count)
{
int order;
order = fls(count);
return order; /* We could be slightly more clever with -1 here... */
}
static __inline__ int get_count_order(unsigned int count)
{
int order;
order = fls(count) - 1;
if (count & (count - 1))
order++;
return order;
}
static inline unsigned long hweight_long(unsigned long w)
{
return sizeof(w) == 4 ? hweight32(w) : hweight64(w);
}
/**
* rol32 - rotate a 32-bit value left
* @word: value to rotate
* @shift: bits to roll
*/
static inline __u32 rol32(__u32 word, unsigned int shift)
{
return (word << shift) | (word >> (32 - shift));
}
/**
* ror32 - rotate a 32-bit value right
* @word: value to rotate
* @shift: bits to roll
*/
static inline __u32 ror32(__u32 word, unsigned int shift)
{
return (word >> shift) | (word << (32 - shift));
}
/**
* rol16 - rotate a 16-bit value left
* @word: value to rotate
* @shift: bits to roll
*/
static inline __u16 rol16(__u16 word, unsigned int shift)
{
return (word << shift) | (word >> (16 - shift));
}
/**
* ror16 - rotate a 16-bit value right
* @word: value to rotate
* @shift: bits to roll
*/
static inline __u16 ror16(__u16 word, unsigned int shift)
{
return (word >> shift) | (word << (16 - shift));
}
/**
* rol8 - rotate an 8-bit value left
* @word: value to rotate
* @shift: bits to roll
*/
static inline __u8 rol8(__u8 word, unsigned int shift)
{
return (word << shift) | (word >> (8 - shift));
}
/**
* ror8 - rotate an 8-bit value right
* @word: value to rotate
* @shift: bits to roll
*/
static inline __u8 ror8(__u8 word, unsigned int shift)
{
return (word >> shift) | (word << (8 - shift));
}
/**
* sign_extend32 - sign extend a 32-bit value using specified bit as sign-bit
* @value: value to sign extend
* @index: 0 based bit index (0<=index<32) to sign bit
*/
static inline __s32 sign_extend32(__u32 value, int index)
{
__u8 shift = 31 - index;
return (__s32)(value << shift) >> shift;
}
static inline unsigned fls_long(unsigned long l)
{
if (sizeof(l) == 4)
return fls(l);
return fls64(l);
}
/**
* __ffs64 - find first set bit in a 64 bit word
* @word: The 64 bit word
*
* On 64 bit arches this is a synomyn for __ffs
* The result is not defined if no bits are set, so check that @word
* is non-zero before calling this.
*/
static inline unsigned long __ffs64(u64 word)
{
#if BITS_PER_LONG == 32
if (((u32)word) == 0UL)
return __ffs((u32)(word >> 32)) + 32;
#elif BITS_PER_LONG != 64
#error BITS_PER_LONG not 32 or 64
#endif
return __ffs((unsigned long)word);
}
#ifdef __KERNEL__
#ifdef CONFIG_GENERIC_FIND_FIRST_BIT
/**
* find_first_bit - find the first set bit in a memory region
* @addr: The address to start the search at
* @size: The maximum size to search
*
* Returns the bit number of the first set bit.
*/
extern unsigned long find_first_bit(const unsigned long *addr,
unsigned long size);
/**
* find_first_zero_bit - find the first cleared bit in a memory region
* @addr: The address to start the search at
* @size: The maximum size to search
*
* Returns the bit number of the first cleared bit.
*/
extern unsigned long find_first_zero_bit(const unsigned long *addr,
unsigned long size);
#endif /* CONFIG_GENERIC_FIND_FIRST_BIT */
#ifdef CONFIG_GENERIC_FIND_LAST_BIT
/**
* find_last_bit - find the last set bit in a memory region
* @addr: The address to start the search at
* @size: The maximum size to search
*
* Returns the bit number of the first set bit, or size.
*/
extern unsigned long find_last_bit(const unsigned long *addr,
unsigned long size);
#endif /* CONFIG_GENERIC_FIND_LAST_BIT */
#ifdef CONFIG_GENERIC_FIND_NEXT_BIT
/**
* find_next_bit - find the next set bit in a memory region
* @addr: The address to base the search on
* @offset: The bitnumber to start searching at
* @size: The bitmap size in bits
*/
extern unsigned long find_next_bit(const unsigned long *addr,
unsigned long size, unsigned long offset);
/**
* find_next_zero_bit - find the next cleared bit in a memory region
* @addr: The address to base the search on
* @offset: The bitnumber to start searching at
* @size: The bitmap size in bits
*/
extern unsigned long find_next_zero_bit(const unsigned long *addr,
unsigned long size,
unsigned long offset);
#endif /* CONFIG_GENERIC_FIND_NEXT_BIT */
#endif /* __KERNEL__ */
#endif
external/compat-wireless/include/linux/compat-2.6.14.h
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#ifndef LINUX_26_14_COMPAT_H
#define LINUX_26_14_COMPAT_H
#include <linux/version.h>
/* Compat work for 2.6.14 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14))
typedef unsigned int gfp_t;
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14)) */
#endif /* LINUX_26_14_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.18.h
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#ifndef LINUX_26_18_COMPAT_H
#define LINUX_26_18_COMPAT_H
#include <linux/version.h>
/* Compat work for 2.6.18 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18))
#define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) */
#endif /* LINUX_26_18_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.19.h
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#ifndef LINUX_26_19_COMPAT_H
#define LINUX_26_19_COMPAT_H
#include <linux/version.h>
/* Compat work for 2.6.19 */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19))
#include <linux/slab.h>
static inline int
compat_kmem_cache_destroy(struct kmem_cache *cachep)
{
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
return kmem_cache_destroy(cachep);
#else
kmem_cache_destroy(cachep);
return 0;
#endif
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)) */
#endif /* LINUX_26_19_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.20.h
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#ifndef LINUX_26_20_COMPAT_H
#define LINUX_26_20_COMPAT_H
#include <linux/version.h>
/* Compat work for 2.6.20 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
#include <linux/workqueue.h>
typedef void (*work_func_t)(struct work_struct *work);
typedef void (*compat_work_func_t)(void *work);
static inline void (INIT_WORK)(struct work_struct *work, work_func_t func)
{
INIT_WORK(work, (compat_work_func_t)func, work);
}
#undef INIT_WORK
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)) */
#endif /* LINUX_26_20_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.21.h
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#ifndef LINUX_26_21_COMPAT_H
#define LINUX_26_21_COMPAT_H
#include <linux/version.h>
/* Compat work for 2.6.21 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
#include <linux/sysctl.h>
#define register_sysctl_table(table) \
({ \
register_sysctl_table((table), 0); \
})
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) */
#endif /* LINUX_26_21_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.22.h
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#ifndef LINUX_26_22_COMPAT_H
#define LINUX_26_22_COMPAT_H
#include <linux/version.h>
/* Compat work for 2.6.21 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
#include <linux/pci.h>
#include <linux/skbuff.h>
/* reuse ax25_ptr */
#define ieee80211_ptr ax25_ptr
#ifdef CONFIG_AX25
#error Compat reuses the AX.25 pointer so that may not be enabled!
#endif
static inline unsigned char *skb_mac_header(const struct sk_buff *skb)
{
return skb->mac.raw;
}
static inline void skb_set_mac_header(struct sk_buff *skb, int offset)
{
skb->mac.raw = skb->data + offset;
}
static inline void skb_reset_mac_header(struct sk_buff *skb)
{
skb->mac.raw = skb->data;
}
static inline void skb_reset_network_header(struct sk_buff *skb)
{
skb->nh.raw = skb->data;
}
static inline void skb_set_network_header(struct sk_buff *skb, int offset)
{
skb->nh.raw = skb->data + offset;
}
static inline void skb_set_transport_header(struct sk_buff *skb, int offset)
{
skb->h.raw = skb->data + offset;
}
static inline unsigned char *skb_transport_header(struct sk_buff *skb)
{
return skb->h.raw;
}
static inline unsigned char *skb_network_header(const struct sk_buff *skb)
{
return skb->nh.raw;
}
static inline unsigned char *skb_tail_pointer(const struct sk_buff *skb)
{
return skb->tail;
}
static inline struct iphdr *ip_hdr(const struct sk_buff *skb)
{
return (struct iphdr *)skb_network_header(skb);
}
static inline void skb_copy_from_linear_data(const struct sk_buff *skb,
void *to,
const unsigned int len)
{
memcpy(to, skb->data, len);
}
static inline void skb_copy_from_linear_data_offset(const struct sk_buff *skb,
const int offset, void *to,
const unsigned int len)
{
memcpy(to, skb->data + offset, len);
}
#define __maybe_unused __attribute__((unused))
#define uninitialized_var(x) x = x
/* This will lead to very weird behaviour... */
#define NLA_BINARY NLA_STRING
static inline int pci_set_mwi(struct pci_dev *dev)
{
return -ENOSYS;
}
static inline void pci_clear_mwi(struct pci_dev *dev)
{
}
#define list_first_entry(ptr, type, member) \
list_entry((ptr)->next, type, member)
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)) */
#endif /* LINUX_26_22_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.23.h
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#ifndef LINUX_26_23_COMPAT_H
#define LINUX_26_23_COMPAT_H
#include <linux/version.h>
/* Compat work for < 2.6.23 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23))
#include <linux/netdevice.h>
#include <linux/sched.h>
#include <linux/workqueue.h>
#include <linux/genetlink.h>
#include <net/sch_generic.h>
/*
* Tell gcc if a function is cold. The compiler will assume any path
* directly leading to the call is unlikely.
*/
#if !(__GNUC__ == 4 && __GNUC_MINOR__ < 3)
/* Mark functions as cold. gcc will assume any path leading to a call
* to them will be unlikely. This means a lot of manual unlikely()s
* are unnecessary now for any paths leading to the usual suspects
* like BUG(), printk(), panic() etc. [but let's keep them for now for
* older compilers]
*
* Early snapshots of gcc 4.3 don't support this and we can't detect this
* in the preprocessor, but we can live with this because they're unreleased.
* Maketime probing would be overkill here.
*
* gcc also has a __attribute__((__hot__)) to move hot functions into
* a special section, but I don't see any sense in this right now in
* the kernel context */
#define __cold __attribute__((__cold__))
#endif /* gcc 4.3 check */
#ifndef __cold
#define __cold
#endif
/* Added as of 2.6.23 in include/linux/netdevice.h */
#define alloc_netdev_mq(sizeof_priv, name, setup, queue) \
alloc_netdev(sizeof_priv, name, setup)
#define NETIF_F_MULTI_QUEUE 16384
/* Added as of 2.6.23 on include/linux/netdevice.h */
static inline int netif_is_multiqueue(const struct net_device *dev)
{
return (!!(NETIF_F_MULTI_QUEUE & dev->features));
}
/* 2.6.23 fixed a bug in tcf_destroy_chain and the parameter changed */
static inline void tcf_destroy_chain_compat(struct tcf_proto **fl)
{
struct tcf_proto *tp;
while ((tp = *fl) != NULL) {
*fl = tp->next;
tp->ops->destroy(tp);
module_put(tp->ops->owner);
kfree(tp);
}
}
/* dev_mc_list was replaced with dev_addr_list as of 2.6.23,
* only new member added is da_synced. */
#define dev_addr_list dev_mc_list
#define da_addr dmi_addr
#define da_addrlen dmi_addrlen
#define da_users dmi_users
#define da_gusers dmi_gusers
/* dev_set_promiscuity() was moved to __dev_set_promiscuity() on 2.6.23 and
* dev_set_promiscuity() became a wrapper. */
#define __dev_set_promiscuity dev_set_promiscuity
/* Our own 2.6.22 port on compat.c */
extern void dev_mc_unsync(struct net_device *to, struct net_device *from);
extern int dev_mc_sync(struct net_device *to, struct net_device *from);
/* Our own 2.6.22 port on compat.c */
extern void __dev_set_rx_mode(struct net_device *dev);
/* Simple to add this */
extern int cancel_delayed_work_sync(struct delayed_work *work);
#define cancel_delayed_work_sync cancel_rearming_delayed_work
#define debugfs_rename(a, b, c, d) 1
/* nl80211 requires multicast group support which is new and added on
* 2.6.23. We can't add support for it for older kernels to support it
* genl_family structure was changed. Lets just let through the
* genl_register_mc_group call. This means no multicast group suppport */
#define genl_register_mc_group(a, b) 0
/**
* struct genl_multicast_group - generic netlink multicast group
* @name: name of the multicast group, names are per-family
* @id: multicast group ID, assigned by the core, to use with
* genlmsg_multicast().
* @list: list entry for linking
* @family: pointer to family, need not be set before registering
*/
struct genl_multicast_group
{
struct genl_family *family; /* private */
struct list_head list; /* private */
char name[GENL_NAMSIZ];
u32 id;
};
/* Added as of 2.6.23 */
int pci_try_set_mwi(struct pci_dev *dev);
/* Added as of 2.6.23 */
#ifdef CONFIG_PM_SLEEP
/*
* Tell the freezer that the current task should be frozen by it
*/
static inline void set_freezable(void)
{
current->flags &= ~PF_NOFREEZE;
}
#else
static inline void set_freezable(void) {}
#endif /* CONFIG_PM_SLEEP */
#else
#define tcf_destroy_chain_compat tcf_destroy_chain
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)) */
#endif /* LINUX_26_23_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.24.h
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#ifndef LINUX_26_24_COMPAT_H
#define LINUX_26_24_COMPAT_H
#include <linux/version.h>
/* Compat work for 2.6.21, 2.6.22 and 2.6.23 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
#include <asm/atomic.h>
#include <linux/netdevice.h>
#include <linux/skbuff.h>
#include <linux/usb.h>
#include <linux/types.h>
#include <linux/list.h>
#include <linux/scatterlist.h>
#define KEY_BLUETOOTH 237
#define KEY_WLAN 238
#define KEY_UWB 239
#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
struct proc_dir_entry;
struct net_device;
struct net {
atomic_t count; /* To decided when the network
* namespace should be freed.
*/
atomic_t use_count; /* To track references we
* destroy on demand
*/
struct list_head list; /* list of network namespaces */
struct work_struct work; /* work struct for freeing */
struct proc_dir_entry *proc_net;
struct proc_dir_entry *proc_net_stat;
struct proc_dir_entry *proc_net_root;
struct net_device *loopback_dev; /* The loopback */
struct list_head dev_base_head;
struct hlist_head *dev_name_head;
struct hlist_head *dev_index_head;
};
#ifdef CONFIG_NET
/* Init's network namespace */
extern struct net init_net;
#define INIT_NET_NS(net_ns) .net_ns = &init_net,
#else
#define INIT_NET_NS(net_ns)
#endif
/* Added on 2.6.24 in include/linux/types.h by Al viro on commit 142956af */
typedef unsigned long uintptr_t;
/* From include/linux/net.h */
enum sock_shutdown_cmd {
SHUT_RD = 0,
SHUT_WR = 1,
SHUT_RDWR = 2,
};
#if (LINUX_VERSION_CODE == KERNEL_VERSION(2,6,23)) /* Local check */
/* Added as of 2.6.24 in include/linux/skbuff.h.
*
* Although 2.6.23 does support for CONFIG_NETDEVICES_MULTIQUEUE
* this helper was not added until 2.6.24. This implementation
* is exactly as it is on newer kernels.
*
* For older kernels we use the an internal mac80211 hack.
* For details see changes to include/net/mac80211.h through
* compat.diff and compat/mq_compat.h */
static inline u16 skb_get_queue_mapping(struct sk_buff *skb)
{
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
return skb->queue_mapping;
#else
return 0;
#endif
}
#endif /* Local 2.6.23 check */
/* On older kernels we handle this a bit differently, so we yield to that
* code for its implementation in mq_compat.h as we want to make
* use of the internal mac80211 __ieee80211_queue_stopped() which itself
* uses internal mac80211 data structure hacks. */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)) /* Local check */
/**
* netif_subqueue_stopped - test status of subqueue
* @dev: network device
* @queue_index: sub queue index
*
* Check individual transmit queue of a device with multiple transmit queues.
*/
static inline int __netif_subqueue_stopped(const struct net_device *dev,
u16 queue_index)
{
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
return test_bit(__LINK_STATE_XOFF,
&dev->egress_subqueue[queue_index].state);
#else
return 0;
#endif
}
/* Note: although the backport implementation for netif_subqueue_stopped
* on older kernels is identical to upstream __netif_subqueue_stopped()
* (except for a const qualifier) we implement netif_subqueue_stopped()
* as part of mac80211 as it relies on internal mac80211 structures we
* use for MQ support. We this implement it in mq_compat.h */
#endif /* Local 2.6.23 check */
/*
* Force link bug if constructor is used, can't be done compatibly
* because constructor arguments were swapped since then!
*/
extern void __incompatible_kmem_cache_create(void);
/* 2.6.21 and 2.6.22 kmem_cache_create() takes 6 arguments */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23))
#define kmem_cache_create(name, objsize, align, flags, ctor) \
({ \
if (ctor) __incompatible_kmem_cache_create(); \
kmem_cache_create((name), (objsize), (align), \
(flags), NULL, NULL); \
})
#endif
/* 2.6.23 kmem_cache_create() takes 5 arguments */
#if (LINUX_VERSION_CODE == KERNEL_VERSION(2,6,23))
#define kmem_cache_create(name, objsize, align, flags, ctor) \
({ \
if (ctor) __incompatible_kmem_cache_create(); \
kmem_cache_create((name), (objsize), (align), \
(flags), NULL); \
})
#endif
/* From include/linux/mod_devicetable.h */
/* SSB core, see drivers/ssb/ */
#ifndef SSB_DEVICE
struct ssb_device_id {
__u16 vendor;
__u16 coreid;
__u8 revision;
};
#define SSB_DEVICE(_vendor, _coreid, _revision) \
{ .vendor = _vendor, .coreid = _coreid, .revision = _revision, }
#define SSB_DEVTABLE_END \
{ 0, },
#define SSB_ANY_VENDOR 0xFFFF
#define SSB_ANY_ID 0xFFFF
#define SSB_ANY_REV 0xFF
#endif
/* Namespace stuff, introduced on 2.6.24 */
#define dev_get_by_index(a, b) dev_get_by_index(b)
#define __dev_get_by_index(a, b) __dev_get_by_index(b)
extern int eth_header(struct sk_buff *skb, struct net_device *dev,
unsigned short type, void *daddr,
void *saddr, unsigned len);
extern int eth_rebuild_header(struct sk_buff *skb);
extern void eth_header_cache_update(struct hh_cache *hh, struct net_device *dev,
unsigned char * haddr);
extern int eth_header_cache(struct neighbour *neigh,
struct hh_cache *hh);
/* This structure is simply not present on 2.6.22 and 2.6.23 */
struct header_ops {
int (*create) (struct sk_buff *skb, struct net_device *dev,
unsigned short type, void *daddr,
void *saddr, unsigned len);
int (*parse)(const struct sk_buff *skb, unsigned char *haddr);
int (*rebuild)(struct sk_buff *skb);
#define HAVE_HEADER_CACHE
int (*cache)(struct neighbour *neigh, struct hh_cache *hh);
void (*cache_update)(struct hh_cache *hh,
struct net_device *dev,
unsigned char *haddr);
};
/* net/ieee80211/ieee80211_crypt_tkip uses sg_init_table. This was added on
* 2.6.24. CONFIG_DEBUG_SG was added in 2.6.24 as well, so lets just ignore
* the debug stuff. Note that adding this required changes to the struct
* scatterlist on include/asm/scatterlist*, so the right way to port this
* is to simply ignore the new structure changes and zero the scatterlist
* array. We lave the kdoc intact for reference.
*/
/**
* sg_mark_end - Mark the end of the scatterlist
* @sg: SG entryScatterlist
*
* Description:
* Marks the passed in sg entry as the termination point for the sg
* table. A call to sg_next() on this entry will return NULL.
*
**/
static inline void sg_mark_end(struct scatterlist *sg)
{
#ifdef CONFIG_DEBUG_SG
BUG_ON(sg->sg_magic != SG_MAGIC);
#endif
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
/*
* Set termination bit, clear potential chain bit
*/
sg->page_link |= 0x02;
sg->page_link &= ~0x01;
#endif
}
/**
* sg_init_table - Initialize SG table
* @sgl: The SG table
* @nents: Number of entries in table
*
* Notes:
* If this is part of a chained sg table, sg_mark_end() should be
* used only on the last table part.
*
**/
static inline void sg_init_table(struct scatterlist *sgl, unsigned int nents)
{
memset(sgl, 0, sizeof(*sgl) * nents);
}
/**
* usb_endpoint_num - get the endpoint's number
* @epd: endpoint to be checked
*
* Returns @epd's number: 0 to 15.
*/
static inline int usb_endpoint_num(const struct usb_endpoint_descriptor *epd)
{
return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) */
#endif /* LINUX_26_24_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.25.h
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#ifndef LINUX_26_25_COMPAT_H
#define LINUX_26_25_COMPAT_H
#include <linux/version.h>
/* Compat work for 2.6.24 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25))
#include <linux/types.h>
#include <linux/io.h>
#include <linux/hw_random.h>
#include <linux/leds.h>
#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/pm.h>
#include <asm-generic/bug.h>
#include <linux/pm_qos_params.h>
#include <linux/pci.h>
#include <linux/in.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/pci.h>
/* Backports b718989da7 */
int __must_check pci_enable_device_mem(struct pci_dev *dev);
/*
* Backports 312b1485fb509c9bc32eda28ad29537896658cb8
* Author: Sam Ravnborg <sam@ravnborg.org>
* Date: Mon Jan 28 20:21:15 2008 +0100
*
* Introduce new section reference annotations tags: __ref, __refdata, __refconst
*/
#define __ref __init_refok
#define __refdata __initdata_refok
/*
* backports 2658fa803111dae1353602e7f586de8e537803e2
*/
static inline bool ipv4_is_loopback(__be32 addr)
{
return (addr & htonl(0xff000000)) == htonl(0x7f000000);
}
static inline bool ipv4_is_multicast(__be32 addr)
{
return (addr & htonl(0xf0000000)) == htonl(0xe0000000);
}
static inline bool ipv4_is_local_multicast(__be32 addr)
{
return (addr & htonl(0xffffff00)) == htonl(0xe0000000);
}
static inline bool ipv4_is_lbcast(__be32 addr)
{
/* limited broadcast */
return addr == htonl(INADDR_BROADCAST);
}
static inline bool ipv4_is_zeronet(__be32 addr)
{
return (addr & htonl(0xff000000)) == htonl(0x00000000);
}
/* Special-Use IPv4 Addresses (RFC3330) */
static inline bool ipv4_is_private_10(__be32 addr)
{
return (addr & htonl(0xff000000)) == htonl(0x0a000000);
}
static inline bool ipv4_is_private_172(__be32 addr)
{
return (addr & htonl(0xfff00000)) == htonl(0xac100000);
}
static inline bool ipv4_is_private_192(__be32 addr)
{
return (addr & htonl(0xffff0000)) == htonl(0xc0a80000);
}
static inline bool ipv4_is_linklocal_169(__be32 addr)
{
return (addr & htonl(0xffff0000)) == htonl(0xa9fe0000);
}
static inline bool ipv4_is_anycast_6to4(__be32 addr)
{
return (addr & htonl(0xffffff00)) == htonl(0xc0586300);
}
static inline bool ipv4_is_test_192(__be32 addr)
{
return (addr & htonl(0xffffff00)) == htonl(0xc0000200);
}
static inline bool ipv4_is_test_198(__be32 addr)
{
return (addr & htonl(0xfffe0000)) == htonl(0xc6120000);
}
/*
* phys_addr_t was added as a generic arch typedef on 2.6.28,
* that backport is dealt with in compat-2.6.28.h
*/
#if defined(CONFIG_X86) || defined(CONFIG_X86_64)
#if defined(CONFIG_64BIT) || defined(CONFIG_X86_PAE) || defined(CONFIG_PHYS_64BIT)
typedef u64 phys_addr_t;
#else
typedef u32 phys_addr_t;
#endif
#endif /* x86 */
/* The macro below uses a const upstream, this differs */
/**
* DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
* @_table: device table name
*
* This macro is used to create a struct pci_device_id array (a device table)
* in a generic manner.
*/
#define DEFINE_PCI_DEVICE_TABLE(_table) \
const struct pci_device_id _table[] __devinitdata
/*
* Backport work for QoS dependencies (kernel/pm_qos_params.c)
* pm-qos stuff written by mark gross mgross@linux.intel.com.
*
* ipw2100 now makes use of:
*
* pm_qos_add_requirement(),
* pm_qos_update_requirement() and
* pm_qos_remove_requirement() from it
*
* mac80211 uses the network latency to determine if to enable or not
* dynamic PS. mac80211 also and registers a notifier for when
* the latency changes. Since older kernels do no thave pm-qos stuff
* we just implement it completley here and register it upon cfg80211
* init. I haven't tested ipw2100 on 2.6.24 though.
*
* This pm-qos implementation is copied verbatim from the kernel
* written by mark gross mgross@linux.intel.com. You don't have
* to do anythinig to use pm-qos except use the same exported
* routines as used in newer kernels. The compat_pm_qos_power_init()
* defned below is used by the compat module to initialize pm-qos.
*/
int compat_pm_qos_power_init(void);
int compat_pm_qos_power_deinit(void);
/*
* 2.6.25 adds PM_EVENT_HIBERNATE as well here but
* we don't have this on <= 2.6.23)
*/
#ifndef PM_EVENT_SLEEP /* some distribution have mucked with their own headers to add this.. */
#define PM_EVENT_SLEEP (PM_EVENT_SUSPEND)
#endif
/* Although we don't care about wimax this is needed for rfkill input stuff */
#define KEY_WIMAX 246
/* Although pm_qos stuff is not implemented on <= 2.6.24 lets keep the define */
#define PM_QOS_DEFAULT_VALUE -1
#define __WARN(foo) dump_stack()
#define dev_emerg(dev, format, arg...) \
dev_printk(KERN_EMERG , dev , format , ## arg)
#define dev_alert(dev, format, arg...) \
dev_printk(KERN_ALERT , dev , format , ## arg)
#define dev_crit(dev, format, arg...) \
dev_printk(KERN_CRIT , dev , format , ## arg)
extern int __dev_addr_sync(struct dev_addr_list **to, int *to_count, struct dev_addr_list **from, int *from_count);
extern void __dev_addr_unsync(struct dev_addr_list **to, int *to_count, struct dev_addr_list **from, int *from_count);
#define seq_file_net &init_net;
enum nf_inet_hooks {
NF_INET_PRE_ROUTING = 0,
NF_INET_LOCAL_IN = 1,
NF_INET_FORWARD = 2,
NF_INET_LOCAL_OUT = 3,
NF_INET_POST_ROUTING = 4,
NF_INET_NUMHOOKS = 5
};
/* The patch:
* commit 8b5f6883683c91ad7e1af32b7ceeb604d68e2865
* Author: Marcin Slusarz <marcin.slusarz@gmail.com>
* Date: Fri Feb 8 04:20:12 2008 -0800
*
* byteorder: move le32_add_cpu & friends from OCFS2 to core
*
* moves le*_add_cpu and be*_add_cpu functions from OCFS2 to core
* header (1st) and converted some existing code to it. We port
* it here as later kernels will most likely use it.
*/
static inline void le16_add_cpu(__le16 *var, u16 val)
{
*var = cpu_to_le16(le16_to_cpu(*var) + val);
}
static inline void le32_add_cpu(__le32 *var, u32 val)
{
*var = cpu_to_le32(le32_to_cpu(*var) + val);
}
static inline void le64_add_cpu(__le64 *var, u64 val)
{
*var = cpu_to_le64(le64_to_cpu(*var) + val);
}
static inline void be16_add_cpu(__be16 *var, u16 val)
{
u16 v = be16_to_cpu(*var);
*var = cpu_to_be16(v + val);
}
static inline void be32_add_cpu(__be32 *var, u32 val)
{
u32 v = be32_to_cpu(*var);
*var = cpu_to_be32(v + val);
}
static inline void be64_add_cpu(__be64 *var, u64 val)
{
u64 v = be64_to_cpu(*var);
*var = cpu_to_be64(v + val);
}
/* 2.6.25 changes hwrng_unregister()'s behaviour by supporting
* suspend of its parent device (the misc device, which is itself the
* hardware random number generator). It does this by passing a parameter to
* unregister_miscdev() which is not supported in older kernels. The suspend
* parameter allows us to enable access to the device's hardware
* number generator during suspend. As far as wireless is concerned this means
* if a driver goes to suspend it you won't have the HNR available in
* older kernels. */
static inline void __hwrng_unregister(struct hwrng *rng, bool suspended)
{
hwrng_unregister(rng);
}
static inline void led_classdev_unregister_suspended(struct led_classdev *lcd)
{
led_classdev_unregister(lcd);
}
/**
* The following things are out of ./include/linux/kernel.h
* The new iwlwifi driver is using them.
*/
extern int strict_strtoul(const char *, unsigned int, unsigned long *);
extern int strict_strtol(const char *, unsigned int, long *);
#else
/*
* Kernels >= 2.6.25 have pm-qos and its initialized as part of
* the bootup process
*/
static inline int compat_pm_qos_power_init(void)
{
return 0;
}
static inline int compat_pm_qos_power_deinit(void)
{
return 0;
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)) */
#endif /* LINUX_26_25_COMPAT_H */
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#ifndef LINUX_26_26_COMPAT_H
#define LINUX_26_26_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26))
#include <linux/device.h>
#include <linux/list.h>
#include <linux/kernel.h>
#include <linux/jiffies.h>
#include <net/sock.h>
#include <linux/fs.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
#include <net/net_namespace.h>
#endif
#include <linux/fs.h>
#include <linux/types.h>
#include <asm/div64.h>
/* These jiffie helpers added as of 2.6.26 */
/*
* These four macros compare jiffies and 'a' for convenience.
*/
/* time_is_before_jiffies(a) return true if a is before jiffies */
#define time_is_before_jiffies(a) time_after(jiffies, a)
/* time_is_after_jiffies(a) return true if a is after jiffies */
#define time_is_after_jiffies(a) time_before(jiffies, a)
/* time_is_before_eq_jiffies(a) return true if a is before or equal to jiffies*/
#define time_is_before_eq_jiffies(a) time_after_eq(jiffies, a)
/* time_is_after_eq_jiffies(a) return true if a is after or equal to jiffies*/
#define time_is_after_eq_jiffies(a) time_before_eq(jiffies, a)
/* This comes from include/linux/input.h */
#define SW_RFKILL_ALL 0x03 /* rfkill master switch, type "any"
set = radio enabled */
/* From kernel.h */
#define USHORT_MAX ((u16)(~0U))
#define SHORT_MAX ((s16)(USHORT_MAX>>1))
#define SHORT_MIN (-SHORT_MAX - 1)
extern int dev_set_name(struct device *dev, const char *name, ...)
__attribute__((format(printf, 2, 3)));
/**
* clamp - return a value clamped to a given range with strict typechecking
* @val: current value
* @min: minimum allowable value
* @max: maximum allowable value
*
* This macro does strict typechecking of min/max to make sure they are of the
* same type as val. See the unnecessary pointer comparisons.
*/
#define clamp(val, min, max) ({ \
typeof(val) __val = (val); \
typeof(min) __min = (min); \
typeof(max) __max = (max); \
(void) (&__val == &__min); \
(void) (&__val == &__max); \
__val = __val < __min ? __min: __val; \
__val > __max ? __max: __val; })
/**
* clamp_t - return a value clamped to a given range using a given type
* @type: the type of variable to use
* @val: current value
* @min: minimum allowable value
* @max: maximum allowable value
*
* This macro does no typechecking and uses temporary variables of type
* 'type' to make all the comparisons.
*/
#define clamp_t(type, val, min, max) ({ \
type __val = (val); \
type __min = (min); \
type __max = (max); \
__val = __val < __min ? __min: __val; \
__val > __max ? __max: __val; })
/* from include/linux/device.h */
/* device_create_drvdata() is new */
extern struct device *device_create_drvdata(struct class *cls,
struct device *parent,
dev_t devt,
void *drvdata,
const char *fmt, ...)
__attribute__((format(printf, 5, 6)));
/* This is from include/linux/list.h */
/**
* list_is_singular - tests whether a list has just one entry.
* @head: the list to test.
*/
static inline int list_is_singular(const struct list_head *head)
{
return !list_empty(head) && (head->next == head->prev);
}
/* This is from include/linux/device.h, which was added as of 2.6.26 */
static inline const char *dev_name(struct device *dev)
{
/* will be changed into kobject_name(&dev->kobj) in the near future */
return dev->bus_id;
}
/* This is from include/linux/kernel.h, which was added as of 2.6.26 */
/**
* clamp_val - return a value clamped to a given range using val's type
* @val: current value
* @min: minimum allowable value
* @max: maximum allowable value
*
* This macro does no typechecking and uses temporary variables of whatever
* type the input argument 'val' is. This is useful when val is an unsigned
* type and min and max are literals that will otherwise be assigned a signed
* integer type.
*/
#define clamp_val(val, min, max) ({ \
typeof(val) __val = (val); \
typeof(val) __min = (min); \
typeof(val) __max = (max); \
__val = __val < __min ? __min: __val; \
__val > __max ? __max: __val; })
/* This comes from include/net/net_namespace.h */
#ifdef CONFIG_NET_NS
static inline
int net_eq(const struct net *net1, const struct net *net2)
{
return net1 == net2;
}
#else
static inline
int net_eq(const struct net *net1, const struct net *net2)
{
return 1;
}
#endif
static inline
void dev_net_set(struct net_device *dev, struct net *net)
{
#ifdef CONFIG_NET_NS
release_net(dev->nd_net);
dev->nd_net = hold_net(net);
#endif
}
static inline
struct net *sock_net(const struct sock *sk)
{
#ifdef CONFIG_NET_NS
return sk->sk_net;
#else
return &init_net;
#endif
}
/* This comes from include/linux/netdevice.h */
/*
* Net namespace inlines
*/
static inline
struct net *dev_net(const struct net_device *dev)
{
#ifdef CONFIG_NET_NS
/*
* compat-wirelss backport note:
* For older kernels we may just need to always return init_net,
* not sure when we added dev->nd_net.
*/
return dev->nd_net;
#else
return &init_net;
#endif
}
/*
* 2.6.26 added its own unaligned API which the
* new drivers can use. Lets port it here by including it in older
* kernels and also deal with the architecture handling here.
*/
#ifdef CONFIG_ALPHA
#include <linux/unaligned/be_struct.h>
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/generic.h>
#endif /* alpha */
#ifdef CONFIG_ARM
/* arm */
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/be_byteshift.h>
#include <linux/unaligned/generic.h>
#endif /* arm */
#ifdef CONFIG_AVR32
/*
* AVR32 can handle some unaligned accesses, depending on the
* implementation. The AVR32 AP implementation can handle unaligned
* words, but halfwords must be halfword-aligned, and doublewords must
* be word-aligned.
*
* However, swapped word loads must be word-aligned so we can't
* optimize word loads in general.
*/
#include <linux/unaligned/be_struct.h>
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/generic.h>
#endif
#ifdef CONFIG_BLACKFIN
#include <linux/unaligned/le_struct.h>
#include <linux/unaligned/be_byteshift.h>
#include <linux/unaligned/generic.h>
#endif /* blackfin */
#ifdef CONFIG_CRIS
/*
* CRIS can do unaligned accesses itself.
*/
#include <linux/unaligned/access_ok.h>
#include <linux/unaligned/generic.h>
#endif /* cris */
#ifdef CONFIG_FRV
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/be_byteshift.h>
#include <linux/unaligned/generic.h>
#endif /* frv */
#ifdef CONFIG_H8300
#include <linux/unaligned/be_memmove.h>
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/generic.h>
#endif /* h8300 */
#ifdef CONFIG_IA64
#include <linux/unaligned/le_struct.h>
#include <linux/unaligned/be_byteshift.h>
#include <linux/unaligned/generic.h>
#endif /* ia64 */
#ifdef CONFIG_M32R
#if defined(__LITTLE_ENDIAN__)
# include <linux/unaligned/le_memmove.h>
# include <linux/unaligned/be_byteshift.h>
# include <linux/unaligned/generic.h>
#else
# include <linux/unaligned/be_memmove.h>
# include <linux/unaligned/le_byteshift.h>
# include <linux/unaligned/generic.h>
#endif
#endif /* m32r */
#ifdef CONFIG_M68K /* this handles both m68k and m68knommu */
#ifdef CONFIG_COLDFIRE
#include <linux/unaligned/be_struct.h>
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/generic.h>
#else
/*
* The m68k can do unaligned accesses itself.
*/
#include <linux/unaligned/access_ok.h>
#include <linux/unaligned/generic.h>
#endif
#endif /* m68k and m68knommu */
#ifdef CONFIG_MIPS
#if defined(__MIPSEB__)
# include <linux/unaligned/be_struct.h>
# include <linux/unaligned/le_byteshift.h>
# include <linux/unaligned/generic.h>
# define get_unaligned __get_unaligned_be
# define put_unaligned __put_unaligned_be
#elif defined(__MIPSEL__)
# include <linux/unaligned/le_struct.h>
# include <linux/unaligned/be_byteshift.h>
# include <linux/unaligned/generic.h>
#endif
#endif /* mips */
#ifdef CONFIG_MN10300
#include <linux/unaligned/access_ok.h>
#include <linux/unaligned/generic.h>
#endif /* mn10300 */
#ifdef CONFIG_PARISC
#include <linux/unaligned/be_struct.h>
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/generic.h>
#endif /* parisc */
#ifdef CONFIG_PPC
/*
* The PowerPC can do unaligned accesses itself in big endian mode.
*/
#include <linux/unaligned/access_ok.h>
#include <linux/unaligned/generic.h>
#endif /* ppc */
#ifdef CONFIG_S390
/*
* The S390 can do unaligned accesses itself.
*/
#include <linux/unaligned/access_ok.h>
#include <linux/unaligned/generic.h>
#endif /* s390 */
#ifdef CONFIG_SUPERH
/* SH can't handle unaligned accesses. */
#ifdef __LITTLE_ENDIAN__
# include <linux/unaligned/le_struct.h>
# include <linux/unaligned/be_byteshift.h>
# include <linux/unaligned/generic.h>
#else
# include <linux/unaligned/be_struct.h>
# include <linux/unaligned/le_byteshift.h>
# include <linux/unaligned/generic.h>
#endif
#endif /* sh - SUPERH */
#ifdef CONFIG_SPARC
/* sparc and sparc64 */
#include <linux/unaligned/be_struct.h>
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/generic.h>
#endif /* sparc */
#ifdef CONFIG_UML
#include "asm/arch/unaligned.h"
#endif /* um - uml */
#ifdef CONFIG_V850
#include <linux/unaligned/be_byteshift.h>
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/generic.h>
#endif /* v850 */
#ifdef CONFIG_X86
/*
* The x86 can do unaligned accesses itself.
*/
#include <linux/unaligned/access_ok.h>
#include <linux/unaligned/generic.h>
#endif /* x86 */
#ifdef CONFIG_XTENSA
#ifdef __XTENSA_EL__
# include <linux/unaligned/le_memmove.h>
# include <linux/unaligned/be_byteshift.h>
# include <linux/unaligned/generic.h>
#elif defined(__XTENSA_EB__)
# include <linux/unaligned/be_memmove.h>
# include <linux/unaligned/le_byteshift.h>
# include <linux/unaligned/generic.h>
#else
# error processor byte order undefined!
#endif
#endif /* xtensa */
#define PCIE_LINK_STATE_L0S 1
#define PCIE_LINK_STATE_L1 2
#define PCIE_LINK_STATE_CLKPM 4
static inline void pci_disable_link_state(struct pci_dev *pdev, int state)
{
}
/* source: include/linux/pci-aspm.h */
#if BITS_PER_LONG == 64
/**
* div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
*
* This is commonly provided by 32bit archs to provide an optimized 64bit
* divide.
*/
static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder)
{
*remainder = dividend % divisor;
return dividend / divisor;
}
#elif BITS_PER_LONG == 32
#ifndef div_u64_rem
static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder)
{
*remainder = do_div(dividend, divisor);
return dividend;
}
#endif
#endif /* BITS_PER_LONG */
/**
* div_u64 - unsigned 64bit divide with 32bit divisor
*
* This is the most common 64bit divide and should be used if possible,
* as many 32bit archs can optimize this variant better than a full 64bit
* divide.
*/
#ifndef div_u64
static inline u64 div_u64(u64 dividend, u32 divisor)
{
u32 remainder;
return div_u64_rem(dividend, divisor, &remainder);
}
#endif
/* source: include/math64.h */
#define hex_asc_lo(x) hex_asc((x) & 0x0f)
#define hex_asc_hi(x) hex_asc(((x) & 0xf0) >> 4)
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) */
#endif /* LINUX_26_26_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.27.h
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#ifndef LINUX_26_27_COMPAT_H
#define LINUX_26_27_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))
#include <linux/debugfs.h>
#include <linux/list.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
#include <linux/mmc/sdio.h>
#include <linux/mmc/sdio_func.h>
#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24) */
#include <linux/netdevice.h>
#include <linux/workqueue.h>
#include <net/iw_handler.h>
#include <asm-generic/bug.h>
#include <linux/wireless.h>
#include <linux/skbuff.h>
#include <net/sch_generic.h>
#include <linux/ethtool.h>
static inline struct net_device *qdisc_dev(const struct Qdisc *qdisc)
{
return qdisc->dev;
}
/*
* Backports 378a2f09 and c27f339a
* This may need a bit more work.
*/
enum net_xmit_qdisc_t {
__NET_XMIT_STOLEN = 0x00010000,
__NET_XMIT_BYPASS = 0x00020000,
};
struct qdisc_skb_cb {
unsigned int pkt_len;
char data[];
};
static inline struct qdisc_skb_cb *qdisc_skb_cb(struct sk_buff *skb)
{
return (struct qdisc_skb_cb *)skb->cb;
}
static inline unsigned int qdisc_pkt_len(struct sk_buff *skb)
{
return qdisc_skb_cb(skb)->pkt_len;
}
#define PCI_PM_CAP_PME_SHIFT 11
/* I can't find a more suitable replacement... */
#define flush_work(work) cancel_work_sync(work)
struct builtin_fw {
char *name;
void *data;
unsigned long size;
};
/*
* On older kernels we do not have net_device Multi Queue support, but
* since we no longer use MQ on mac80211 we can simply use the 0 queue.
* Note that if other fullmac drivers make use of this they then need
* to be backported somehow or deal with just 1 queueue from MQ.
*/
static inline void netif_tx_wake_all_queues(struct net_device *dev)
{
netif_wake_queue(dev);
}
static inline void netif_tx_start_all_queues(struct net_device *dev)
{
netif_start_queue(dev);
}
static inline void netif_tx_stop_all_queues(struct net_device *dev)
{
netif_stop_queue(dev);
}
/* Are all TX queues of the device empty? */
static inline bool qdisc_all_tx_empty(const struct net_device *dev)
{
return skb_queue_empty(&dev->qdisc->q);
}
bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
/*
* The net_device has a spin_lock on newer kernels, on older kernels we're out of luck
*/
#define netif_addr_lock_bh(dev)
#define netif_addr_unlock_bh(dev)
/*
* To port this properly we'd have to port warn_slowpath_null(),
* which I'm lazy to do so just do a regular print for now. If you
* want to port this read kernel/panic.c
*/
#define __WARN_printf(arg...) do { printk(arg); __WARN(); } while (0)
/* This is ported directly as-is on newer kernels */
#ifndef WARN
#define WARN(condition, format...) ({ \
int __ret_warn_on = !!(condition); \
if (unlikely(__ret_warn_on)) \
__WARN_printf(format); \
unlikely(__ret_warn_on); \
})
#endif
/* On 2.6.27 a second argument was added, on older kernels we ignore it */
#define dma_mapping_error(pdev, dma_addr) dma_mapping_error(dma_addr)
#define pci_dma_mapping_error(pdev, dma_addr) dma_mapping_error(pdev, dma_addr)
/* This is from include/linux/ieee80211.h */
#define IEEE80211_HT_CAP_DSSSCCK40 0x1000
/* New link list changes added as of 2.6.27, needed for ath9k */
static inline void __list_cut_position(struct list_head *list,
struct list_head *head, struct list_head *entry)
{
struct list_head *new_first = entry->next;
list->next = head->next;
list->next->prev = list;
list->prev = entry;
entry->next = list;
head->next = new_first;
new_first->prev = head;
}
/**
* list_cut_position - cut a list into two
* @list: a new list to add all removed entries
* @head: a list with entries
* @entry: an entry within head, could be the head itself
* and if so we won't cut the list
*
* This helper moves the initial part of @head, up to and
* including @entry, from @head to @list. You should
* pass on @entry an element you know is on @head. @list
* should be an empty list or a list you do not care about
* losing its data.
*
*/
static inline void list_cut_position(struct list_head *list,
struct list_head *head, struct list_head *entry)
{
if (list_empty(head))
return;
if (list_is_singular(head) &&
(head->next != entry && head != entry))
return;
if (entry == head)
INIT_LIST_HEAD(list);
else
__list_cut_position(list, head, entry);
}
/* __list_splice as re-implemented on 2.6.27, we backport it */
static inline void __compat_list_splice_new_27(const struct list_head *list,
struct list_head *prev,
struct list_head *next)
{
struct list_head *first = list->next;
struct list_head *last = list->prev;
first->prev = prev;
prev->next = first;
last->next = next;
next->prev = last;
}
/**
* list_splice_tail - join two lists, each list being a queue
* @list: the new list to add.
* @head: the place to add it in the first list.
*/
static inline void list_splice_tail(struct list_head *list,
struct list_head *head)
{
if (!list_empty(list))
__compat_list_splice_new_27(list, head->prev, head);
}
/**
* list_splice_tail_init - join two lists and reinitialise the emptied list
* @list: the new list to add.
* @head: the place to add it in the first list.
*
* Each of the lists is a queue.
* The list at @list is reinitialised
*/
static inline void list_splice_tail_init(struct list_head *list,
struct list_head *head)
{
if (!list_empty(list)) {
__compat_list_splice_new_27(list, head->prev, head);
INIT_LIST_HEAD(list);
}
}
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
extern unsigned int mmc_align_data_size(struct mmc_card *, unsigned int);
extern unsigned int sdio_align_size(struct sdio_func *func, unsigned int sz);
#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24) */
#define iwe_stream_add_value(info, event, value, ends, iwe, event_len) iwe_stream_add_value(event, value, ends, iwe, event_len)
#define iwe_stream_add_point(info, stream, ends, iwe, extra) iwe_stream_add_point(stream, ends, iwe, extra)
#define iwe_stream_add_event(info, stream, ends, iwe, event_len) iwe_stream_add_event(stream, ends, iwe, event_len)
/* Flags available in struct iw_request_info */
#define IW_REQUEST_FLAG_COMPAT 0x0001 /* Compat ioctl call */
static inline int iwe_stream_lcp_len(struct iw_request_info *info)
{
#ifdef CONFIG_COMPAT
if (info->flags & IW_REQUEST_FLAG_COMPAT)
return IW_EV_COMPAT_LCP_LEN;
#endif
return IW_EV_LCP_LEN;
}
#ifdef CONFIG_ARM
/*
* The caller asks to handle a range between offset and offset + size,
* but we process a larger range from 0 to offset + size due to lack of
* offset support.
*/
static inline void dma_sync_single_range_for_cpu(struct device *dev,
dma_addr_t handle, unsigned long offset, size_t size,
enum dma_data_direction dir)
{
dma_sync_single_for_cpu(dev, handle, offset + size, dir);
}
static inline void dma_sync_single_range_for_device(struct device *dev,
dma_addr_t handle, unsigned long offset, size_t size,
enum dma_data_direction dir)
{
dma_sync_single_for_device(dev, handle, offset + size, dir);
}
#endif /* arm */
#if defined(CONFIG_DEBUG_FS)
void debugfs_remove_recursive(struct dentry *dentry);
#else
static inline void debugfs_remove_recursive(struct dentry *dentry)
{ }
#endif
#define device_create(cls, parent, devt, drvdata, fmt, ...) \
({ \
struct device *_dev; \
_dev = (device_create)(cls, parent, devt, fmt, __VA_ARGS__); \
dev_set_drvdata(_dev, drvdata); \
_dev; \
})
#define dev_name(dev) dev_name((struct device *)dev)
static inline void ethtool_cmd_speed_set(struct ethtool_cmd *ep,
__u32 speed)
{
ep->speed = (__u16)speed;
}
static inline __u32 ethtool_cmd_speed(const struct ethtool_cmd *ep)
{
return ep->speed;
}
/**
* lower_32_bits - return bits 0-31 of a number
* @n: the number we're accessing
*/
#define lower_32_bits(n) ((u32)(n))
#define netif_wake_subqueue netif_start_subqueue
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)) */
#endif /* LINUX_26_27_COMPAT_H */
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#ifndef LINUX_26_28_COMPAT_H
#define LINUX_26_28_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28))
#include <linux/skbuff.h>
#include <linux/if_ether.h>
#include <linux/usb.h>
#include <linux/types.h>
#include <linux/types.h>
#include <linux/cpumask.h>
#ifndef ETH_P_PAE
#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
#endif
#include <linux/pci.h>
#include <linux/pci_regs.h>
typedef struct cpumask { DECLARE_BITMAP(bits, NR_CPUS); } compat_cpumask_t;
#if defined(CONFIG_X86) || defined(CONFIG_X86_64) || defined(CONFIG_PPC)
/*
* CONFIG_PHYS_ADDR_T_64BIT was added as new to all architectures
* as of 2.6.28 but x86 and ppc had it already. x86 only got phys_addr_t
* as of 2.6.25 but then is backported in compat-2.6.25.h
*/
#else
#if defined(CONFIG_64BIT) || defined(CONFIG_X86_PAE) || defned(CONFIG_PPC64) || defined(CONFIG_PHYS_64BIT)
#define CONFIG_PHYS_ADDR_T_64BIT 1
typedef u64 phys_addr_t;
#else
typedef u32 phys_addr_t;
#endif
#endif /* non x86 and ppc */
#ifndef WARN_ONCE
#define WARN_ONCE(condition, format...) ({ \
static int __warned; \
int __ret_warn_once = !!(condition); \
\
if (unlikely(__ret_warn_once)) \
if (WARN(!__warned, format)) \
__warned = 1; \
unlikely(__ret_warn_once); \
})
#endif /* From include/asm-generic/bug.h */
#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
#include <pcmcia/cistpl.h>
#ifdef pcmcia_parse_tuple
#undef pcmcia_parse_tuple
#define pcmcia_parse_tuple(tuple, parse) pccard_parse_tuple(tuple, parse)
#endif
/* From : include/pcmcia/ds.h */
/* loop CIS entries for valid configuration */
int pcmcia_loop_config(struct pcmcia_device *p_dev,
int (*conf_check) (struct pcmcia_device *p_dev,
cistpl_cftable_entry_t *cfg,
cistpl_cftable_entry_t *dflt,
unsigned int vcc,
void *priv_data),
void *priv_data);
#endif /* CONFIG_PCMCIA */
/* USB anchors were added as of 2.6.23 */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23))
#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
#if 0
extern void usb_poison_urb(struct urb *urb);
#endif
extern void usb_unpoison_urb(struct urb *urb);
#if 0
extern void usb_poison_anchored_urbs(struct usb_anchor *anchor);
#endif
extern int usb_anchor_empty(struct usb_anchor *anchor);
#endif /* CONFIG_USB */
#endif
void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
/**
* skb_queue_is_last - check if skb is the last entry in the queue
* @list: queue head
* @skb: buffer
*
* Returns true if @skb is the last buffer on the list.
*/
static inline bool skb_queue_is_last(const struct sk_buff_head *list,
const struct sk_buff *skb)
{
return (skb->next == (struct sk_buff *) list);
}
/**
* skb_queue_next - return the next packet in the queue
* @list: queue head
* @skb: current buffer
*
* Return the next packet in @list after @skb. It is only valid to
* call this if skb_queue_is_last() evaluates to false.
*/
static inline struct sk_buff *skb_queue_next(const struct sk_buff_head *list,
const struct sk_buff *skb)
{
/* This BUG_ON may seem severe, but if we just return then we
* are going to dereference garbage.
*/
BUG_ON(skb_queue_is_last(list, skb));
return skb->next;
}
/**
* __skb_queue_head_init - initialize non-spinlock portions of sk_buff_head
* @list: queue to initialize
*
* This initializes only the list and queue length aspects of
* an sk_buff_head object. This allows to initialize the list
* aspects of an sk_buff_head without reinitializing things like
* the spinlock. It can also be used for on-stack sk_buff_head
* objects where the spinlock is known to not be used.
*/
static inline void __skb_queue_head_init(struct sk_buff_head *list)
{
list->prev = list->next = (struct sk_buff *)list;
list->qlen = 0;
}
static inline void __skb_queue_splice(const struct sk_buff_head *list,
struct sk_buff *prev,
struct sk_buff *next)
{
struct sk_buff *first = list->next;
struct sk_buff *last = list->prev;
first->prev = prev;
prev->next = first;
last->next = next;
next->prev = last;
}
/**
* skb_queue_splice - join two skb lists, this is designed for stacks
* @list: the new list to add
* @head: the place to add it in the first list
*/
static inline void skb_queue_splice(const struct sk_buff_head *list,
struct sk_buff_head *head)
{
if (!skb_queue_empty(list)) {
__skb_queue_splice(list, (struct sk_buff *) head, head->next);
head->qlen += list->qlen;
}
}
/**
* skb_queue_splice - join two skb lists and reinitialise the emptied list
* @list: the new list to add
* @head: the place to add it in the first list
*
* The list at @list is reinitialised
*/
static inline void skb_queue_splice_init(struct sk_buff_head *list,
struct sk_buff_head *head)
{
if (!skb_queue_empty(list)) {
__skb_queue_splice(list, (struct sk_buff *) head, head->next);
head->qlen += list->qlen;
__skb_queue_head_init(list);
}
}
/**
* skb_queue_splice_tail - join two skb lists and reinitialise the emptied list
* @list: the new list to add
* @head: the place to add it in the first list
*
* Each of the lists is a queue.
* The list at @list is reinitialised
*/
static inline void skb_queue_splice_tail_init(struct sk_buff_head *list,
struct sk_buff_head *head)
{
if (!skb_queue_empty(list)) {
__skb_queue_splice(list, head->prev, (struct sk_buff *) head);
head->qlen += list->qlen;
__skb_queue_head_init(list);
}
} /* From include/linux/skbuff.h */
/**
* skb_queue_splice_tail - join two skb lists, each list being a queue
* @list: the new list to add
* @head: the place to add it in the first list
*/
static inline void skb_queue_splice_tail(const struct sk_buff_head *list,
struct sk_buff_head *head)
{
if (!skb_queue_empty(list)) {
__skb_queue_splice(list, head->prev, (struct sk_buff *) head);
head->qlen += list->qlen;
}
}
#define skb_queue_walk_from(queue, skb) \
for (; skb != (struct sk_buff *)(queue); \
skb = skb->next)
#ifndef DECLARE_TRACE
#define TP_PROTO(args...) args
#define TP_ARGS(args...) args
#define DECLARE_TRACE(name, proto, args) \
static inline void _do_trace_##name(struct tracepoint *tp, proto) \
{ } \
static inline void trace_##name(proto) \
{ } \
static inline int register_trace_##name(void (*probe)(proto)) \
{ \
return -ENOSYS; \
} \
static inline int unregister_trace_##name(void (*probe)(proto)) \
{ \
return -ENOSYS; \
}
#define EXPORT_TRACEPOINT_SYMBOL_GPL(name)
#define EXPORT_TRACEPOINT_SYMBOL(name)
#endif
/* openSuse includes round_jiffies_up in it's kernel 2.6.27.
* This is needed to prevent conflicts with the openSuse definition.
*/
#define round_jiffies_up backport_round_jiffies_up
unsigned long round_jiffies_up(unsigned long j);
extern void v2_6_28_skb_add_rx_frag(struct sk_buff *skb, int i, struct page *page,
int off, int size);
#define wake_up_interruptible_poll(x, m) \
__wake_up(x, TASK_INTERRUPTIBLE, 1, (void *) (m))
extern int n_tty_ioctl_helper(struct tty_struct *tty, struct file *file,
unsigned int cmd, unsigned long arg);
int pci_wake_from_d3(struct pci_dev *dev, bool enable);
#define alloc_workqueue(name, flags, max_active) __create_workqueue(name, flags, max_active)
#ifndef pr_fmt
#define pr_fmt(fmt) fmt
#endif
#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)) */
#endif /* LINUX_26_28_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.29.h
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#ifndef LINUX_26_29_COMPAT_H
#define LINUX_26_29_COMPAT_H
#include <linux/version.h>
#include <linux/netdevice.h>
#include <linux/if_link.h>
/*
* I kow this looks odd.. but 2.6.32 added the netdev_tx_t
* and we backport that there so inlcude that header first
* as we need it for the netdev ops.
*/
#include <linux/compat-2.6.32.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29))
#include <linux/skbuff.h>
#include <linux/usb.h>
#include <linux/types.h>
#include <linux/pci_regs.h>
/* backports */
static inline void usb_autopm_put_interface_async(struct usb_interface *intf)
{ }
static inline int usb_autopm_get_interface_async(struct usb_interface *intf)
{ return 0; }
#if \
defined(CONFIG_ALPHA) || defined(CONFIG_AVR32) || \
defined(CONFIG_BLACKFIN) || defined(CONFIG_CRIS) || \
defined(CONFIG_H8300) || defined(CONFIG_IA64) || \
defined(CONFIG_M68K) || defined(CONFIG_MIPS) || \
defined(CONFIG_PARISC) || defined(CONFIG_S390) || \
defined(CONFIG_PPC64) || defined(CONFIG_PPC32) || \
defined(CONFIG_SUPERH) || defined(CONFIG_SPARC) || \
defined(CONFIG_FRV) || defined(CONFIG_X86) || \
defined(CONFIG_M32R) || defined(CONFIG_M68K) || \
defined(CONFIG_MN10300) || defined(CONFIG_XTENSA) || \
defined(CONFIG_ARM)
#include <asm/atomic.h>
#else
typedef struct {
volatile int counter;
} atomic_t;
#ifdef CONFIG_64BIT
typedef struct {
volatile long counter;
} atomic64_t;
#endif /* CONFIG_64BIT */
#endif
#define PCI_EXP_LNKCTL_ES 0x0080 /* Extended Synch */
/*
* Older kernels do not have struct net_device_ops but what we can
* do is just define the data structure and use a caller to let us
* set the data structure's routines onto the old netdev, essentially
* doing it the old way. This avoids huge deltas on our backports.
*/
/*
* This structure defines the management hooks for network devices.
* The following hooks can be defined; unless noted otherwise, they are
* optional and can be filled with a null pointer.
*
* int (*ndo_init)(struct net_device *dev);
* This function is called once when network device is registered.
* The network device can use this to any late stage initializaton
* or semantic validattion. It can fail with an error code which will
* be propogated back to register_netdev
*
* void (*ndo_uninit)(struct net_device *dev);
* This function is called when device is unregistered or when registration
* fails. It is not called if init fails.
*
* int (*ndo_open)(struct net_device *dev);
* This function is called when network device transistions to the up
* state.
*
* int (*ndo_stop)(struct net_device *dev);
* This function is called when network device transistions to the down
* state.
*
* netdev_tx_t (*ndo_start_xmit)(struct sk_buff *skb,
* struct net_device *dev);
* Called when a packet needs to be transmitted.
* Must return NETDEV_TX_OK , NETDEV_TX_BUSY.
* (can also return NETDEV_TX_LOCKED iff NETIF_F_LLTX)
* Required can not be NULL.
*
* u16 (*ndo_select_queue)(struct net_device *dev, struct sk_buff *skb);
* Called to decide which queue to when device supports multiple
* transmit queues.
*
* void (*ndo_change_rx_flags)(struct net_device *dev, int flags);
* This function is called to allow device receiver to make
* changes to configuration when multicast or promiscious is enabled.
*
* void (*ndo_set_rx_mode)(struct net_device *dev);
* This function is called device changes address list filtering.
*
* void (*ndo_set_multicast_list)(struct net_device *dev);
* This function is called when the multicast address list changes.
*
* int (*ndo_set_mac_address)(struct net_device *dev, void *addr);
* This function is called when the Media Access Control address
* needs to be changed. If this interface is not defined, the
* mac address can not be changed.
*
* int (*ndo_validate_addr)(struct net_device *dev);
* Test if Media Access Control address is valid for the device.
*
* int (*ndo_do_ioctl)(struct net_device *dev, struct ifreq *ifr, int cmd);
* Called when a user request an ioctl which can't be handled by
* the generic interface code. If not defined ioctl's return
* not supported error code.
*
* int (*ndo_set_config)(struct net_device *dev, struct ifmap *map);
* Used to set network devices bus interface parameters. This interface
* is retained for legacy reason, new devices should use the bus
* interface (PCI) for low level management.
*
* int (*ndo_change_mtu)(struct net_device *dev, int new_mtu);
* Called when a user wants to change the Maximum Transfer Unit
* of a device. If not defined, any request to change MTU will
* will return an error.
*
* void (*ndo_tx_timeout)(struct net_device *dev);
* Callback uses when the transmitter has not made any progress
* for dev->watchdog ticks.
*
* struct net_device_stats* (*ndo_get_stats)(struct net_device *dev);
* Called when a user wants to get the network device usage
* statistics. If not defined, the counters in dev->stats will
* be used.
*
* void (*ndo_vlan_rx_register)(struct net_device *dev, struct vlan_group *grp);
* If device support VLAN receive accleration
* (ie. dev->features & NETIF_F_HW_VLAN_RX), then this function is called
* when vlan groups for the device changes. Note: grp is NULL
* if no vlan's groups are being used.
*
* void (*ndo_vlan_rx_add_vid)(struct net_device *dev, unsigned short vid);
* If device support VLAN filtering (dev->features & NETIF_F_HW_VLAN_FILTER)
* this function is called when a VLAN id is registered.
*
* void (*ndo_vlan_rx_kill_vid)(struct net_device *dev, unsigned short vid);
* If device support VLAN filtering (dev->features & NETIF_F_HW_VLAN_FILTER)
* this function is called when a VLAN id is unregistered.
*
* void (*ndo_poll_controller)(struct net_device *dev);
*
* SR-IOV management functions.
* int (*ndo_set_vf_mac)(struct net_device *dev, int vf, u8* mac);
* int (*ndo_set_vf_vlan)(struct net_device *dev, int vf, u16 vlan, u8 qos);
* int (*ndo_set_vf_tx_rate)(struct net_device *dev, int vf, int rate);
* int (*ndo_get_vf_config)(struct net_device *dev,
* int vf, struct ifla_vf_info *ivf);
*/
#define HAVE_NET_DEVICE_OPS
struct net_device_ops {
int (*ndo_init)(struct net_device *dev);
void (*ndo_uninit)(struct net_device *dev);
int (*ndo_open)(struct net_device *dev);
int (*ndo_stop)(struct net_device *dev);
netdev_tx_t (*ndo_start_xmit) (struct sk_buff *skb,
struct net_device *dev);
u16 (*ndo_select_queue)(struct net_device *dev,
struct sk_buff *skb);
void (*ndo_change_rx_flags)(struct net_device *dev,
int flags);
void (*ndo_set_rx_mode)(struct net_device *dev);
void (*ndo_set_multicast_list)(struct net_device *dev);
int (*ndo_set_mac_address)(struct net_device *dev,
void *addr);
int (*ndo_validate_addr)(struct net_device *dev);
int (*ndo_do_ioctl)(struct net_device *dev,
struct ifreq *ifr, int cmd);
int (*ndo_set_config)(struct net_device *dev,
struct ifmap *map);
int (*ndo_change_mtu)(struct net_device *dev,
int new_mtu);
int (*ndo_neigh_setup)(struct net_device *dev,
struct neigh_parms *);
void (*ndo_tx_timeout) (struct net_device *dev);
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36))
struct rtnl_link_stats64* (*ndo_get_stats64)(struct net_device *dev,
struct rtnl_link_stats64 *storage);
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) */
struct net_device_stats* (*ndo_get_stats)(struct net_device *dev);
void (*ndo_vlan_rx_register)(struct net_device *dev,
struct vlan_group *grp);
void (*ndo_vlan_rx_add_vid)(struct net_device *dev,
unsigned short vid);
void (*ndo_vlan_rx_kill_vid)(struct net_device *dev,
unsigned short vid);
#ifdef CONFIG_NET_POLL_CONTROLLER
void (*ndo_poll_controller)(struct net_device *dev);
#endif
int (*ndo_set_vf_mac)(struct net_device *dev,
int queue, u8 *mac);
int (*ndo_set_vf_vlan)(struct net_device *dev,
int queue, u16 vlan, u8 qos);
int (*ndo_set_vf_tx_rate)(struct net_device *dev,
int vf, int rate);
/*
* The struct ifla_vf_info was added via b280da8d54b8d82b52f368a8703b7ada6c1744d5
* on the v2.6.34-rc1~233^2~338 release
*/
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))
int (*ndo_get_vf_config)(struct net_device *dev,
int vf,
struct ifla_vf_info *ivf);
#endif
#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
int (*ndo_fcoe_enable)(struct net_device *dev);
int (*ndo_fcoe_disable)(struct net_device *dev);
int (*ndo_fcoe_ddp_setup)(struct net_device *dev,
u16 xid,
struct scatterlist *sgl,
unsigned int sgc);
int (*ndo_fcoe_ddp_done)(struct net_device *dev,
u16 xid);
#define NETDEV_FCOE_WWNN 0
#define NETDEV_FCOE_WWPN 1
int (*ndo_fcoe_get_wwn)(struct net_device *dev,
u64 *wwn, int type);
#endif
};
static inline int ndo_do_ioctl(struct net_device *dev,
struct ifreq *ifr,
int cmd)
{
if (dev->do_ioctl)
return dev->do_ioctl(dev, ifr, cmd);
return -EOPNOTSUPP;
}
void netdev_attach_ops(struct net_device *dev,
const struct net_device_ops *ops);
/**
* skb_queue_is_first - check if skb is the first entry in the queue
* @list: queue head
* @skb: buffer
*
* Returns true if @skb is the first buffer on the list.
*/
static inline bool skb_queue_is_first(const struct sk_buff_head *list,
const struct sk_buff *skb)
{
return (skb->prev == (struct sk_buff *) list);
}
/**
* skb_queue_prev - return the prev packet in the queue
* @list: queue head
* @skb: current buffer
*
* Return the prev packet in @list before @skb. It is only valid to
* call this if skb_queue_is_first() evaluates to false.
*/
static inline struct sk_buff *skb_queue_prev(const struct sk_buff_head *list,
const struct sk_buff *skb)
{
/* This BUG_ON may seem severe, but if we just return then we
* are going to dereference garbage.
*/
BUG_ON(skb_queue_is_first(list, skb));
return skb->prev;
}
static inline struct net_device_stats *dev_get_stats(struct net_device *dev)
{
return dev->get_stats(dev);
}
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23))
#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
extern void usb_unpoison_anchored_urbs(struct usb_anchor *anchor);
#endif /* CONFIG_USB */
#endif
#define DIV_ROUND_CLOSEST(x, divisor)( \
{ \
typeof(divisor) __divisor = divisor; \
(((x) + ((__divisor) / 2)) / (__divisor)); \
} \
)
extern int eth_mac_addr(struct net_device *dev, void *p);
extern int eth_change_mtu(struct net_device *dev, int new_mtu);
extern int eth_validate_addr(struct net_device *dev);
#ifdef CONFIG_NET_NS
static inline void write_pnet(struct net **pnet, struct net *net)
{
*pnet = net;
}
static inline struct net *read_pnet(struct net * const *pnet)
{
return *pnet;
}
#else
#define write_pnet(pnet, net) do { (void)(net);} while (0)
#define read_pnet(pnet) (&init_net)
/*
* swap - swap value of @a and @b
*/
#define swap(a, b) \
do { typeof(a) __tmp = (a); (a) = (b); (b) = __tmp; } while (0)
#endif
extern int init_dummy_netdev(struct net_device *dev);
#else /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)) */
/* Kernels >= 2.6.29 follows */
/* XXX: this can probably just go upstream ! */
static inline void netdev_attach_ops(struct net_device *dev,
const struct net_device_ops *ops)
{
dev->netdev_ops = ops;
}
/* XXX: this can probably just go upstream! */
static inline int ndo_do_ioctl(struct net_device *dev,
struct ifreq *ifr,
int cmd)
{
if (dev->netdev_ops && dev->netdev_ops->ndo_do_ioctl)
return dev->netdev_ops->ndo_do_ioctl(dev, ifr, cmd);
return -EOPNOTSUPP;
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)) */
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
#define compat_pci_suspend(fn) \
int fn##_compat(struct pci_dev *pdev, pm_message_t state) \
{ \
int r; \
\
r = fn(&pdev->dev); \
if (r) \
return r; \
\
pci_save_state(pdev); \
pci_disable_device(pdev); \
pci_set_power_state(pdev, PCI_D3hot); \
\
return 0; \
}
#define compat_pci_resume(fn) \
int fn##_compat(struct pci_dev *pdev) \
{ \
int r; \
\
pci_set_power_state(pdev, PCI_D0); \
r = pci_enable_device(pdev); \
if (r) \
return r; \
pci_restore_state(pdev); \
\
return fn(&pdev->dev); \
}
#elif LINUX_VERSION_CODE == KERNEL_VERSION(2,6,29)
#define compat_pci_suspend(fn) \
int fn##_compat(struct device *dev) \
{ \
struct pci_dev *pdev = to_pci_dev(dev); \
int r; \
\
r = fn(&pdev->dev); \
if (r) \
return r; \
\
pci_save_state(pdev); \
pci_disable_device(pdev); \
pci_set_power_state(pdev, PCI_D3hot); \
\
return 0; \
}
#define compat_pci_resume(fn) \
int fn##_compat(struct device *dev) \
{ \
struct pci_dev *pdev = to_pci_dev(dev); \
int r; \
\
pci_set_power_state(pdev, PCI_D0); \
r = pci_enable_device(pdev); \
if (r) \
return r; \
pci_restore_state(pdev); \
\
return fn(&pdev->dev); \
}
#else
#define compat_pci_suspend(fn)
#define compat_pci_resume(fn)
#endif
#define PCI_EXP_SLTSTA_PDS 0x0040 /* Presence Detect State */
#endif /* LINUX_26_29_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.30.h
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#ifndef LINUX_26_30_COMPAT_H
#define LINUX_26_30_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
#include <linux/device.h>
#include <linux/pci_regs.h>
#ifndef TP_PROTO
#define TP_PROTO(args...) TPPROTO(args)
#endif
#ifndef TP_ARGS
#define TP_ARGS(args...) TPARGS(args)
#endif
#define IRQ_WAKE_THREAD (2)
/* From : include/linux/pm.h */
/* How to reorder dpm_list after device_move() */
enum dpm_order {
DPM_ORDER_NONE,
DPM_ORDER_DEV_AFTER_PARENT,
DPM_ORDER_PARENT_BEFORE_DEV,
DPM_ORDER_DEV_LAST,
};
static inline void dev_set_uevent_suppress(struct device *dev, int val)
{
dev->uevent_suppress = val;
}
/*
* Print a one-time message (analogous to WARN_ONCE() et al):
*/
#define printk_once(x...) ({ \
static bool __print_once; \
\
if (!__print_once) { \
__print_once = true; \
printk(x); \
} \
})
#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
#define PCI_EXP_SLTCTL2 56 /* Slot Control 2 */
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)) */
#endif /* LINUX_26_30_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.31.h
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#ifndef LINUX_26_31_COMPAT_H
#define LINUX_26_31_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
#include <linux/skbuff.h>
#include <linux/workqueue.h>
#include <linux/interrupt.h>
#include <net/dst.h>
#include <net/genetlink.h>
#include <linux/ethtool.h>
#include <net/sock.h>
/*
* These macros allow us to backport rfkill without any
* changes on cfg80211 through compat.diff. Note that this
* file will be included by rfkill_backport.h so we must
* not conflict with things there.
*/
#define rfkill_get_led_trigger_name backport_rfkill_get_led_trigger_name
#define rfkill_set_led_trigger_name backport_rfkill_set_led_trigger_name
#define rfkill_set_hw_state backport_rfkill_set_hw_state
#define rfkill_set_sw_state backport_rfkill_set_sw_state
#define rfkill_init_sw_state backport_rfkill_init_sw_state
#define rfkill_set_states backport_rfkill_set_states
#define rfkill_pause_polling backport_rfkill_pause_polling
#define rfkill_resume_polling backport_rfkill_resume_polling
#define rfkill_blocked backport_rfkill_blocked
#define rfkill_alloc backport_rfkill_alloc
#define rfkill_register backport_rfkill_register
#define rfkill_unregister backport_rfkill_unregister
#define rfkill_destroy backport_rfkill_destroy
#ifndef ERFKILL
#if !defined(CONFIG_ALPHA) && !defined(CONFIG_MIPS) && !defined(CONFIG_PARISC) && !defined(CONFIG_SPARC)
#define ERFKILL 132 /* Operation not possible due to RF-kill */
#endif
#ifdef CONFIG_ALPHA
#define ERFKILL 138 /* Operation not possible due to RF-kill */
#endif
#ifdef CONFIG_MIPS
#define ERFKILL 167 /* Operation not possible due to RF-kill */
#endif
#ifdef CONFIG_PARISC
#define ERFKILL 256 /* Operation not possible due to RF-kill */
#endif
#ifdef CONFIG_SPARC
#define ERFKILL 134 /* Operation not possible due to RF-kill */
#endif
#endif
#ifndef NETDEV_PRE_UP
#define NETDEV_PRE_UP 0x000D
#endif
#ifndef SDIO_DEVICE_ID_MARVELL_8688WLAN
#define SDIO_DEVICE_ID_MARVELL_8688WLAN 0x9104
#endif
struct compat_threaded_irq {
unsigned int irq;
irq_handler_t handler;
irq_handler_t thread_fn;
void *dev_id;
char wq_name[64];
struct workqueue_struct *wq;
struct work_struct work;
};
/*
* kmemleak was introduced on 2.6.31, since older kernels do not have
* we simply ignore its tuning.
*/
static inline void kmemleak_ignore(const void *ptr)
{
return;
}
static inline void kmemleak_not_leak(const void *ptr)
{
return;
}
static inline void kmemleak_no_scan(const void *ptr)
{
return;
}
/*
* Added via adf30907d63893e4208dfe3f5c88ae12bc2f25d5
*
* There is no _sk_dst on older kernels, so just set the
* old dst to NULL and release it directly.
*/
static inline void skb_dst_drop(struct sk_buff *skb)
{
dst_release(skb->dst);
skb->dst = NULL;
}
static inline struct dst_entry *skb_dst(const struct sk_buff *skb)
{
return (struct dst_entry *)skb->dst;
}
static inline void skb_dst_set(struct sk_buff *skb, struct dst_entry *dst)
{
skb->dst = dst;
}
static inline struct rtable *skb_rtable(const struct sk_buff *skb)
{
return (struct rtable *)skb_dst(skb);
}
/* Backport threaded IRQ support */
static inline
void compat_irq_work(struct work_struct *work)
{
struct compat_threaded_irq *comp = container_of(work, struct compat_threaded_irq, work);
comp->thread_fn(comp->irq, comp->dev_id);
}
static inline
irqreturn_t compat_irq_dispatcher(int irq, void *dev_id)
{
struct compat_threaded_irq *comp = dev_id;
irqreturn_t res;
res = comp->handler(irq, comp->dev_id);
if (res == IRQ_WAKE_THREAD) {
queue_work(comp->wq, &comp->work);
res = IRQ_HANDLED;
}
return res;
}
static inline
int compat_request_threaded_irq(struct compat_threaded_irq *comp,
unsigned int irq,
irq_handler_t handler,
irq_handler_t thread_fn,
unsigned long flags,
const char *name,
void *dev_id)
{
comp->irq = irq;
comp->handler = handler;
comp->thread_fn = thread_fn;
comp->dev_id = dev_id;
INIT_WORK(&comp->work, compat_irq_work);
if (!comp->wq) {
snprintf(comp->wq_name, sizeof(comp->wq_name),
"compirq/%u-%s", irq, name);
comp->wq = create_singlethread_workqueue(comp->wq_name);
if (!comp->wq) {
printk(KERN_ERR "Failed to create compat-threaded-IRQ workqueue %s\n",
comp->wq_name);
return -ENOMEM;
}
}
return request_irq(irq, compat_irq_dispatcher, flags, name, comp);
}
static inline
void compat_free_threaded_irq(struct compat_threaded_irq *comp)
{
free_irq(comp->irq, comp);
}
static inline
void compat_destroy_threaded_irq(struct compat_threaded_irq *comp)
{
if (comp->wq)
destroy_workqueue(comp->wq);
comp->wq = NULL;
}
static inline
void compat_synchronize_threaded_irq(struct compat_threaded_irq *comp)
{
synchronize_irq(comp->irq);
cancel_work_sync(&comp->work);
}
/**
* list_entry_rcu - get the struct for this entry
* @ptr: the &struct list_head pointer.
* @type: the type of the struct this is embedded in.
* @member: the name of the list_struct within the struct.
*
* This primitive may safely run concurrently with the _rcu list-mutation
* primitives such as list_add_rcu() as long as it's guarded by rcu_read_lock().
*/
#define list_entry_rcu(ptr, type, member) \
container_of(rcu_dereference(ptr), type, member)
#define skb_walk_frags(skb, iter) \
for (iter = skb_shinfo(skb)->frag_list; iter; iter = iter->next)
#ifndef CONFIG_64BIT
typedef struct {
long long counter;
} atomic64_t;
extern long long atomic64_read(const atomic64_t *v);
extern long long atomic64_add_return(long long a, atomic64_t *v);
#define atomic64_inc_return(v) atomic64_add_return(1LL, (v))
#endif
/**
* sk_rmem_alloc_get - returns read allocations
* @sk: socket
*
* Returns sk_rmem_alloc
*/
static inline int sk_rmem_alloc_get(const struct sock *sk)
{
return atomic_read(&sk->sk_rmem_alloc);
}
/**
* sk_wmem_alloc_get - returns write allocations
* @sk: socket
*
* Returns sk_wmem_alloc minus initial offset of one
*/
static inline int sk_wmem_alloc_get(const struct sock *sk)
{
return atomic_read(&sk->sk_wmem_alloc) - 1;
}
/**
* sk_has_allocations - check if allocations are outstanding
* @sk: socket
*
* Returns true if socket has write or read allocations
*/
static inline bool sk_has_allocations(const struct sock *sk)
{
return sk_wmem_alloc_get(sk) || sk_rmem_alloc_get(sk);
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31)) */
#endif /* LINUX_26_31_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.32.h
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#ifndef LINUX_26_32_COMPAT_H
#define LINUX_26_32_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
#include <linux/netdevice.h>
#include <linux/compat.h>
#include <net/iw_handler.h>
#include <linux/workqueue.h>
#include <net/genetlink.h>
#include <net/sch_generic.h>
#define TCQ_F_CAN_BYPASS 4
static inline int qdisc_qlen(const struct Qdisc *q)
{
return q->q.qlen;
}
#define SDIO_VENDOR_ID_INTEL 0x0089
#define SDIO_DEVICE_ID_INTEL_IWMC3200WIMAX 0x1402
#define SDIO_DEVICE_ID_INTEL_IWMC3200WIFI 0x1403
#define SDIO_DEVICE_ID_INTEL_IWMC3200TOP 0x1404
#define SDIO_DEVICE_ID_INTEL_IWMC3200GPS 0x1405
#define SDIO_DEVICE_ID_INTEL_IWMC3200BT 0x1406
/*
* Backports 5e928f77a09a07f9dd595bb8a489965d69a83458
* run-time power management cannot really be backported
* given that the implementation added bus specific
* callbacks that we won't have on older kernels. If
* you really want run-time power management or good
* power management upgrade your kernel. We'll just
* compile this out as if run-time power management was
* disabled just as the kernel disables run-time power management
* when CONFIG_PM_RUNTIME is disabled.
*/
static inline void pm_runtime_init(struct device *dev) {}
static inline void pm_runtime_remove(struct device *dev) {}
static inline int pm_runtime_get(struct device *dev)
{
return 0;
}
static inline int pm_runtime_get_sync(struct device *dev)
{
return 0;
}
static inline int pm_runtime_put(struct device *dev)
{
return 0;
}
static inline int pm_runtime_put_sync(struct device *dev)
{
return 0;
}
static inline int pm_runtime_set_active(struct device *dev)
{
return 0;
}
static inline void pm_runtime_set_suspended(struct device *dev)
{
}
static inline void pm_runtime_disable(struct device *dev)
{
}
static inline void pm_runtime_put_noidle(struct device *dev) {}
static inline void pm_runtime_get_noresume(struct device *dev) {}
static inline void flush_delayed_work(struct delayed_work *dwork)
{
if (del_timer_sync(&dwork->timer)) {
/*
* This is what would happen on 2.6.32 but since we don't have
* access to the singlethread_cpu we can't really backport this,
* so avoid really *flush*ing the work... Oh well. Any better ideas?
struct cpu_workqueue_struct *cwq;
cwq = wq_per_cpu(keventd_wq, get_cpu());
__queue_work(cwq, &dwork->work);
put_cpu();
*/
}
flush_work(&dwork->work);
}
/*
* struct genl_multicast_group was made netns aware through
* patch "genetlink: make netns aware" by johannes, we just
* force this to always use the default init_net
*/
#define genl_info_net(x) &init_net
/* Just use init_net for older kernels */
#define get_net_ns_by_pid(x) &init_net
/* net namespace is lost */
#define genlmsg_multicast_netns(a, b, c, d, e) genlmsg_multicast(b, c, d, e)
#define genlmsg_multicast_allns(a, b, c, d) genlmsg_multicast(a, b, c, d)
#define genlmsg_unicast(net, skb, pid) genlmsg_unicast(skb, pid)
#define dev_change_net_namespace(a, b, c) (-EOPNOTSUPP)
#define SET_NETDEV_DEVTYPE(netdev, type)
#ifdef __KERNEL__
/* Driver transmit return codes */
enum netdev_tx {
BACKPORT_NETDEV_TX_OK = NETDEV_TX_OK, /* driver took care of packet */
BACKPORT_NETDEV_TX_BUSY = NETDEV_TX_BUSY, /* driver tx path was busy*/
BACKPORT_NETDEV_TX_LOCKED = NETDEV_TX_LOCKED, /* driver tx lock was already taken */
};
typedef enum netdev_tx netdev_tx_t;
#endif /* __KERNEL__ */
/*
* dev_pm_ops is only available on kernels >= 2.6.29, for
* older kernels we rely on reverting the work to old
* power management style stuff. On 2.6.29 the pci calls
* weren't included yet though, so include them here.
*/
#if (LINUX_VERSION_CODE == KERNEL_VERSION(2,6,29))
#define SIMPLE_DEV_PM_OPS(name, suspend_fn, resume_fn) \
struct dev_pm_ops name = { \
.suspend = suspend_fn ## _compat, \
.resume = resume_fn ## _compat, \
.freeze = suspend_fn ## _compat, \
.thaw = resume_fn ## _compat, \
.poweroff = suspend_fn ## _compat, \
.restore = resume_fn ## _compat, \
}
#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
/*
* Use this if you want to use the same suspend and resume callbacks for suspend
* to RAM and hibernation.
*/
#define SIMPLE_DEV_PM_OPS(name, suspend_fn, resume_fn) \
struct dev_pm_ops name = { \
.suspend = suspend_fn, \
.resume = resume_fn, \
.freeze = suspend_fn, \
.thaw = resume_fn, \
.poweroff = suspend_fn, \
.restore = resume_fn, \
}
#else
#define SIMPLE_DEV_PM_OPS(name, suspend_fn, resume_fn)
#endif /* >= 2.6.29 */
#define wireless_send_event(a, b, c, d) wireless_send_event(a, b, c, (char * ) d)
/* The export symbol in changed in compat/patches/15-symbol-export-conflicts.patch */
#define ieee80211_rx(hw, skb) mac80211_ieee80211_rx(hw, skb)
#define dev_to_sdio_func(d) container_of(d, struct sdio_func, dev)
#define lockdep_assert_held(l) do { } while (0)
/*
* Similar to the struct tm in userspace <time.h>, but it needs to be here so
* that the kernel source is self contained.
*/
struct tm {
/*
* the number of seconds after the minute, normally in the range
* 0 to 59, but can be up to 60 to allow for leap seconds
*/
int tm_sec;
/* the number of minutes after the hour, in the range 0 to 59*/
int tm_min;
/* the number of hours past midnight, in the range 0 to 23 */
int tm_hour;
/* the day of the month, in the range 1 to 31 */
int tm_mday;
/* the number of months since January, in the range 0 to 11 */
int tm_mon;
/* the number of years since 1900 */
long tm_year;
/* the number of days since Sunday, in the range 0 to 6 */
int tm_wday;
/* the number of days since January 1, in the range 0 to 365 */
int tm_yday;
};
void time_to_tm(time_t totalsecs, int offset, struct tm *result);
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)) */
#endif /* LINUX_26_32_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.33.h
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#ifndef LINUX_26_33_COMPAT_H
#define LINUX_26_33_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
#include <linux/skbuff.h>
#include <linux/pci.h>
#if defined(CONFIG_PCCARD) || defined(CONFIG_PCCARD_MODULE)
#include <pcmcia/cs_types.h>
#include <pcmcia/cistpl.h>
#include <pcmcia/ds.h>
#endif
#include <linux/firmware.h>
#include <linux/input.h>
#if defined(CONFIG_COMPAT_FIRMWARE_CLASS)
#if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
#define release_firmware compat_release_firmware
#define request_firmware compat_request_firmware
#define request_firmware_nowait compat_request_firmware_nowait
#endif
#if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
int compat_request_firmware(const struct firmware **fw, const char *name,
struct device *device);
int compat_request_firmware_nowait(
struct module *module, int uevent,
const char *name, struct device *device, gfp_t gfp, void *context,
void (*cont)(const struct firmware *fw, void *context));
void compat_release_firmware(const struct firmware *fw);
#else
static inline int compat_request_firmware(const struct firmware **fw,
const char *name,
struct device *device)
{
return -EINVAL;
}
static inline int compat_request_firmware_nowait(
struct module *module, int uevent,
const char *name, struct device *device, gfp_t gfp, void *context,
void (*cont)(const struct firmware *fw, void *context))
{
return -EINVAL;
}
static inline void compat_release_firmware(const struct firmware *fw)
{
}
#endif
#endif
/* mask KEY_RFKILL as RHEL6 backports this */
#if !defined(KEY_RFKILL)
#define KEY_RFKILL 247 /* Key that controls all radios */
#endif
/* mask IFF_DONT_BRIDGE as RHEL6 backports this */
#if !defined(IFF_DONT_BRIDGE)
#define IFF_DONT_BRIDGE 0x800 /* disallow bridging this ether dev */
/* source: include/linux/if.h */
#endif
/* mask NETDEV_POST_INIT as RHEL6 backports this */
/* this will never happen on older kernels */
#if !defined(NETDEV_POST_INIT)
#define NETDEV_POST_INIT 0xffff
#endif
/* mask netdev_alloc_skb_ip_align as debian squeeze also backports this */
#define netdev_alloc_skb_ip_align(a, b) compat_netdev_alloc_skb_ip_align(a, b)
static inline struct sk_buff *netdev_alloc_skb_ip_align(struct net_device *dev,
unsigned int length)
{
struct sk_buff *skb = netdev_alloc_skb(dev, length + NET_IP_ALIGN);
if (NET_IP_ALIGN && skb)
skb_reserve(skb, NET_IP_ALIGN);
return skb;
}
#if defined(CONFIG_PCCARD) || defined(CONFIG_PCCARD_MODULE)
#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)
#define pcmcia_request_window(a, b, c) pcmcia_request_window(&a, b, c)
#define pcmcia_map_mem_page(a, b, c) pcmcia_map_mem_page(b, c)
/* loop over CIS entries */
int pcmcia_loop_tuple(struct pcmcia_device *p_dev, cisdata_t code,
int (*loop_tuple) (struct pcmcia_device *p_dev,
tuple_t *tuple,
void *priv_data),
void *priv_data);
#endif /* CONFIG_PCMCIA */
/* loop over CIS entries */
int pccard_loop_tuple(struct pcmcia_socket *s, unsigned int function,
cisdata_t code, cisparse_t *parse, void *priv_data,
int (*loop_tuple) (tuple_t *tuple,
cisparse_t *parse,
void *priv_data));
#endif /* CONFIG_PCCARD */
/**
* list_for_each_entry_continue_rcu - continue iteration over list of given type
* @pos: the type * to use as a loop cursor.
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*
* Continue to iterate over list of given type, continuing after
* the current position.
*/
#define list_for_each_entry_continue_rcu(pos, head, member) \
for (pos = list_entry_rcu(pos->member.next, typeof(*pos), member); \
prefetch(pos->member.next), &pos->member != (head); \
pos = list_entry_rcu(pos->member.next, typeof(*pos), member))
#define sock_recv_ts_and_drops(msg, sk, skb) sock_recv_timestamp(msg, sk, skb)
/* mask pci_pcie_cap as debian squeeze also backports this */
#define pci_pcie_cap(a) compat_pci_pcie_cap(a)
/**
* pci_pcie_cap - get the saved PCIe capability offset
* @dev: PCI device
*
* PCIe capability offset is calculated at PCI device initialization
* time and saved in the data structure. This function returns saved
* PCIe capability offset. Using this instead of pci_find_capability()
* reduces unnecessary search in the PCI configuration space. If you
* need to calculate PCIe capability offset from raw device for some
* reasons, please use pci_find_capability() instead.
*/
static inline int pci_pcie_cap(struct pci_dev *dev)
{
return pci_find_capability(dev, PCI_CAP_ID_EXP);
}
/* mask pci_is_pcie as RHEL6 backports this */
#define pci_is_pcie(a) compat_pci_is_pcie(a)
/**
* pci_is_pcie - check if the PCI device is PCI Express capable
* @dev: PCI device
*
* Retrun true if the PCI device is PCI Express capable, false otherwise.
*/
static inline bool pci_is_pcie(struct pci_dev *dev)
{
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
return dev->is_pcie;
#else
return !!pci_pcie_cap(dev);
#endif
}
#ifdef __GNUC__
#define __always_unused __attribute__((unused))
#else
#define __always_unused /* unimplemented */
#endif
/* mask IS_ERR_OR_NULL as debian squeeze also backports this */
#define IS_ERR_OR_NULL(a) compat_IS_ERR_OR_NULL(a)
static inline long __must_check IS_ERR_OR_NULL(const void *ptr)
{
return !ptr || IS_ERR_VALUE((unsigned long)ptr);
}
#if (LINUX_VERSION_CODE == KERNEL_VERSION(2,6,32))
#undef SIMPLE_DEV_PM_OPS
#define SIMPLE_DEV_PM_OPS(name, suspend_fn, resume_fn) \
const struct dev_pm_ops name = { \
.suspend = suspend_fn, \
.resume = resume_fn, \
.freeze = suspend_fn, \
.thaw = resume_fn, \
.poweroff = suspend_fn, \
.restore = resume_fn, \
}
#endif /* (LINUX_VERSION_CODE == KERNEL_VERSION(2,6,32)) */
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) */
#endif /* LINUX_26_33_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.34.h
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#ifndef LINUX_26_34_COMPAT_H
#define LINUX_26_34_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34))
#include <linux/netdevice.h>
#include <linux/usb.h>
#include <linux/mmc/sdio_func.h>
#include <net/sock.h>
/*
* Backports da68c4eb25
* sdio: introduce API for special power management features
*
* We wimply carry around the data structures and flags, and
* make the host return no flags set by the driver.
*/
typedef unsigned int mmc_pm_flag_t;
#define MMC_PM_KEEP_POWER (1 << 0) /* preserve card power during suspend */
#define MMC_PM_WAKE_SDIO_IRQ (1 << 1) /* wake up host system on SDIO IRQ assertion */
extern mmc_pm_flag_t sdio_get_host_pm_caps(struct sdio_func *func);
extern int sdio_set_host_pm_flags(struct sdio_func *func, mmc_pm_flag_t flags);
void init_compat_mmc_pm_flags(void);
#define netdev_mc_count(dev) ((dev)->mc_count)
#define netdev_mc_empty(dev) (netdev_mc_count(dev) == 0)
/* mask netdev_for_each_mc_addr as RHEL6 backports this */
#if !defined(netdev_for_each_mc_addr)
#define netdev_for_each_mc_addr(mclist, dev) \
for (mclist = dev->mc_list; mclist; mclist = mclist->next)
#endif
/* source: include/linux/netdevice.h */
/* Logging, debugging and troubleshooting/diagnostic helpers. */
/* netdev_printk helpers, similar to dev_printk */
#ifndef netdev_name
#define netdev_name(__dev) \
((__dev->reg_state != NETREG_REGISTERED) ? \
"(unregistered net_device)" : __dev->name)
#endif
#define netdev_printk(level, netdev, format, args...) \
dev_printk(level, (netdev)->dev.parent, \
"%s: " format, \
netdev_name(netdev), ##args)
#define netdev_emerg(dev, format, args...) \
netdev_printk(KERN_EMERG, dev, format, ##args)
#define netdev_alert(dev, format, args...) \
netdev_printk(KERN_ALERT, dev, format, ##args)
#define netdev_crit(dev, format, args...) \
netdev_printk(KERN_CRIT, dev, format, ##args)
#define netdev_err(dev, format, args...) \
netdev_printk(KERN_ERR, dev, format, ##args)
#define netdev_warn(dev, format, args...) \
netdev_printk(KERN_WARNING, dev, format, ##args)
#define netdev_notice(dev, format, args...) \
netdev_printk(KERN_NOTICE, dev, format, ##args)
#define netdev_info(dev, format, args...) \
netdev_printk(KERN_INFO, dev, format, ##args)
/* mask netdev_dbg as RHEL6 backports this */
#if !defined(netdev_dbg)
#if defined(DEBUG)
#define netdev_dbg(__dev, format, args...) \
netdev_printk(KERN_DEBUG, __dev, format, ##args)
#elif defined(CONFIG_DYNAMIC_DEBUG)
#define netdev_dbg(__dev, format, args...) \
do { \
dynamic_dev_dbg((__dev)->dev.parent, "%s: " format, \
netdev_name(__dev), ##args); \
} while (0)
#else
#define netdev_dbg(__dev, format, args...) \
({ \
if (0) \
netdev_printk(KERN_DEBUG, __dev, format, ##args); \
0; \
})
#endif
#endif
/* mask netdev_vdbg as RHEL6 backports this */
#if !defined(netdev_dbg)
#if defined(VERBOSE_DEBUG)
#define netdev_vdbg netdev_dbg
#else
#define netdev_vdbg(dev, format, args...) \
({ \
if (0) \
netdev_printk(KERN_DEBUG, dev, format, ##args); \
0; \
})
#endif
#endif
/*
* netdev_WARN() acts like dev_printk(), but with the key difference
* of using a WARN/WARN_ON to get the message out, including the
* file/line information and a backtrace.
*/
#define netdev_WARN(dev, format, args...) \
WARN(1, "netdevice: %s\n" format, netdev_name(dev), ##args);
/* netif printk helpers, similar to netdev_printk */
#define netif_printk(priv, type, level, dev, fmt, args...) \
do { \
if (netif_msg_##type(priv)) \
netdev_printk(level, (dev), fmt, ##args); \
} while (0)
#define netif_emerg(priv, type, dev, fmt, args...) \
netif_printk(priv, type, KERN_EMERG, dev, fmt, ##args)
#define netif_alert(priv, type, dev, fmt, args...) \
netif_printk(priv, type, KERN_ALERT, dev, fmt, ##args)
#define netif_crit(priv, type, dev, fmt, args...) \
netif_printk(priv, type, KERN_CRIT, dev, fmt, ##args)
#define netif_err(priv, type, dev, fmt, args...) \
netif_printk(priv, type, KERN_ERR, dev, fmt, ##args)
#define netif_warn(priv, type, dev, fmt, args...) \
netif_printk(priv, type, KERN_WARNING, dev, fmt, ##args)
#define netif_notice(priv, type, dev, fmt, args...) \
netif_printk(priv, type, KERN_NOTICE, dev, fmt, ##args)
#define netif_info(priv, type, dev, fmt, args...) \
netif_printk(priv, type, KERN_INFO, (dev), fmt, ##args)
/* mask netif_dbg as RHEL6 backports this */
#if !defined(netif_dbg)
#if defined(DEBUG)
#define netif_dbg(priv, type, dev, format, args...) \
netif_printk(priv, type, KERN_DEBUG, dev, format, ##args)
#elif defined(CONFIG_DYNAMIC_DEBUG)
#define netif_dbg(priv, type, netdev, format, args...) \
do { \
if (netif_msg_##type(priv)) \
dynamic_dev_dbg((netdev)->dev.parent, \
"%s: " format, \
netdev_name(netdev), ##args); \
} while (0)
#else
#define netif_dbg(priv, type, dev, format, args...) \
({ \
if (0) \
netif_printk(priv, type, KERN_DEBUG, dev, format, ##args); \
0; \
})
#endif
#endif
/* mask netif_vdbg as RHEL6 backports this */
#if !defined(netif_vdbg)
#if defined(VERBOSE_DEBUG)
#define netif_vdbg netdev_dbg
#else
#define netif_vdbg(priv, type, dev, format, args...) \
({ \
if (0) \
netif_printk(KERN_DEBUG, dev, format, ##args); \
0; \
})
#endif
#endif
/* source: include/linux/netdevice.h */
static inline void device_lock(struct device *dev)
{
#if defined(CONFIG_PREEMPT_RT) || defined(CONFIG_PREEMPT_DESKTOP)
mutex_lock(&dev->mutex);
#else
down(&dev->sem);
#endif
}
static inline int device_trylock(struct device *dev)
{
#if defined(CONFIG_PREEMPT_RT) || defined(CONFIG_PREEMPT_DESKTOP)
return mutex_trylock(&dev->mutex);
#else
return down_trylock(&dev->sem);
#endif
}
static inline void device_unlock(struct device *dev)
{
#if defined(CONFIG_PREEMPT_RT) || defined(CONFIG_PREEMPT_DESKTOP)
mutex_unlock(&dev->mutex);
#else
up(&dev->sem);
#endif
}
#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)
#define PCMCIA_DEVICE_PROD_ID3(v3, vh3) { \
.match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID3, \
.prod_id = { NULL, NULL, (v3), NULL }, \
.prod_id_hash = { 0, 0, (vh3), 0 }, }
#endif
#define rcu_dereference_check(p, c) rcu_dereference(p)
/**
* sysfs_attr_init - initialize a dynamically allocated sysfs attribute
* @attr: struct attribute to initialize
*
* Initialize a dynamically allocated struct attribute so we can
* make lockdep happy. This is a new requirement for attributes
* and initially this is only needed when lockdep is enabled.
* Lockdep gives a nice error when your attribute is added to
* sysfs if you don't have this.
*/
#ifdef CONFIG_DEBUG_LOCK_ALLOC
#define sysfs_attr_init(attr) \
do { \
static struct lock_class_key __key; \
\
(attr)->key = &__key; \
} while(0)
#else
#define sysfs_attr_init(attr) do {} while(0)
#endif
/* mask sysfs_bin_attr_init as RHEL6 backports this */
#if !defined(sysfs_bin_attr_init)
/**
* sysfs_bin_attr_init - initialize a dynamically allocated bin_attribute
* @attr: struct bin_attribute to initialize
*
* Initialize a dynamically allocated struct bin_attribute so we
* can make lockdep happy. This is a new requirement for
* attributes and initially this is only needed when lockdep is
* enabled. Lockdep gives a nice error when your attribute is
* added to sysfs if you don't have this.
*/
#define sysfs_bin_attr_init(bin_attr) sysfs_attr_init(&(bin_attr)->attr)
#endif
#define usb_alloc_coherent(dev, size, mem_flags, dma) usb_buffer_alloc(dev, size, mem_flags, dma)
#define usb_free_coherent(dev, size, addr, dma) usb_buffer_free(dev, size, addr, dma)
/* only include this if DEFINE_DMA_UNMAP_ADDR is not set as debian squeeze also backports this */
#ifndef DEFINE_DMA_UNMAP_ADDR
#ifdef CONFIG_NEED_DMA_MAP_STATE
#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
#else
#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
#define dma_unmap_addr(PTR, ADDR_NAME) (0)
#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
#define dma_unmap_len(PTR, LEN_NAME) (0)
#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
#endif
#endif
/* mask dma_set_coherent_mask as debian squeeze also backports this */
#define dma_set_coherent_mask(a, b) compat_dma_set_coherent_mask(a, b)
static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
{
if (!dma_supported(dev, mask))
return -EIO;
dev->coherent_dma_mask = mask;
return 0;
}
/* USB autosuspend and autoresume */
static inline int usb_enable_autosuspend(struct usb_device *udev)
{ return 0; }
static inline int usb_disable_autosuspend(struct usb_device *udev)
{ return 0; }
#define rcu_dereference_protected(p, c) (p)
#define rcu_access_pointer(p) ACCESS_ONCE(p)
#define rcu_dereference_raw(p) rcu_dereference(p)
#define KEY_WPS_BUTTON 0x211 /* WiFi Protected Setup key */
/*
* This looks more complex than it should be. But we need to
* get the type for the ~ right in round_down (it needs to be
* as wide as the result!), and we want to evaluate the macro
* arguments just once each.
*/
#define __round_mask(x, y) ((__typeof__(x))((y)-1))
#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1)
#define round_down(x, y) ((x) & ~__round_mask(x, y))
static inline int rcu_read_lock_held(void)
{
return 1;
}
#ifdef CONFIG_PROVE_LOCKING
/*
* Obviously, this is wrong. But the base kernel will have rtnl_mutex
* declared static, with no way to access it. I think this is the best
* we can do...
*/
static inline int lockdep_rtnl_is_held(void)
{
return 1;
}
#endif /* #ifdef CONFIG_PROVE_LOCKING */
extern struct hlist_node *seq_hlist_start_head(struct hlist_head *head,
loff_t pos);
extern struct hlist_node *seq_hlist_next(void *v, struct hlist_head *head,
loff_t *ppos);
static inline struct sock *sk_entry(const struct hlist_node *node)
{
return hlist_entry(node, struct sock, sk_node);
}
#else /* Kernels >= 2.6.34 */
static inline void init_compat_mmc_pm_flags(void)
{
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)) */
#endif /* LINUX_26_34_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.35.h
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#ifndef LINUX_26_35_COMPAT_H
#define LINUX_26_35_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35))
#include <linux/etherdevice.h>
#include <net/sock.h>
#include <linux/types.h>
#include <linux/usb.h>
/* added on linux/kernel.h */
#define USHRT_MAX ((u16)(~0U))
#define SHRT_MAX ((s16)(USHRT_MAX>>1))
#define SHRT_MIN ((s16)(-SHRT_MAX - 1))
#define SDIO_BUS_ECSI 0x20 /* Enable continuous SPI interrupt */
#define SDIO_BUS_SCSI 0x40 /* Support continuous SPI interrupt */
#define netdev_hw_addr dev_mc_list
/* mask irq_set_affinity_hint as RHEL6 backports this */
#define irq_set_affinity_hint(a,b) compat_irq_set_affinity_hint(a,b)
/*
* We cannot backport this guy as the IRQ data structure
* was modified in the kernel itself to support this. We
* treat the system as uni-processor in this case.
*/
static inline int irq_set_affinity_hint(unsigned int irq,
const struct cpumask *m)
{
return -EINVAL;
}
static inline wait_queue_head_t *sk_sleep(struct sock *sk)
{
return sk->sk_sleep;
}
#define sdio_writeb_readb(func, write_byte, addr, err_ret) sdio_readb(func, addr, err_ret)
/* mask hex_to_bin as RHEL6 backports this */
#define hex_to_bin(a) compat_hex_to_bin(a)
int hex_to_bin(char ch);
extern loff_t noop_llseek(struct file *file, loff_t offset, int origin);
#define pm_qos_request(_qos) pm_qos_requirement(_qos)
/* mask usb_pipe_endpoint as RHEL6 backports this */
#define usb_pipe_endpoint(a,b) compat_usb_pipe_endpoint(a,b)
static inline struct usb_host_endpoint *
usb_pipe_endpoint(struct usb_device *dev, unsigned int pipe)
{
struct usb_host_endpoint **eps;
eps = usb_pipein(pipe) ? dev->ep_in : dev->ep_out;
return eps[usb_pipeendpoint(pipe)];
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)) */
#endif /* LINUX_26_35_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.36.h
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#ifndef LINUX_26_36_COMPAT_H
#define LINUX_26_36_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
#include <linux/usb.h>
#include <pcmcia/cistpl.h>
#include <pcmcia/ds.h>
#include <linux/pm_qos_params.h>
#include <linux/smp_lock.h>
#define kparam_block_sysfs_write(a)
#define kparam_unblock_sysfs_write(a)
/* mask va_format as RHEL6 backports this */
#define va_format compat_va_format
struct va_format {
const char *fmt;
va_list *va;
};
#define device_rename(dev, new_name) device_rename(dev, (char *)new_name)
#ifdef CONFIG_COMPAT_USB_URB_THREAD_FIX
#define usb_scuttle_anchored_urbs(anchor) compat_usb_scuttle_anchored_urbs(anchor)
#define usb_get_from_anchor(anchor) compat_usb_get_from_anchor(anchor)
#define usb_unlink_anchored_urbs(anchor) compat_usb_unlink_anchored_urbs(anchor)
extern void compat_usb_unlink_anchored_urbs(struct usb_anchor *anchor);
extern struct urb *compat_usb_get_from_anchor(struct usb_anchor *anchor);
extern void compat_usb_scuttle_anchored_urbs(struct usb_anchor *anchor);
#endif
/**
* pcmcia_read_config_byte() - read a byte from a card configuration register
*
* pcmcia_read_config_byte() reads a byte from a configuration register in
* attribute memory.
*/
static inline int pcmcia_read_config_byte(struct pcmcia_device *p_dev, off_t where, u8 *val)
{
int ret;
conf_reg_t reg = { 0, CS_READ, where, 0 };
ret = pcmcia_access_configuration_register(p_dev, &reg);
*val = reg.Value;
return ret;
}
/**
* pcmcia_write_config_byte() - write a byte to a card configuration register
*
* pcmcia_write_config_byte() writes a byte to a configuration register in
* attribute memory.
*/
static inline int pcmcia_write_config_byte(struct pcmcia_device *p_dev, off_t where, u8 val)
{
conf_reg_t reg = { 0, CS_WRITE, where, val };
return pcmcia_access_configuration_register(p_dev, &reg);
}
struct pm_qos_request_list {
u32 qos;
void *request;
};
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35))
#define pm_qos_add_request(_req, _class, _value) do { \
(_req)->request = #_req; \
(_req)->qos = _class; \
pm_qos_add_requirement((_class), (_req)->request, (_value)); \
} while(0)
#define pm_qos_update_request(_req, _value) \
pm_qos_update_requirement((_req)->qos, (_req)->request, (_value))
#define pm_qos_remove_request(_req) \
pm_qos_remove_requirement((_req)->qos, (_req)->request)
#else
#define pm_qos_add_request(_req, _class, _value) do { \
(_req)->request = pm_qos_add_request((_class), (_value)); \
} while (0)
#define pm_qos_update_request(_req, _value) \
pm_qos_update_request((_req)->request, (_value))
#define pm_qos_remove_request(_req) \
pm_qos_remove_request((_req)->request)
#endif
/*
* Dummy printk for disabled debugging statements to use whilst maintaining
* gcc's format and side-effect checking.
*/
/* mask no_printk as RHEL6 backports this */
#define no_printk(a, ...) compat_no_printk(a, ##__VA_ARGS__)
static inline __attribute__ ((format (printf, 1, 2)))
int no_printk(const char *s, ...) { return 0; }
#ifndef alloc_workqueue
#define alloc_workqueue(name, flags, max_active) __create_workqueue(name, flags, max_active, 0)
#endif
#define EXTPROC 0200000
#define TIOCPKT_IOCTL 64
static inline void tty_lock(void) __acquires(kernel_lock)
{
#ifdef CONFIG_LOCK_KERNEL
/* kernel_locked is 1 for !CONFIG_LOCK_KERNEL */
WARN_ON(kernel_locked());
#endif
lock_kernel();
}
static inline void tty_unlock(void) __releases(kernel_lock)
{
unlock_kernel();
}
#define tty_locked() (kernel_locked())
#define usleep_range(_min, _max) msleep((_max) / 1000)
#define __rcu
static inline void pm_wakeup_event(struct device *dev, unsigned int msec) {}
static inline bool skb_defer_rx_timestamp(struct sk_buff *skb)
{
return false;
}
static inline void skb_tx_timestamp(struct sk_buff *skb)
{
}
/*
* System-wide workqueues which are always present.
*
* system_wq is the one used by schedule[_delayed]_work[_on]().
* Multi-CPU multi-threaded. There are users which expect relatively
* short queue flush time. Don't queue works which can run for too
* long.
*
* system_long_wq is similar to system_wq but may host long running
* works. Queue flushing might take relatively long.
*
* system_nrt_wq is non-reentrant and guarantees that any given work
* item is never executed in parallel by multiple CPUs. Queue
* flushing might take relatively long.
*/
extern struct workqueue_struct *system_wq;
extern struct workqueue_struct *system_long_wq;
extern struct workqueue_struct *system_nrt_wq;
void compat_system_workqueue_create(void);
void compat_system_workqueue_destroy(void);
int compat_schedule_work(struct work_struct *work);
int compat_schedule_work_on(int cpu, struct work_struct *work);
int compat_schedule_delayed_work(struct delayed_work *dwork,
unsigned long delay);
int compat_schedule_delayed_work_on(int cpu,
struct delayed_work *dwork,
unsigned long delay);
void compat_flush_scheduled_work(void);
enum {
/* bit mask for work_busy() return values */
WORK_BUSY_PENDING = 1 << 0,
WORK_BUSY_RUNNING = 1 << 1,
};
extern unsigned int work_busy(struct work_struct *work);
#define schedule_work(work) compat_schedule_work(work)
#define schedule_work_on(cpu, work) compat_schedule_work_on(cpu, work)
#define schedule_delayed_work(dwork, delay) compat_schedule_delayed_work(dwork, delay)
#define schedule_delayed_work_on(cpu, dwork, delay) compat_schedule_delayed_work_on(cpu, dwork, delay)
#define flush_scheduled_work(a) compat_flush_scheduled_work(a)
#define br_port_exists(dev) (dev->br_port)
#else
static inline void compat_system_workqueue_create(void)
{
}
static inline void compat_system_workqueue_destroy(void)
{
}
/*
* This is not part of The 2.6.37 kernel yet but we
* we use it to optimize the backport code we
* need to implement. Instead of using ifdefs
* to check what version of the check we use
* we just replace all checks on current code
* with this. I'll submit this upstream too, that
* way all we'd have to do is to implement this
* for older kernels, then we would not have to
* edit the upstrema code for backport efforts.
*/
#define br_port_exists(dev) (dev->priv_flags & IFF_BRIDGE_PORT)
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) */
#endif /* LINUX_26_36_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.37.h
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#ifndef LINUX_26_37_COMPAT_H
#define LINUX_26_37_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37))
#include <linux/skbuff.h>
#include <linux/leds.h>
#include <linux/in.h>
#include <linux/errno.h>
static inline int proto_ports_offset(int proto)
{
switch (proto) {
case IPPROTO_TCP:
case IPPROTO_UDP:
case IPPROTO_DCCP:
case IPPROTO_ESP: /* SPI */
case IPPROTO_SCTP:
case IPPROTO_UDPLITE:
return 0;
case IPPROTO_AH: /* SPI */
return 4;
default:
return -EINVAL;
}
}
#define SDIO_CLASS_BT_AMP 0x09 /* Type-A Bluetooth AMP interface */
extern struct kobj_ns_type_operations net_ns_type_operations;
/* mask skb_checksum_none_assert as RHEL6 backports this */
#define skb_checksum_none_assert(a) compat_skb_checksum_none_assert(a)
/**
* skb_checksum_none_assert - make sure skb ip_summed is CHECKSUM_NONE
* @skb: skb to check
*
* fresh skbs have their ip_summed set to CHECKSUM_NONE.
* Instead of forcing ip_summed to CHECKSUM_NONE, we can
* use this helper, to document places where we make this assertion.
*/
static inline void skb_checksum_none_assert(struct sk_buff *skb)
{
#ifdef DEBUG
BUG_ON(skb->ip_summed != CHECKSUM_NONE);
#endif
}
#define pcmcia_enable_device(link) pcmcia_request_configuration(link, &link->conf)
#include <net/genetlink.h>
struct compat_genl_info {
struct genl_info *info;
u32 snd_seq;
u32 snd_pid;
struct genlmsghdr *genlhdr;
struct nlattr **attrs;
void *user_ptr[2];
};
#define genl_info compat_genl_info
struct compat_genl_ops {
struct genl_ops ops;
u8 cmd;
u8 internal_flags;
unsigned int flags;
const struct nla_policy *policy;
int (*doit)(struct sk_buff *skb, struct genl_info *info);
int (*dumpit)(struct sk_buff *skb, struct netlink_callback *cb);
int (*done)(struct netlink_callback *cb);
};
#define genl_ops compat_genl_ops
struct compat_genl_family {
struct genl_family family;
struct list_head list;
unsigned int id, hdrsize, version, maxattr;
const char *name;
bool netnsok;
struct nlattr **attrbuf;
int (*pre_doit)(struct genl_ops *ops, struct sk_buff *skb,
struct genl_info *info);
void (*post_doit)(struct genl_ops *ops, struct sk_buff *skb,
struct genl_info *info);
};
#define genl_family compat_genl_family
#define genl_register_family_with_ops compat_genl_register_family_with_ops
int genl_register_family_with_ops(struct genl_family *family,
struct genl_ops *ops, size_t n_ops);
#define genl_unregister_family compat_genl_unregister_family
int genl_unregister_family(struct genl_family *family);
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
#define genl_info_net(_info) genl_info_net((_info)->info)
#endif
#define genlmsg_reply(_msg, _info) genlmsg_reply(_msg, (_info)->info)
#define genlmsg_put(_skb, _pid, _seq, _fam, _flags, _cmd) genlmsg_put(_skb, _pid, _seq, &(_fam)->family, _flags, _cmd)
#define genl_register_mc_group(_fam, _grp) genl_register_mc_group(&(_fam)->family, _grp)
#define genl_unregister_mc_group(_fam, _grp) genl_unregister_mc_group(&(_fam)->family, _grp)
extern void led_blink_set(struct led_classdev *led_cdev,
unsigned long *delay_on,
unsigned long *delay_off);
#define led_classdev_unregister compat_led_classdev_unregister
extern void compat_led_classdev_unregister(struct led_classdev *led_cdev);
#define led_brightness_set compat_led_brightness_set
extern void compat_led_brightness_set(struct led_classdev *led_cdev,
enum led_brightness brightness);
#define alloc_ordered_workqueue(name, flags) create_singlethread_workqueue(name)
#define netdev_refcnt_read(a) atomic_read(&a->refcnt)
/* mask vzalloc as RHEL6 backports this */
#define vzalloc(a) compat_vzalloc(a)
extern void *vzalloc(unsigned long size);
#define rtnl_dereference(p) \
rcu_dereference_protected(p, lockdep_rtnl_is_held())
/**
* RCU_INIT_POINTER() - initialize an RCU protected pointer
*
* Initialize an RCU-protected pointer in such a way to avoid RCU-lockdep
* splats.
*/
#define RCU_INIT_POINTER(p, v) \
p = (typeof(*v) __force __rcu *)(v)
static inline bool skb_has_frag_list(const struct sk_buff *skb)
{
return skb_shinfo(skb)->frag_list != NULL;
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) */
#endif /* LINUX_26_37_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.38.h
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#ifndef LINUX_26_38_COMPAT_H
#define LINUX_26_38_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
#include <linux/kernel.h>
#include <linux/skbuff.h>
#include <linux/etherdevice.h>
#include <net/sch_generic.h>
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,30))
static inline void bstats_update(struct gnet_stats_basic_packed *bstats,
const struct sk_buff *skb)
{
bstats->bytes += qdisc_pkt_len((struct sk_buff *) skb);
bstats->packets += skb_is_gso(skb) ? skb_shinfo(skb)->gso_segs : 1;
}
static inline void qdisc_bstats_update(struct Qdisc *sch,
const struct sk_buff *skb)
{
bstats_update(&sch->bstats, skb);
}
#else
/*
* kernels <= 2.6.30 do not pass a const skb to qdisc_pkt_len, and
* gnet_stats_basic_packed did not exist (see c1a8f1f1c8)
*/
static inline void bstats_update(struct gnet_stats_basic *bstats,
struct sk_buff *skb)
{
bstats->bytes += qdisc_pkt_len(skb);
bstats->packets += skb_is_gso(skb) ? skb_shinfo(skb)->gso_segs : 1;
}
static inline void qdisc_bstats_update(struct Qdisc *sch,
struct sk_buff *skb)
{
bstats_update(&sch->bstats, skb);
}
#endif
/* rename member in struct mmc_host in include/linux/mmc/host.h */
#define max_segs max_hw_segs
/* Exponentially weighted moving average (EWMA) */
/* For more documentation see lib/average.c */
struct ewma {
unsigned long internal;
unsigned long factor;
unsigned long weight;
};
/* mask ewma_init as RHEL6 backports this */
#define ewma_init(a,b,c) compat_ewma_init(a,b,c)
extern void ewma_init(struct ewma *avg, unsigned long factor,
unsigned long weight);
/* mask ewma_add as RHEL6 backports this */
#define ewma_add(a,b) compat_ewma_add(a,b)
extern struct ewma *ewma_add(struct ewma *avg, unsigned long val);
/**
* ewma_read() - Get average value
* @avg: Average structure
*
* Returns the average value held in @avg.
*/
static inline unsigned long ewma_read(const struct ewma *avg)
{
return DIV_ROUND_CLOSEST(avg->internal, avg->factor);
}
#define pr_warn pr_warning
#define create_freezable_workqueue create_freezeable_workqueue
static inline int skb_checksum_start_offset(const struct sk_buff *skb)
{
return skb->csum_start - skb_headroom(skb);
}
/* from include/linux/printk.h */
#define pr_emerg_once(fmt, ...) \
printk_once(KERN_EMERG pr_fmt(fmt), ##__VA_ARGS__)
#define pr_alert_once(fmt, ...) \
printk_once(KERN_ALERT pr_fmt(fmt), ##__VA_ARGS__)
#define pr_crit_once(fmt, ...) \
printk_once(KERN_CRIT pr_fmt(fmt), ##__VA_ARGS__)
#define pr_err_once(fmt, ...) \
printk_once(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
#define pr_warn_once(fmt, ...) \
printk_once(KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__)
#define pr_notice_once(fmt, ...) \
printk_once(KERN_NOTICE pr_fmt(fmt), ##__VA_ARGS__)
#define pr_info_once(fmt, ...) \
printk_once(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__)
#define pr_cont_once(fmt, ...) \
printk_once(KERN_CONT pr_fmt(fmt), ##__VA_ARGS__)
#if defined(DEBUG)
#define pr_debug_once(fmt, ...) \
printk_once(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
#else
#define pr_debug_once(fmt, ...) \
no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
#endif
/* include/linux/netdevice.h */
#define alloc_netdev_mqs(sizeof_priv, name, setup, txqs, rxqs) \
alloc_netdev_mq(sizeof_priv, name, setup, \
max_t(unsigned int, txqs, rxqs))
#define ETH_P_LINK_CTL 0x886c /* HPNA, wlan link local tunnel */
/**
* is_unicast_ether_addr - Determine if the Ethernet address is unicast
* @addr: Pointer to a six-byte array containing the Ethernet address
*
* Return true if the address is a unicast address.
*/
static inline int is_unicast_ether_addr(const u8 *addr)
{
return !is_multicast_ether_addr(addr);
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)) */
#endif /* LINUX_26_38_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.39.h
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#ifndef LINUX_26_39_COMPAT_H
#define LINUX_26_39_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39))
#include <linux/tty.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#define tiocmget(tty) tiocmget(tty, NULL)
#define tiocmset(tty, set, clear) tiocmset(tty, NULL, set, clear)
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))
extern int tty_set_termios(struct tty_struct *tty, struct ktermios *kt);
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) */
static inline int irq_set_irq_wake(unsigned int irq, unsigned int on)
{
return set_irq_wake(irq, on);
}
static inline int irq_set_chip(unsigned int irq, struct irq_chip *chip)
{
return set_irq_chip(irq, chip);
}
static inline int irq_set_handler_data(unsigned int irq, void *data)
{
return set_irq_data(irq, data);
}
static inline int irq_set_chip_data(unsigned int irq, void *data)
{
return set_irq_chip_data(irq, data);
}
static inline int irq_set_irq_type(unsigned int irq, unsigned int type)
{
return set_irq_type(irq, type);
}
static inline int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
{
return set_irq_msi(irq, entry);
}
static inline struct irq_chip *irq_get_chip(unsigned int irq)
{
return get_irq_chip(irq);
}
static inline void *irq_get_chip_data(unsigned int irq)
{
return get_irq_chip_data(irq);
}
static inline void *irq_get_handler_data(unsigned int irq)
{
return get_irq_data(irq);
}
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
static inline void *irq_data_get_irq_handler_data(struct irq_data *d)
{
return irq_data_get_irq_data(d);
}
#endif
static inline struct msi_desc *irq_get_msi_desc(unsigned int irq)
{
return get_irq_msi(irq);
}
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25))
static inline void irq_set_noprobe(unsigned int irq)
{
set_irq_noprobe(irq);
}
static inline void irq_set_probe(unsigned int irq)
{
set_irq_probe(irq);
}
#endif
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
static inline struct irq_chip *irq_desc_get_chip(struct irq_desc *desc)
{
return get_irq_desc_chip(desc);
}
static inline void *irq_desc_get_handler_data(struct irq_desc *desc)
{
return get_irq_desc_data(desc);
}
static inline void *irq_desc_get_chip_data(struct irq_desc *desc)
{
return get_irq_desc_chip_data(desc);
}
static inline struct msi_desc *irq_desc_get_msi_desc(struct irq_desc *desc)
{
return get_irq_desc_msi(desc);
}
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) */
/*
* kstrto* was included in kernel 2.6.38.4 and causes conflicts with the
* version included in compat-drivers. We use strict_strtol to check if
* kstrto* is already available.
*/
#ifndef strict_strtol
/* Internal, do not use. */
int __must_check _kstrtoul(const char *s, unsigned int base, unsigned long *res);
int __must_check _kstrtol(const char *s, unsigned int base, long *res);
int __must_check kstrtoull(const char *s, unsigned int base, unsigned long long *res);
int __must_check kstrtoll(const char *s, unsigned int base, long long *res);
static inline int __must_check kstrtoul(const char *s, unsigned int base, unsigned long *res)
{
/*
* We want to shortcut function call, but
* __builtin_types_compatible_p(unsigned long, unsigned long long) = 0.
*/
if (sizeof(unsigned long) == sizeof(unsigned long long) &&
__alignof__(unsigned long) == __alignof__(unsigned long long))
return kstrtoull(s, base, (unsigned long long *)res);
else
return _kstrtoul(s, base, res);
}
static inline int __must_check kstrtol(const char *s, unsigned int base, long *res)
{
/*
* We want to shortcut function call, but
* __builtin_types_compatible_p(long, long long) = 0.
*/
if (sizeof(long) == sizeof(long long) &&
__alignof__(long) == __alignof__(long long))
return kstrtoll(s, base, (long long *)res);
else
return _kstrtol(s, base, res);
}
int __must_check kstrtouint(const char *s, unsigned int base, unsigned int *res);
int __must_check kstrtoint(const char *s, unsigned int base, int *res);
static inline int __must_check kstrtou64(const char *s, unsigned int base, u64 *res)
{
return kstrtoull(s, base, res);
}
static inline int __must_check kstrtos64(const char *s, unsigned int base, s64 *res)
{
return kstrtoll(s, base, res);
}
static inline int __must_check kstrtou32(const char *s, unsigned int base, u32 *res)
{
return kstrtouint(s, base, res);
}
static inline int __must_check kstrtos32(const char *s, unsigned int base, s32 *res)
{
return kstrtoint(s, base, res);
}
int __must_check kstrtou16(const char *s, unsigned int base, u16 *res);
int __must_check kstrtos16(const char *s, unsigned int base, s16 *res);
int __must_check kstrtou8(const char *s, unsigned int base, u8 *res);
int __must_check kstrtos8(const char *s, unsigned int base, s8 *res);
#endif /* ifndef strict_strtol */
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39)) */
#endif /* LINUX_26_39_COMPAT_H */
external/compat-wireless/include/linux/compat-2.6.h
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#ifndef LINUX_26_COMPAT_H
#define LINUX_26_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,1,0))
#include <linux/kconfig.h>
#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33))
#include <generated/autoconf.h>
#else
#include <linux/autoconf.h>
#endif
#include <linux/compat_autoconf.h>
#include <linux/init.h>
/*
* The define overwriting module_init is based on the original module_init
* which looks like this:
* #define module_init(initfn) \
* static inline initcall_t __inittest(void) \
* { return initfn; } \
* int init_module(void) __attribute__((alias(#initfn)));
*
* To the call to the initfn we added the symbol dependency on compat
* to make sure that compat.ko gets loaded for any compat modules.
*/
void compat_dependency_symbol(void);
#undef module_init
#define module_init(initfn) \
static int __init __init_compat(void) \
{ \
compat_dependency_symbol(); \
return initfn(); \
} \
int init_module(void) __attribute__((alias("__init_compat")));
/*
* Each compat file represents compatibility code for new kernel
* code introduced for *that* kernel revision.
*/
#include <linux/compat-2.6.22.h>
#include <linux/compat-2.6.23.h>
#include <linux/compat-2.6.24.h>
#include <linux/compat-2.6.25.h>
#include <linux/compat-2.6.26.h>
#include <linux/compat-2.6.27.h>
#include <linux/compat-2.6.28.h>
#include <linux/compat-2.6.29.h>
#include <linux/compat-2.6.30.h>
#include <linux/compat-2.6.31.h>
#include <linux/compat-2.6.32.h>
#include <linux/compat-2.6.33.h>
#include <linux/compat-2.6.34.h>
#include <linux/compat-2.6.35.h>
#include <linux/compat-2.6.36.h>
#include <linux/compat-2.6.37.h>
#include <linux/compat-2.6.38.h>
#include <linux/compat-2.6.39.h>
#include <linux/compat-3.0.h>
#include <linux/compat-3.1.h>
#include <linux/compat-3.2.h>
#include <linux/compat-3.3.h>
#include <linux/compat-3.4.h>
#include <linux/compat-3.5.h>
#include <linux/compat-3.6.h>
#include <linux/compat-3.7.h>
#endif /* LINUX_26_COMPAT_H */
external/compat-wireless/include/linux/compat-3.0.h
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#ifndef LINUX_3_0_COMPAT_H
#define LINUX_3_0_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0))
#include <linux/rcupdate.h>
/* This pulls-in a lot of non-exported symbol backports
* on kernels older than 2.6.32. There's no harm for not
* making this available on kernels < 2.6.32. */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
#include <linux/pagemap.h>
/* This backports the 2nd part of:
*
* commit d9d90e5eb70e09903dadff42099b6c948f814050
* Author: Hugh Dickins <hughd@google.com>
* Date: Mon Jun 27 16:18:04 2011 -0700
*
* tmpfs: add shmem_read_mapping_page_gfp
*
* First part is in compat-3.0.c.
*/
extern struct page *shmem_read_mapping_page_gfp(struct address_space *mapping,
pgoff_t index, gfp_t gfp);
static inline struct page *shmem_read_mapping_page(
struct address_space *mapping, pgoff_t index)
{
return shmem_read_mapping_page_gfp(mapping, index,
mapping_gfp_mask(mapping));
}
#endif
/*
* since commit 1c5cae815d19ffe02bdfda1260949ef2b1806171
* "net: call dev_alloc_name from register_netdevice" dev_alloc_name is
* called automatically. This is not implemented in older kernel
* versions so it will result in device wrong names.
*/
static inline int register_netdevice_name(struct net_device *dev)
{
int err;
if (strchr(dev->name, '%')) {
err = dev_alloc_name(dev, dev->name);
if (err < 0)
return err;
}
return register_netdevice(dev);
}
#define register_netdevice(dev) register_netdevice_name(dev)
/* BCMA core, see drivers/bcma/ */
#ifndef BCMA_CORE
/* Broadcom's specific AMBA core, see drivers/bcma/ */
struct bcma_device_id {
__u16 manuf;
__u16 id;
__u8 rev;
__u8 class;
};
#define BCMA_CORE(_manuf, _id, _rev, _class) \
{ .manuf = _manuf, .id = _id, .rev = _rev, .class = _class, }
#define BCMA_CORETABLE_END \
{ 0, },
#define BCMA_ANY_MANUF 0xFFFF
#define BCMA_ANY_ID 0xFFFF
#define BCMA_ANY_REV 0xFF
#define BCMA_ANY_CLASS 0xFF
#endif /* BCMA_CORE */
int mac_pton(const char *s, u8 *mac);
int __must_check kstrtoull_from_user(const char __user *s, size_t count, unsigned int base, unsigned long long *res);
int __must_check kstrtoll_from_user(const char __user *s, size_t count, unsigned int base, long long *res);
int __must_check kstrtoul_from_user(const char __user *s, size_t count, unsigned int base, unsigned long *res);
int __must_check kstrtol_from_user(const char __user *s, size_t count, unsigned int base, long *res);
int __must_check kstrtouint_from_user(const char __user *s, size_t count, unsigned int base, unsigned int *res);
int __must_check kstrtoint_from_user(const char __user *s, size_t count, unsigned int base, int *res);
int __must_check kstrtou16_from_user(const char __user *s, size_t count, unsigned int base, u16 *res);
int __must_check kstrtos16_from_user(const char __user *s, size_t count, unsigned int base, s16 *res);
int __must_check kstrtou8_from_user(const char __user *s, size_t count, unsigned int base, u8 *res);
int __must_check kstrtos8_from_user(const char __user *s, size_t count, unsigned int base, s8 *res);
static inline int __must_check kstrtou64_from_user(const char __user *s, size_t count, unsigned int base, u64 *res)
{
return kstrtoull_from_user(s, count, base, res);
}
static inline int __must_check kstrtos64_from_user(const char __user *s, size_t count, unsigned int base, s64 *res)
{
return kstrtoll_from_user(s, count, base, res);
}
static inline int __must_check kstrtou32_from_user(const char __user *s, size_t count, unsigned int base, u32 *res)
{
return kstrtouint_from_user(s, count, base, res);
}
static inline int __must_check kstrtos32_from_user(const char __user *s, size_t count, unsigned int base, s32 *res)
{
return kstrtoint_from_user(s, count, base, res);
}
/*
* This adds a nested function everywhere kfree_rcu() was called. This
* function frees the memory and is given as a function to call_rcu().
* The rcu callback could happen every time also after the module was
* unloaded and this will cause problems.
*/
#define kfree_rcu(data, rcuhead) do { \
void __kfree_rcu_fn(struct rcu_head *rcu_head) \
{ \
void *___ptr; \
___ptr = container_of(rcu_head, typeof(*(data)), rcuhead);\
kfree(___ptr); \
} \
call_rcu(&(data)->rcuhead, __kfree_rcu_fn); \
} while (0)
#ifdef MODULE
/*
* The define overwriting module_exit is based on the original module_exit
* which looks like this:
* #define module_exit(exitfn) \
* static inline exitcall_t __exittest(void) \
* { return exitfn; } \
* void cleanup_module(void) __attribute__((alias(#exitfn)));
*
* We replaced the call to the actual function exitfn() with a call to our
* function which calls the original exitfn() and then rcu_barrier()
*
* As a module will not be unloaded that ofter it should not have a big
* performance impact when rcu_barrier() is called on every module exit,
* also when no kfree_rcu() backport is used in that module.
*/
#undef module_exit
#define module_exit(exitfn) \
static void __exit __exit_compat(void) \
{ \
exitfn(); \
rcu_barrier(); \
} \
void cleanup_module(void) __attribute__((alias("__exit_compat")));
#endif
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)) */
#endif /* LINUX_3_0_COMPAT_H */
external/compat-wireless/include/linux/compat-3.1.h
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#ifndef LINUX_3_1_COMPAT_H
#define LINUX_3_1_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0))
#include <linux/security.h>
#include <linux/skbuff.h>
#include <net/ip.h>
#include <linux/idr.h>
#include <asm/div64.h>
/* This backports:
*
* commit 36a26c69b4c70396ef569c3452690fba0c1dec08
* Author: Nicholas Bellinger <nab@linux-iscsi.org>
* Date: Tue Jul 26 00:35:26 2011 -0700
*
* kernel.h: Add DIV_ROUND_UP_ULL and DIV_ROUND_UP_SECTOR_T macro usage
*/
#define DIV_ROUND_UP_ULL(ll,d) \
({ unsigned long long _tmp = (ll)+(d)-1; do_div(_tmp, d); _tmp; })
/* Backports 56f8a75c */
static inline bool ip_is_fragment(const struct iphdr *iph)
{
return (iph->frag_off & htons(IP_MF | IP_OFFSET)) != 0;
}
/* mask __netdev_alloc_skb_ip_align as RHEL6 backports this */
#define __netdev_alloc_skb_ip_align(a,b,c) compat__netdev_alloc_skb_ip_align(a,b,c)
static inline struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev,
unsigned int length, gfp_t gfp)
{
struct sk_buff *skb = __netdev_alloc_skb(dev, length + NET_IP_ALIGN, gfp);
if (NET_IP_ALIGN && skb)
skb_reserve(skb, NET_IP_ALIGN);
return skb;
}
/*
* Getting something that works in C and CPP for an arg that may or may
* not be defined is tricky. Here, if we have "#define CONFIG_BOOGER 1"
* we match on the placeholder define, insert the "0," for arg1 and generate
* the triplet (0, 1, 0). Then the last step cherry picks the 2nd arg (a one).
* When CONFIG_BOOGER is not defined, we generate a (... 1, 0) pair, and when
* the last step cherry picks the 2nd arg, we get a zero.
*/
#define __ARG_PLACEHOLDER_1 0,
#define config_enabled(cfg) _config_enabled(cfg)
#define _config_enabled(value) __config_enabled(__ARG_PLACEHOLDER_##value)
#define __config_enabled(arg1_or_junk) ___config_enabled(arg1_or_junk 1, 0)
#define ___config_enabled(__ignored, val, ...) val
#define genl_dump_check_consistent(cb, user_hdr, family)
/*
* IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y' or 'm',
* 0 otherwise.
*
*/
#define IS_ENABLED(option) \
(config_enabled(option) || config_enabled(option##_MODULE))
#define IFF_TX_SKB_SHARING 0x10000 /* The interface supports sharing
* skbs on transmit */
#define PCMCIA_DEVICE_MANF_CARD_PROD_ID3(manf, card, v3, vh3) { \
.match_flags = PCMCIA_DEV_ID_MATCH_MANF_ID| \
PCMCIA_DEV_ID_MATCH_CARD_ID| \
PCMCIA_DEV_ID_MATCH_PROD_ID3, \
.manf_id = (manf), \
.card_id = (card), \
.prod_id = { NULL, NULL, (v3), NULL }, \
.prod_id_hash = { 0, 0, (vh3), 0 }, }
/*
* This has been defined in include/linux/security.h for some time, but was
* only given an EXPORT_SYMBOL for 3.1. Add a compat_* definition to avoid
* breaking the compile.
*/
#define security_sk_clone(a, b) compat_security_sk_clone(a, b)
static inline void security_sk_clone(const struct sock *sk, struct sock *newsk)
{
}
/*
* In many versions, several architectures do not seem to include an
* atomic64_t implementation, and do not include the software emulation from
* asm-generic/atomic64_t.
* Detect and handle this here.
*/
#include <asm/atomic.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)) && !defined(ATOMIC64_INIT) && !defined(CONFIG_X86) && !((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) && defined(CONFIG_ARM) && !defined(CONFIG_GENERIC_ATOMIC64))
#include <asm-generic/atomic64.h>
#endif
/* mask ida_simple_get as RHEL6 backports this */
#define ida_simple_get(a,b,c,d) compat_ida_simple_get(a,b,c,d)
int ida_simple_get(struct ida *ida, unsigned int start, unsigned int end,
gfp_t gfp_mask);
/* mask ida_simple_remove as RHEL6 backports this */
#define ida_simple_remove(a,b) compat_ida_simple_remove(a,b)
void ida_simple_remove(struct ida *ida, unsigned int id);
/* mask cpufreq_quick_get_max as RHEL6 backports this */
#define cpufreq_quick_get_max(a) compat_cpufreq_quick_get_max(a)
unsigned int cpufreq_quick_get_max(unsigned int cpu);
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)) */
#endif /* LINUX_3_1_COMPAT_H */
external/compat-wireless/include/linux/compat-3.2.h
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#ifndef LINUX_3_2_COMPAT_H
#define LINUX_3_2_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
#include <linux/skbuff.h>
#include <linux/dma-mapping.h>
/* backports b4625dab */
#define SDIO_CCCR_REV_3_00 3 /* CCCR/FBR Version 3.00 */
#define SDIO_SDIO_REV_3_00 4 /* SDIO Spec Version 3.00 */
#define PMSG_IS_AUTO(msg) (((msg).event & PM_EVENT_AUTO) != 0)
/* mask skb_frag_page as RHEL6 backports this */
#define skb_frag_page(a) compat_skb_frag_page(a)
/**
* skb_frag_page - retrieve the page refered to by a paged fragment
* @frag: the paged fragment
*
* Returns the &struct page associated with @frag.
*/
static inline struct page *skb_frag_page(const skb_frag_t *frag)
{
return frag->page;
}
/* mask skb_frag_dma_map as RHEL6 backports this */
#define skb_frag_dma_map(a,b,c,d,e) compat_skb_frag_dma_map(a,b,c,d,e)
/**
* skb_frag_dma_map - maps a paged fragment via the DMA API
* @device: the device to map the fragment to
* @frag: the paged fragment to map
* @offset: the offset within the fragment (starting at the
* fragment's own offset)
* @size: the number of bytes to map
* @direction: the direction of the mapping (%PCI_DMA_*)
*
* Maps the page associated with @frag to @device.
*/
static inline dma_addr_t skb_frag_dma_map(struct device *dev,
const skb_frag_t *frag,
size_t offset, size_t size,
enum dma_data_direction dir)
{
return dma_map_page(dev, skb_frag_page(frag),
frag->page_offset + offset, size, dir);
}
#define ETH_P_TDLS 0x890D /* TDLS */
/* mask skb_frag_size as RHEL6 backports this */
#define skb_frag_size(a) compat_skb_frag_size(a)
static inline unsigned int skb_frag_size(const skb_frag_t *frag)
{
return frag->size;
}
static inline char *hex_byte_pack(char *buf, u8 byte)
{
*buf++ = hex_asc_hi(byte);
*buf++ = hex_asc_lo(byte);
return buf;
}
/* module_platform_driver() - Helper macro for drivers that don't do
* anything special in module init/exit. This eliminates a lot of
* boilerplate. Each module may only use this macro once, and
* calling it replaces module_init() and module_exit()
*/
#define module_platform_driver(__platform_driver) \
module_driver(__platform_driver, platform_driver_register, \
platform_driver_unregister)
static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag)
{
void *ret = dma_alloc_coherent(dev, size, dma_handle, flag);
if (ret)
memset(ret, 0, size);
return ret;
}
extern int __netdev_printk(const char *level, const struct net_device *dev,
struct va_format *vaf);
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)) */
#endif /* LINUX_3_2_COMPAT_H */
external/compat-wireless/include/linux/compat-3.3.h
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#ifndef LINUX_3_3_COMPAT_H
#define LINUX_3_3_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0))
#include <linux/pci_regs.h>
/* include to override NL80211_FEATURE_SK_TX_STATUS */
#include <linux/nl80211.h>
#include <linux/skbuff.h>
#include <net/sch_generic.h>
#define __ARG_PLACEHOLDER_1 0,
#define config_enabled(cfg) _config_enabled(cfg)
#define _config_enabled(value) __config_enabled(__ARG_PLACEHOLDER_##value)
#define __config_enabled(arg1_or_junk) ___config_enabled(arg1_or_junk 1, 0)
#define ___config_enabled(__ignored, val, ...) val
#if !((LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,9) && LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)) || (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,23) && LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)))
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,37))
/* mask qdisc_cb_private_validate as RHEL6 backports this */
#define qdisc_cb_private_validate(a,b) compat_qdisc_cb_private_validate(a,b)
static inline void qdisc_cb_private_validate(const struct sk_buff *skb, int sz)
{
BUILD_BUG_ON(sizeof(skb->cb) < sizeof(struct qdisc_skb_cb) + sz);
}
#else
/* mask qdisc_cb_private_validate as RHEL6 backports this */
#define qdisc_cb_private_validate(a,b) compat_qdisc_cb_private_validate(a,b)
static inline void qdisc_cb_private_validate(const struct sk_buff *skb, int sz)
{
/* XXX ? */
}
#endif
#endif
extern struct sk_buff *__pskb_copy(struct sk_buff *skb,
int headroom, gfp_t gfp_mask);
static inline void skb_complete_wifi_ack(struct sk_buff *skb, bool acked)
{
WARN_ON(1);
}
#define NL80211_FEATURE_SK_TX_STATUS 0
typedef u32 netdev_features_t;
/* source include/linux/device.h */
/**
* module_driver() - Helper macro for drivers that don't do anything
* special in module init/exit. This eliminates a lot of boilerplate.
* Each module may only use this macro once, and calling it replaces
* module_init() and module_exit().
*
* Use this macro to construct bus specific macros for registering
* drivers, and do not use it on its own.
*/
#define module_driver(__driver, __register, __unregister) \
static int __init __driver##_init(void) \
{ \
return __register(&(__driver)); \
} \
module_init(__driver##_init); \
static void __exit __driver##_exit(void) \
{ \
__unregister(&(__driver)); \
} \
module_exit(__driver##_exit);
/* source include/linux/usb.h */
/**
* module_usb_driver() - Helper macro for registering a USB driver
* @__usb_driver: usb_driver struct
*
* Helper macro for USB drivers which do not do anything special in module
* init/exit. This eliminates a lot of boilerplate. Each module may only
* use this macro once, and calling it replaces module_init() and module_exit()
*/
#define module_usb_driver(__usb_driver) \
module_driver(__usb_driver, usb_register, \
usb_deregister)
/*
* PCI_EXP_TYPE_RC_EC was added via 1b6b8ce2 on v2.6.30-rc4~20 :
*
* mcgrof@frijol ~/linux-next (git::master)$ git describe --contains 1b6b8ce2
* v2.6.30-rc4~20^2
*
* but the fix for its definition was merged on v3.3-rc1~101^2~67
*
* mcgrof@frijol ~/linux-next (git::master)$ git describe --contains 1830ea91
* v3.3-rc1~101^2~67
*
* while we can assume it got merged and backported on v3.2.28 (which it did
* see c1c3cd9) we cannot assume every kernel has it fixed so lets just undef
* it here and redefine it.
*/
#undef PCI_EXP_TYPE_RC_EC
#define PCI_EXP_TYPE_RC_EC 0xa /* Root Complex Event Collector */
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)) */
#endif /* LINUX_3_3_COMPAT_H */
external/compat-wireless/include/linux/compat-3.4.h
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#ifndef LINUX_3_4_COMPAT_H
#define LINUX_3_4_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0))
/* This backports:
*
* commit 63b2001169e75cd71e917ec953fdab572e3f944a
* Author: Thomas Gleixner <tglx@linutronix.de>
* Date: Thu Dec 1 00:04:00 2011 +0100
* sched/wait: Add __wake_up_all_locked() API
*/
#include <linux/wait.h>
extern void compat_wake_up_locked(wait_queue_head_t *q, unsigned int mode, int nr);
#define wake_up_all_locked(x) compat_wake_up_locked((x), TASK_NORMAL, 0)
/* This backports:
*
* commit a8203725dfded5c1f79dca3368a4a273e24b59bb
* Author: Xi Wang <xi.wang@gmail.com>
* Date: Mon Mar 5 15:14:41 2012 -0800
*
* slab: introduce kmalloc_array()
*/
/* SIZE_MAX is backported in compat-3.5.h so include it */
#include <linux/compat-3.5.h>
static inline void *kmalloc_array(size_t n, size_t size, gfp_t flags)
{
if (size != 0 && n > SIZE_MAX / size)
return NULL;
return __kmalloc(n * size, flags);
}
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))
extern const struct i2c_algorithm i2c_bit_algo;
#endif
extern int simple_open(struct inode *inode, struct file *file);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28))
#define skb_add_rx_frag(skb, i, page, off, size, truesize) \
v2_6_28_skb_add_rx_frag(skb, i, page, off, size)
#else
#define skb_add_rx_frag(skb, i, page, off, size, truesize) \
skb_add_rx_frag(skb, i, page, off, size)
#endif
#ifdef CONFIG_X86_X32_ABI
#define COMPAT_USE_64BIT_TIME \
(!!(task_pt_regs(current)->orig_ax & __X32_SYSCALL_BIT))
#else
#define COMPAT_USE_64BIT_TIME 0
#endif
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,12))
static inline void eth_hw_addr_random(struct net_device *dev)
{
#error eth_hw_addr_random() needs to be implemented for < 2.6.12
}
#else /* kernels >= 2.6.12 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
static inline void eth_hw_addr_random(struct net_device *dev)
{
get_random_bytes(dev->dev_addr, ETH_ALEN);
dev->dev_addr[0] &= 0xfe; /* clear multicast bit */
dev->dev_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
}
#else /* kernels >= 2.6.31 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
/* So this is 2.6.31..2.6.35 */
/* Just have the flags present, they won't really mean anything though */
#define NET_ADDR_PERM 0 /* address is permanent (default) */
#define NET_ADDR_RANDOM 1 /* address is generated randomly */
#define NET_ADDR_STOLEN 2 /* address is stolen from other device */
static inline void eth_hw_addr_random(struct net_device *dev)
{
random_ether_addr(dev->dev_addr);
}
#else /* 2.6.36 and on */
static inline void eth_hw_addr_random(struct net_device *dev)
{
dev_hw_addr_random(dev, dev->dev_addr);
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31)) */
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31)) */
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,12)) */
/* source include/linux/pci.h */
/**
* module_pci_driver() - Helper macro for registering a PCI driver
* @__pci_driver: pci_driver struct
*
* Helper macro for PCI drivers which do not do anything special in module
* init/exit. This eliminates a lot of boilerplate. Each module may only
* use this macro once, and calling it replaces module_init() and module_exit()
*/
#define module_pci_driver(__pci_driver) \
module_driver(__pci_driver, pci_register_driver, \
pci_unregister_driver)
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) */
#endif /* LINUX_5_4_COMPAT_H */
external/compat-wireless/include/linux/compat-3.5.h
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#ifndef LINUX_3_5_COMPAT_H
#define LINUX_3_5_COMPAT_H
#include <linux/version.h>
#include <linux/fs.h>
#include <linux/etherdevice.h>
#include <linux/net.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0))
/*
* This backports:
*
* commit f56f821feb7b36223f309e0ec05986bb137ce418
* Author: Daniel Vetter <daniel.vetter@ffwll.ch>
* Date: Sun Mar 25 19:47:41 2012 +0200
*
* mm: extend prefault helpers to fault in more than PAGE_SIZE
*
* The new functions are used by drm/i915 driver.
*
*/
static inline int fault_in_multipages_writeable(char __user *uaddr, int size)
{
int ret = 0;
char __user *end = uaddr + size - 1;
if (unlikely(size == 0))
return ret;
/*
* Writing zeroes into userspace here is OK, because we know that if
* the zero gets there, we'll be overwriting it.
*/
while (uaddr <= end) {
ret = __put_user(0, uaddr);
if (ret != 0)
return ret;
uaddr += PAGE_SIZE;
}
/* Check whether the range spilled into the next page. */
if (((unsigned long)uaddr & PAGE_MASK) ==
((unsigned long)end & PAGE_MASK))
ret = __put_user(0, end);
return ret;
}
static inline int fault_in_multipages_readable(const char __user *uaddr,
int size)
{
volatile char c;
int ret = 0;
const char __user *end = uaddr + size - 1;
if (unlikely(size == 0))
return ret;
while (uaddr <= end) {
ret = __get_user(c, uaddr);
if (ret != 0)
return ret;
uaddr += PAGE_SIZE;
}
/* Check whether the range spilled into the next page. */
if (((unsigned long)uaddr & PAGE_MASK) ==
((unsigned long)end & PAGE_MASK)) {
ret = __get_user(c, end);
(void)c;
}
return ret;
}
/* switcheroo is available on >= 2.6.34 */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))
#include <linux/vga_switcheroo.h>
/*
* This backports:
*
* From 26ec685ff9d9c16525d8ec4c97e52fcdb187b302 Mon Sep 17 00:00:00 2001
* From: Takashi Iwai <tiwai@suse.de>
* Date: Fri, 11 May 2012 07:51:17 +0200
* Subject: [PATCH] vga_switcheroo: Introduce struct vga_switcheroo_client_ops
*
*/
struct vga_switcheroo_client_ops {
void (*set_gpu_state)(struct pci_dev *dev, enum vga_switcheroo_state);
void (*reprobe)(struct pci_dev *dev);
bool (*can_switch)(struct pci_dev *dev);
};
/* Wrap around the old code and redefine vga_switcheroo_register_client()
* for older kernels < 3.5.0.
*/
static inline int compat_vga_switcheroo_register_client(struct pci_dev *dev,
const struct vga_switcheroo_client_ops *ops) {
return vga_switcheroo_register_client(dev,
ops->set_gpu_state,
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38))
ops->reprobe,
#endif
ops->can_switch);
}
#define vga_switcheroo_register_client(_dev, _ops) \
compat_vga_switcheroo_register_client(_dev, _ops)
#endif
/* This backports
*
* commit 14674e70119ea01549ce593d8901a797f8a90f74
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
* Date: Wed May 30 10:55:34 2012 +0200
*
* i2c: Split I2C_M_NOSTART support out of I2C_FUNC_PROTOCOL_MANGLING
*/
#define I2C_FUNC_NOSTART 0x00000010 /* I2C_M_NOSTART */
/*
* This backports:
*
* From a3860c1c5dd1137db23d7786d284939c5761d517 Mon Sep 17 00:00:00 2001
* From: Xi Wang <xi.wang@gmail.com>
* Date: Thu, 31 May 2012 16:26:04 -0700
* Subject: [PATCH] introduce SIZE_MAX
*/
#define SIZE_MAX (~(size_t)0)
#include <linux/pkt_sched.h>
/*
* This backports:
*
* From 76e3cc126bb223013a6b9a0e2a51238d1ef2e409 Mon Sep 17 00:00:00 2001
* From: Eric Dumazet <edumazet@google.com>
* Date: Thu, 10 May 2012 07:51:25 +0000
* Subject: [PATCH] codel: Controlled Delay AQM
*/
#ifndef TCA_CODEL_MAX
/* CODEL */
#define COMPAT_CODEL_BACKPORT
enum {
TCA_CODEL_UNSPEC,
TCA_CODEL_TARGET,
TCA_CODEL_LIMIT,
TCA_CODEL_INTERVAL,
TCA_CODEL_ECN,
__TCA_CODEL_MAX
};
#define TCA_CODEL_MAX (__TCA_CODEL_MAX - 1)
struct tc_codel_xstats {
__u32 maxpacket; /* largest packet we've seen so far */
__u32 count; /* how many drops we've done since the last time we
* entered dropping state
*/
__u32 lastcount; /* count at entry to dropping state */
__u32 ldelay; /* in-queue delay seen by most recently dequeued packet */
__s32 drop_next; /* time to drop next packet */
__u32 drop_overlimit; /* number of time max qdisc packet limit was hit */
__u32 ecn_mark; /* number of packets we ECN marked instead of dropped */
__u32 dropping; /* are we in dropping state ? */
};
/* This backports:
*
* commit 4b549a2ef4bef9965d97cbd992ba67930cd3e0fe
* Author: Eric Dumazet <edumazet@google.com>
* Date: Fri May 11 09:30:50 2012 +0000
* fq_codel: Fair Queue Codel AQM
*/
/* FQ_CODEL */
enum {
TCA_FQ_CODEL_UNSPEC,
TCA_FQ_CODEL_TARGET,
TCA_FQ_CODEL_LIMIT,
TCA_FQ_CODEL_INTERVAL,
TCA_FQ_CODEL_ECN,
TCA_FQ_CODEL_FLOWS,
TCA_FQ_CODEL_QUANTUM,
__TCA_FQ_CODEL_MAX
};
#define TCA_FQ_CODEL_MAX (__TCA_FQ_CODEL_MAX - 1)
enum {
TCA_FQ_CODEL_XSTATS_QDISC,
TCA_FQ_CODEL_XSTATS_CLASS,
};
struct tc_fq_codel_qd_stats {
__u32 maxpacket; /* largest packet we've seen so far */
__u32 drop_overlimit; /* number of time max qdisc
* packet limit was hit
*/
__u32 ecn_mark; /* number of packets we ECN marked
* instead of being dropped
*/
__u32 new_flow_count; /* number of time packets
* created a 'new flow'
*/
__u32 new_flows_len; /* count of flows in new list */
__u32 old_flows_len; /* count of flows in old list */
};
struct tc_fq_codel_cl_stats {
__s32 deficit;
__u32 ldelay; /* in-queue delay seen by most recently
* dequeued packet
*/
__u32 count;
__u32 lastcount;
__u32 dropping;
__s32 drop_next;
};
struct tc_fq_codel_xstats {
__u32 type;
union {
struct tc_fq_codel_qd_stats qdisc_stats;
struct tc_fq_codel_cl_stats class_stats;
};
};
#endif /* TCA_CODEL_MAX */
/* Backport ether_addr_equal */
static inline bool ether_addr_equal(const u8 *addr1, const u8 *addr2)
{
return !compare_ether_addr(addr1, addr2);
}
#define net_ratelimited_function(function, ...) \
do { \
if (net_ratelimit()) \
function(__VA_ARGS__); \
} while (0)
#define net_emerg_ratelimited(fmt, ...) \
net_ratelimited_function(pr_emerg, fmt, ##__VA_ARGS__)
#define net_alert_ratelimited(fmt, ...) \
net_ratelimited_function(pr_alert, fmt, ##__VA_ARGS__)
#define net_crit_ratelimited(fmt, ...) \
net_ratelimited_function(pr_crit, fmt, ##__VA_ARGS__)
#define net_err_ratelimited(fmt, ...) \
net_ratelimited_function(pr_err, fmt, ##__VA_ARGS__)
#define net_notice_ratelimited(fmt, ...) \
net_ratelimited_function(pr_notice, fmt, ##__VA_ARGS__)
#define net_warn_ratelimited(fmt, ...) \
net_ratelimited_function(pr_warn, fmt, ##__VA_ARGS__)
#define net_info_ratelimited(fmt, ...) \
net_ratelimited_function(pr_info, fmt, ##__VA_ARGS__)
#define net_dbg_ratelimited(fmt, ...) \
net_ratelimited_function(pr_debug, fmt, ##__VA_ARGS__)
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)) */
#endif /* LINUX_3_5_COMPAT_H */
external/compat-wireless/include/linux/compat-3.6.h
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#ifndef LINUX_3_6_COMPAT_H
#define LINUX_3_6_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0))
/**
* Backports
*
* commit d81a5d1956731c453b85c141458d4ff5d6cc5366
* Author: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
* Date: Tue Jul 10 19:10:06 2012 -0300
*
* USB: add USB_VENDOR_AND_INTERFACE_INFO() macro
*/
#include <linux/usb.h>
#define USB_VENDOR_AND_INTERFACE_INFO(vend, cl, sc, pr) \
.match_flags = USB_DEVICE_ID_MATCH_INT_INFO \
| USB_DEVICE_ID_MATCH_VENDOR, \
.idVendor = (vend), \
.bInterfaceClass = (cl), \
.bInterfaceSubClass = (sc), \
.bInterfaceProtocol = (pr)
/**
* Backports
*
* commit cdcac9cd7741af2c2b9255cbf060f772596907bb
* Author: Dave Airlie <airlied@redhat.com>
* Date: Wed Jun 27 08:35:52 2012 +0100
*
* pci_regs: define LNKSTA2 pcie cap + bits.
*
* We need these for detecting the max link speed for drm drivers.
*
* Acked-by: Bjorn Helgaas <bhelgass@google.com>
* Signed-off-by: Dave Airlie <airlied@redhat.com>
*/
#define PCI_EXP_LNKCAP2 44 /* Link Capability 2 */
#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x01 /* Current Link Speed 2.5GT/s */
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x02 /* Current Link Speed 5.0GT/s */
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x04 /* Current Link Speed 8.0GT/s */
#define PCI_EXP_LNKCAP2_CROSSLINK 0x100 /* Crosslink supported */
#include <net/genetlink.h>
#include <linux/etherdevice.h>
/**
* eth_broadcast_addr - Assign broadcast address
* @addr: Pointer to a six-byte array containing the Ethernet address
*
* Assign the broadcast address to the given address array.
*/
static inline void eth_broadcast_addr(u8 *addr)
{
memset(addr, 0xff, ETH_ALEN);
}
/**
* eth_random_addr - Generate software assigned random Ethernet address
* @addr: Pointer to a six-byte array containing the Ethernet address
*
* Generate a random Ethernet address (MAC) that is not multicast
* and has the local assigned bit set.
*/
static inline void eth_random_addr(u8 *addr)
{
get_random_bytes(addr, ETH_ALEN);
addr[0] &= 0xfe; /* clear multicast bit */
addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
}
#define GENLMSG_DEFAULT_SIZE (NLMSG_DEFAULT_SIZE - GENL_HDRLEN)
/*
* Backports
*
* commit 959d62fa865d2e616b61a509e1cc5b88741f065e
* Author: Shuah Khan <shuahkhan@gmail.com>
* Date: Thu Jun 14 04:34:30 2012 +0800
*
* leds: Rename led_brightness_set() to led_set_brightness()
*
* Rename leds external interface led_brightness_set() to led_set_brightness().
* This is the second phase of the change to reduce confusion between the
* leds internal and external interfaces that set brightness. With this change,
* now the external interface is led_set_brightness(). The first phase renamed
* the internal interface led_set_brightness() to __led_set_brightness().
* There are no changes to the interface implementations.
*
* Signed-off-by: Shuah Khan <shuahkhan@gmail.com>
* Signed-off-by: Bryan Wu <bryan.wu@canonical.com>
*/
#define led_set_brightness(_dev, _switch) led_brightness_set(_dev, _switch)
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) */
#endif /* LINUX_3_6_COMPAT_H */
external/compat-wireless/include/linux/compat-3.7.h
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#ifndef LINUX_3_7_COMPAT_H
#define LINUX_3_7_COMPAT_H
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0))
#include <linux/workqueue.h>
#include <linux/tty.h>
#include <linux/pci.h>
#include <linux/pci_regs.h>
#define netlink_notify_portid(__notify) (__notify->pid)
#define genl_info_snd_portid(__genl_info) (__genl_info->snd_pid)
#define NETLINK_CB_PORTID(__skb) NETLINK_CB(cb->skb).pid
bool mod_delayed_work(struct workqueue_struct *wq, struct delayed_work *dwork,
unsigned long delay);
/* Backports tty_lock: Localise the lock */
#define tty_lock(__tty) tty_lock()
#define tty_unlock(__tty) tty_unlock()
#define tty_port_register_device(port, driver, index, device) \
tty_register_device(driver, index, device)
int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val);
int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);
int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val);
int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val);
int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
u16 clear, u16 set);
int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos,
u32 clear, u32 set);
static inline int pcie_capability_set_word(struct pci_dev *dev, int pos,
u16 set)
{
return pcie_capability_clear_and_set_word(dev, pos, 0, set);
}
static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos,
u32 set)
{
return pcie_capability_clear_and_set_dword(dev, pos, 0, set);
}
static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos,
u16 clear)
{
return pcie_capability_clear_and_set_word(dev, pos, clear, 0);
}
static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos,
u32 clear)
{
return pcie_capability_clear_and_set_dword(dev, pos, clear, 0);
}
#define PCI_EXP_LNKSTA2 50 /* Link Status 2 */
#else /* (LINUX_VERSION_CODE > KERNEL_VERSION(3,7,0)) */
#define netlink_notify_portid(__notify) (__notify->portid)
#define genl_info_snd_portid(__genl_info) (__genl_info->snd_portid)
#define NETLINK_CB_PORTID(__skb) NETLINK_CB(cb->skb).portid
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)) */
#endif /* LINUX_3_7_COMPAT_H */
external/compat-wireless/include/linux/cordic.h
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/*
* Copyright (c) 2011 Broadcom Corporation
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __CORDIC_H_
#define __CORDIC_H_
#include <linux/types.h>
/**
* struct cordic_iq - i/q coordinate.
*
* @i: real part of coordinate (in phase).
* @q: imaginary part of coordinate (quadrature).
*/
struct cordic_iq {
s32 i;
s32 q;
};
/**
* cordic_calc_iq() - calculates the i/q coordinate for given angle.
*
* @theta: angle in degrees for which i/q coordinate is to be calculated.
* @coord: function output parameter holding the i/q coordinate.
*
* The function calculates the i/q coordinate for a given angle using
* cordic algorithm. The coordinate consists of a real (i) and an
* imaginary (q) part. The real part is essentially the cosine of the
* angle and the imaginary part is the sine of the angle. The returned
* values are scaled by 2^16 for precision. The range for theta is
* for -180 degrees to +180 degrees. Passed values outside this range are
* converted before doing the actual calculation.
*/
struct cordic_iq cordic_calc_iq(s32 theta);
#endif /* __CORDIC_H_ */
external/compat-wireless/include/linux/crc8.h
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/*
* Copyright (c) 2011 Broadcom Corporation
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __CRC8_H_
#define __CRC8_H_
#include <linux/types.h>
/* see usage of this value in crc8() description */
#define CRC8_INIT_VALUE 0xFF
/*
* Return value of crc8() indicating valid message+crc. This is true
* if a CRC is inverted before transmission. The CRC computed over the
* whole received bitstream is _table[x], where x is the bit pattern
* of the modification (almost always 0xff).
*/
#define CRC8_GOOD_VALUE(_table) (_table[0xFF])
/* required table size for crc8 algorithm */
#define CRC8_TABLE_SIZE 256
/* helper macro assuring right table size is used */
#define DECLARE_CRC8_TABLE(_table) \
static u8 _table[CRC8_TABLE_SIZE]
/**
* crc8_populate_lsb - fill crc table for given polynomial in regular bit order.
*
* @table: table to be filled.
* @polynomial: polynomial for which table is to be filled.
*
* This function fills the provided table according the polynomial provided for
* regular bit order (lsb first). Polynomials in CRC algorithms are typically
* represented as shown below.
*
* poly = x^8 + x^7 + x^6 + x^4 + x^2 + 1
*
* For lsb first direction x^7 maps to the lsb. So the polynomial is as below.
*
* - lsb first: poly = 10101011(1) = 0xAB
*/
void crc8_populate_lsb(u8 table[CRC8_TABLE_SIZE], u8 polynomial);
/**
* crc8_populate_msb - fill crc table for given polynomial in reverse bit order.
*
* @table: table to be filled.
* @polynomial: polynomial for which table is to be filled.
*
* This function fills the provided table according the polynomial provided for
* reverse bit order (msb first). Polynomials in CRC algorithms are typically
* represented as shown below.
*
* poly = x^8 + x^7 + x^6 + x^4 + x^2 + 1
*
* For msb first direction x^7 maps to the msb. So the polynomial is as below.
*
* - msb first: poly = (1)11010101 = 0xD5
*/
void crc8_populate_msb(u8 table[CRC8_TABLE_SIZE], u8 polynomial);
/**
* crc8() - calculate a crc8 over the given input data.
*
* @table: crc table used for calculation.
* @pdata: pointer to data buffer.
* @nbytes: number of bytes in data buffer.
* @crc: previous returned crc8 value.
*
* The CRC8 is calculated using the polynomial given in crc8_populate_msb()
* or crc8_populate_lsb().
*
* The caller provides the initial value (either %CRC8_INIT_VALUE
* or the previous returned value) to allow for processing of
* discontiguous blocks of data. When generating the CRC the
* caller is responsible for complementing the final return value
* and inserting it into the byte stream. When validating a byte
* stream (including CRC8), a final return value of %CRC8_GOOD_VALUE
* indicates the byte stream data can be considered valid.
*
* Reference:
* "A Painless Guide to CRC Error Detection Algorithms", ver 3, Aug 1993
* Williams, Ross N., ross<at>ross.net
* (see URL http://www.ross.net/crc/download/crc_v3.txt).
*/
u8 crc8(const u8 table[CRC8_TABLE_SIZE], u8 *pdata, size_t nbytes, u8 crc);
#endif /* __CRC8_H_ */
external/compat-wireless/include/linux/eeprom_93cx6.h
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/*
Copyright (C) 2004 - 2006 rt2x00 SourceForge Project
<http://rt2x00.serialmonkey.com>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the
Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/*
Module: eeprom_93cx6
Abstract: EEPROM reader datastructures for 93cx6 chipsets.
Supported chipsets: 93c46, 93c56 and 93c66.
*/
/*
* EEPROM operation defines.
*/
#define PCI_EEPROM_WIDTH_93C46 6
#define PCI_EEPROM_WIDTH_93C56 8
#define PCI_EEPROM_WIDTH_93C66 8
#define PCI_EEPROM_WIDTH_93C86 8
#define PCI_EEPROM_WIDTH_OPCODE 3
#define PCI_EEPROM_WRITE_OPCODE 0x05
#define PCI_EEPROM_ERASE_OPCODE 0x07
#define PCI_EEPROM_READ_OPCODE 0x06
#define PCI_EEPROM_EWDS_OPCODE 0x10
#define PCI_EEPROM_EWEN_OPCODE 0x13
/**
* struct eeprom_93cx6 - control structure for setting the commands
* for reading the eeprom data.
* @data: private pointer for the driver.
* @register_read(struct eeprom_93cx6 *eeprom): handler to
* read the eeprom register, this function should set all reg_* fields.
* @register_write(struct eeprom_93cx6 *eeprom): handler to
* write to the eeprom register by using all reg_* fields.
* @width: eeprom width, should be one of the PCI_EEPROM_WIDTH_* defines
* @drive_data: Set if we're driving the data line.
* @reg_data_in: register field to indicate data input
* @reg_data_out: register field to indicate data output
* @reg_data_clock: register field to set the data clock
* @reg_chip_select: register field to set the chip select
*
* This structure is used for the communication between the driver
* and the eeprom_93cx6 handlers for reading the eeprom.
*/
struct eeprom_93cx6 {
void *data;
void (*register_read)(struct eeprom_93cx6 *eeprom);
void (*register_write)(struct eeprom_93cx6 *eeprom);
int width;
char drive_data;
char reg_data_in;
char reg_data_out;
char reg_data_clock;
char reg_chip_select;
};
extern void eeprom_93cx6_read(struct eeprom_93cx6 *eeprom,
const u8 word, u16 *data);
extern void eeprom_93cx6_multiread(struct eeprom_93cx6 *eeprom,
const u8 word, __le16 *data, const u16 words);
extern void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable);
extern void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom,
u8 addr, u16 data);
external/compat-wireless/include/linux/export.h
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#ifndef _COMPAT_LINUX_EXPORT_H
#define _COMPAT_LINUX_EXPORT_H 1
#include <linux/version.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0))
#include_next <linux/export.h>
#else
#include <linux/module.h>
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) */
#endif /* _COMPAT_LINUX_EXPORT_H */
external/compat-wireless/include/linux/ieee80211.h
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external/compat-wireless/include/linux/kfifo.h
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#include <linux/version.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36))
#include_next <linux/kfifo.h>
#else
/*
* A generic kernel FIFO implementation
*
* Copyright (C) 2009/2010 Stefani Seibold <stefani@seibold.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
#ifndef _LINUX_KFIFO_H
#define _LINUX_KFIFO_H
/*
* How to porting drivers to the new generic FIFO API:
*
* - Modify the declaration of the "struct kfifo *" object into a
* in-place "struct kfifo" object
* - Init the in-place object with kfifo_alloc() or kfifo_init()
* Note: The address of the in-place "struct kfifo" object must be
* passed as the first argument to this functions
* - Replace the use of __kfifo_put into kfifo_in and __kfifo_get
* into kfifo_out
* - Replace the use of kfifo_put into kfifo_in_spinlocked and kfifo_get
* into kfifo_out_spinlocked
* Note: the spinlock pointer formerly passed to kfifo_init/kfifo_alloc
* must be passed now to the kfifo_in_spinlocked and kfifo_out_spinlocked
* as the last parameter
* - The formerly __kfifo_* functions are renamed into kfifo_*
*/
/*
* Note about locking : There is no locking required until only * one reader
* and one writer is using the fifo and no kfifo_reset() will be * called
* kfifo_reset_out() can be safely used, until it will be only called
* in the reader thread.
* For multiple writer and one reader there is only a need to lock the writer.
* And vice versa for only one writer and multiple reader there is only a need
* to lock the reader.
*/
#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/stddef.h>
#include <linux/scatterlist.h>
struct __kfifo {
unsigned int in;
unsigned int out;
unsigned int mask;
unsigned int esize;
void *data;
};
#define __STRUCT_KFIFO_COMMON(datatype, recsize, ptrtype) \
union { \
struct __kfifo kfifo; \
datatype *type; \
char (*rectype)[recsize]; \
ptrtype *ptr; \
const ptrtype *ptr_const; \
}
#define __STRUCT_KFIFO(type, size, recsize, ptrtype) \
{ \
__STRUCT_KFIFO_COMMON(type, recsize, ptrtype); \
type buf[((size < 2) || (size & (size - 1))) ? -1 : size]; \
}
#define STRUCT_KFIFO(type, size) \
struct __STRUCT_KFIFO(type, size, 0, type)
#define __STRUCT_KFIFO_PTR(type, recsize, ptrtype) \
{ \
__STRUCT_KFIFO_COMMON(type, recsize, ptrtype); \
type buf[0]; \
}
#define STRUCT_KFIFO_PTR(type) \
struct __STRUCT_KFIFO_PTR(type, 0, type)
/*
* define compatibility "struct kfifo" for dynamic allocated fifos
*/
struct kfifo __STRUCT_KFIFO_PTR(unsigned char, 0, void);
#define STRUCT_KFIFO_REC_1(size) \
struct __STRUCT_KFIFO(unsigned char, size, 1, void)
#define STRUCT_KFIFO_REC_2(size) \
struct __STRUCT_KFIFO(unsigned char, size, 2, void)
/*
* define kfifo_rec types
*/
struct kfifo_rec_ptr_1 __STRUCT_KFIFO_PTR(unsigned char, 1, void);
struct kfifo_rec_ptr_2 __STRUCT_KFIFO_PTR(unsigned char, 2, void);
/*
* helper macro to distinguish between real in place fifo where the fifo
* array is a part of the structure and the fifo type where the array is
* outside of the fifo structure.
*/
#define __is_kfifo_ptr(fifo) (sizeof(*fifo) == sizeof(struct __kfifo))
/**
* DECLARE_KFIFO_PTR - macro to declare a fifo pointer object
* @fifo: name of the declared fifo
* @type: type of the fifo elements
*/
#define DECLARE_KFIFO_PTR(fifo, type) STRUCT_KFIFO_PTR(type) fifo
/**
* DECLARE_KFIFO - macro to declare a fifo object
* @fifo: name of the declared fifo
* @type: type of the fifo elements
* @size: the number of elements in the fifo, this must be a power of 2
*/
#define DECLARE_KFIFO(fifo, type, size) STRUCT_KFIFO(type, size) fifo
/**
* INIT_KFIFO - Initialize a fifo declared by DECLARE_KFIFO
* @fifo: name of the declared fifo datatype
*/
#define INIT_KFIFO(fifo) \
(void)({ \
typeof(&(fifo)) __tmp = &(fifo); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
__kfifo->in = 0; \
__kfifo->out = 0; \
__kfifo->mask = __is_kfifo_ptr(__tmp) ? 0 : ARRAY_SIZE(__tmp->buf) - 1;\
__kfifo->esize = sizeof(*__tmp->buf); \
__kfifo->data = __is_kfifo_ptr(__tmp) ? NULL : __tmp->buf; \
})
/**
* DEFINE_KFIFO - macro to define and initialize a fifo
* @fifo: name of the declared fifo datatype
* @type: type of the fifo elements
* @size: the number of elements in the fifo, this must be a power of 2
*
* Note: the macro can be used for global and local fifo data type variables.
*/
#define DEFINE_KFIFO(fifo, type, size) \
DECLARE_KFIFO(fifo, type, size) = \
(typeof(fifo)) { \
{ \
{ \
.in = 0, \
.out = 0, \
.mask = __is_kfifo_ptr(&(fifo)) ? \
0 : \
ARRAY_SIZE((fifo).buf) - 1, \
.esize = sizeof(*(fifo).buf), \
.data = __is_kfifo_ptr(&(fifo)) ? \
NULL : \
(fifo).buf, \
} \
} \
}
static inline unsigned int __must_check
__kfifo_uint_must_check_helper(unsigned int val)
{
return val;
}
static inline int __must_check
__kfifo_int_must_check_helper(int val)
{
return val;
}
/**
* kfifo_initialized - Check if the fifo is initialized
* @fifo: address of the fifo to check
*
* Return %true if fifo is initialized, otherwise %false.
* Assumes the fifo was 0 before.
*/
#define kfifo_initialized(fifo) ((fifo)->kfifo.mask)
/**
* kfifo_esize - returns the size of the element managed by the fifo
* @fifo: address of the fifo to be used
*/
#define kfifo_esize(fifo) ((fifo)->kfifo.esize)
/**
* kfifo_recsize - returns the size of the record length field
* @fifo: address of the fifo to be used
*/
#define kfifo_recsize(fifo) (sizeof(*(fifo)->rectype))
/**
* kfifo_size - returns the size of the fifo in elements
* @fifo: address of the fifo to be used
*/
#define kfifo_size(fifo) ((fifo)->kfifo.mask + 1)
/**
* kfifo_reset - removes the entire fifo content
* @fifo: address of the fifo to be used
*
* Note: usage of kfifo_reset() is dangerous. It should be only called when the
* fifo is exclusived locked or when it is secured that no other thread is
* accessing the fifo.
*/
#define kfifo_reset(fifo) \
(void)({ \
typeof((fifo) + 1) __tmp = (fifo); \
__tmp->kfifo.in = __tmp->kfifo.out = 0; \
})
/**
* kfifo_reset_out - skip fifo content
* @fifo: address of the fifo to be used
*
* Note: The usage of kfifo_reset_out() is safe until it will be only called
* from the reader thread and there is only one concurrent reader. Otherwise
* it is dangerous and must be handled in the same way as kfifo_reset().
*/
#define kfifo_reset_out(fifo) \
(void)({ \
typeof((fifo) + 1) __tmp = (fifo); \
__tmp->kfifo.out = __tmp->kfifo.in; \
})
/**
* kfifo_len - returns the number of used elements in the fifo
* @fifo: address of the fifo to be used
*/
#define kfifo_len(fifo) \
({ \
typeof((fifo) + 1) __tmpl = (fifo); \
__tmpl->kfifo.in - __tmpl->kfifo.out; \
})
/**
* kfifo_is_empty - returns true if the fifo is empty
* @fifo: address of the fifo to be used
*/
#define kfifo_is_empty(fifo) \
({ \
typeof((fifo) + 1) __tmpq = (fifo); \
__tmpq->kfifo.in == __tmpq->kfifo.out; \
})
/**
* kfifo_is_full - returns true if the fifo is full
* @fifo: address of the fifo to be used
*/
#define kfifo_is_full(fifo) \
({ \
typeof((fifo) + 1) __tmpq = (fifo); \
kfifo_len(__tmpq) > __tmpq->kfifo.mask; \
})
/**
* kfifo_avail - returns the number of unused elements in the fifo
* @fifo: address of the fifo to be used
*/
#define kfifo_avail(fifo) \
__kfifo_uint_must_check_helper( \
({ \
typeof((fifo) + 1) __tmpq = (fifo); \
const size_t __recsize = sizeof(*__tmpq->rectype); \
unsigned int __avail = kfifo_size(__tmpq) - kfifo_len(__tmpq); \
(__recsize) ? ((__avail <= __recsize) ? 0 : \
__kfifo_max_r(__avail - __recsize, __recsize)) : \
__avail; \
}) \
)
/**
* kfifo_skip - skip output data
* @fifo: address of the fifo to be used
*/
#define kfifo_skip(fifo) \
(void)({ \
typeof((fifo) + 1) __tmp = (fifo); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
if (__recsize) \
__kfifo_skip_r(__kfifo, __recsize); \
else \
__kfifo->out++; \
})
/**
* kfifo_peek_len - gets the size of the next fifo record
* @fifo: address of the fifo to be used
*
* This function returns the size of the next fifo record in number of bytes.
*/
#define kfifo_peek_len(fifo) \
__kfifo_uint_must_check_helper( \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
(!__recsize) ? kfifo_len(__tmp) * sizeof(*__tmp->type) : \
__kfifo_len_r(__kfifo, __recsize); \
}) \
)
/**
* kfifo_alloc - dynamically allocates a new fifo buffer
* @fifo: pointer to the fifo
* @size: the number of elements in the fifo, this must be a power of 2
* @gfp_mask: get_free_pages mask, passed to kmalloc()
*
* This macro dynamically allocates a new fifo buffer.
*
* The numer of elements will be rounded-up to a power of 2.
* The fifo will be release with kfifo_free().
* Return 0 if no error, otherwise an error code.
*/
#define kfifo_alloc(fifo, size, gfp_mask) \
__kfifo_int_must_check_helper( \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
__is_kfifo_ptr(__tmp) ? \
__kfifo_alloc(__kfifo, size, sizeof(*__tmp->type), gfp_mask) : \
-EINVAL; \
}) \
)
/**
* kfifo_free - frees the fifo
* @fifo: the fifo to be freed
*/
#define kfifo_free(fifo) \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
if (__is_kfifo_ptr(__tmp)) \
__kfifo_free(__kfifo); \
})
/**
* kfifo_init - initialize a fifo using a preallocated buffer
* @fifo: the fifo to assign the buffer
* @buffer: the preallocated buffer to be used
* @size: the size of the internal buffer, this have to be a power of 2
*
* This macro initialize a fifo using a preallocated buffer.
*
* The numer of elements will be rounded-up to a power of 2.
* Return 0 if no error, otherwise an error code.
*/
#define kfifo_init(fifo, buffer, size) \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
__is_kfifo_ptr(__tmp) ? \
__kfifo_init(__kfifo, buffer, size, sizeof(*__tmp->type)) : \
-EINVAL; \
})
/**
* kfifo_put - put data into the fifo
* @fifo: address of the fifo to be used
* @val: the data to be added
*
* This macro copies the given value into the fifo.
* It returns 0 if the fifo was full. Otherwise it returns the number
* processed elements.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macro.
*/
#define kfifo_put(fifo, val) \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
typeof((val) + 1) __val = (val); \
unsigned int __ret; \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
if (0) { \
typeof(__tmp->ptr_const) __dummy __attribute__ ((unused)); \
__dummy = (typeof(__val))NULL; \
} \
if (__recsize) \
__ret = __kfifo_in_r(__kfifo, __val, sizeof(*__val), \
__recsize); \
else { \
__ret = !kfifo_is_full(__tmp); \
if (__ret) { \
(__is_kfifo_ptr(__tmp) ? \
((typeof(__tmp->type))__kfifo->data) : \
(__tmp->buf) \
)[__kfifo->in & __tmp->kfifo.mask] = \
*(typeof(__tmp->type))__val; \
smp_wmb(); \
__kfifo->in++; \
} \
} \
__ret; \
})
/**
* kfifo_get - get data from the fifo
* @fifo: address of the fifo to be used
* @val: the var where to store the data to be added
*
* This macro reads the data from the fifo.
* It returns 0 if the fifo was empty. Otherwise it returns the number
* processed elements.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macro.
*/
#define kfifo_get(fifo, val) \
__kfifo_uint_must_check_helper( \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
typeof((val) + 1) __val = (val); \
unsigned int __ret; \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
if (0) \
__val = (typeof(__tmp->ptr))0; \
if (__recsize) \
__ret = __kfifo_out_r(__kfifo, __val, sizeof(*__val), \
__recsize); \
else { \
__ret = !kfifo_is_empty(__tmp); \
if (__ret) { \
*(typeof(__tmp->type))__val = \
(__is_kfifo_ptr(__tmp) ? \
((typeof(__tmp->type))__kfifo->data) : \
(__tmp->buf) \
)[__kfifo->out & __tmp->kfifo.mask]; \
smp_wmb(); \
__kfifo->out++; \
} \
} \
__ret; \
}) \
)
/**
* kfifo_peek - get data from the fifo without removing
* @fifo: address of the fifo to be used
* @val: the var where to store the data to be added
*
* This reads the data from the fifo without removing it from the fifo.
* It returns 0 if the fifo was empty. Otherwise it returns the number
* processed elements.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macro.
*/
#define kfifo_peek(fifo, val) \
__kfifo_uint_must_check_helper( \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
typeof((val) + 1) __val = (val); \
unsigned int __ret; \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
if (0) \
__val = (typeof(__tmp->ptr))NULL; \
if (__recsize) \
__ret = __kfifo_out_peek_r(__kfifo, __val, sizeof(*__val), \
__recsize); \
else { \
__ret = !kfifo_is_empty(__tmp); \
if (__ret) { \
*(typeof(__tmp->type))__val = \
(__is_kfifo_ptr(__tmp) ? \
((typeof(__tmp->type))__kfifo->data) : \
(__tmp->buf) \
)[__kfifo->out & __tmp->kfifo.mask]; \
smp_wmb(); \
} \
} \
__ret; \
}) \
)
/**
* kfifo_in - put data into the fifo
* @fifo: address of the fifo to be used
* @buf: the data to be added
* @n: number of elements to be added
*
* This macro copies the given buffer into the fifo and returns the
* number of copied elements.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macro.
*/
#define kfifo_in(fifo, buf, n) \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
typeof((buf) + 1) __buf = (buf); \
unsigned long __n = (n); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
if (0) { \
typeof(__tmp->ptr_const) __dummy __attribute__ ((unused)); \
__dummy = (typeof(__buf))NULL; \
} \
(__recsize) ?\
__kfifo_in_r(__kfifo, __buf, __n, __recsize) : \
__kfifo_in(__kfifo, __buf, __n); \
})
/**
* kfifo_in_spinlocked - put data into the fifo using a spinlock for locking
* @fifo: address of the fifo to be used
* @buf: the data to be added
* @n: number of elements to be added
* @lock: pointer to the spinlock to use for locking
*
* This macro copies the given values buffer into the fifo and returns the
* number of copied elements.
*/
#define kfifo_in_spinlocked(fifo, buf, n, lock) \
({ \
unsigned long __flags; \
unsigned int __ret; \
spin_lock_irqsave(lock, __flags); \
__ret = kfifo_in(fifo, buf, n); \
spin_unlock_irqrestore(lock, __flags); \
__ret; \
})
/* alias for kfifo_in_spinlocked, will be removed in a future release */
#define kfifo_in_locked(fifo, buf, n, lock) \
kfifo_in_spinlocked(fifo, buf, n, lock)
/**
* kfifo_out - get data from the fifo
* @fifo: address of the fifo to be used
* @buf: pointer to the storage buffer
* @n: max. number of elements to get
*
* This macro get some data from the fifo and return the numbers of elements
* copied.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macro.
*/
#define kfifo_out(fifo, buf, n) \
__kfifo_uint_must_check_helper( \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
typeof((buf) + 1) __buf = (buf); \
unsigned long __n = (n); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
if (0) { \
typeof(__tmp->ptr) __dummy = NULL; \
__buf = __dummy; \
} \
(__recsize) ?\
__kfifo_out_r(__kfifo, __buf, __n, __recsize) : \
__kfifo_out(__kfifo, __buf, __n); \
}) \
)
/**
* kfifo_out_spinlocked - get data from the fifo using a spinlock for locking
* @fifo: address of the fifo to be used
* @buf: pointer to the storage buffer
* @n: max. number of elements to get
* @lock: pointer to the spinlock to use for locking
*
* This macro get the data from the fifo and return the numbers of elements
* copied.
*/
#define kfifo_out_spinlocked(fifo, buf, n, lock) \
__kfifo_uint_must_check_helper( \
({ \
unsigned long __flags; \
unsigned int __ret; \
spin_lock_irqsave(lock, __flags); \
__ret = kfifo_out(fifo, buf, n); \
spin_unlock_irqrestore(lock, __flags); \
__ret; \
}) \
)
/* alias for kfifo_out_spinlocked, will be removed in a future release */
#define kfifo_out_locked(fifo, buf, n, lock) \
kfifo_out_spinlocked(fifo, buf, n, lock)
/**
* kfifo_from_user - puts some data from user space into the fifo
* @fifo: address of the fifo to be used
* @from: pointer to the data to be added
* @len: the length of the data to be added
* @copied: pointer to output variable to store the number of copied bytes
*
* This macro copies at most @len bytes from the @from into the
* fifo, depending of the available space and returns -EFAULT/0.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macro.
*/
#define kfifo_from_user(fifo, from, len, copied) \
__kfifo_uint_must_check_helper( \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
const void __user *__from = (from); \
unsigned int __len = (len); \
unsigned int *__copied = (copied); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
(__recsize) ? \
__kfifo_from_user_r(__kfifo, __from, __len, __copied, __recsize) : \
__kfifo_from_user(__kfifo, __from, __len, __copied); \
}) \
)
/**
* kfifo_to_user - copies data from the fifo into user space
* @fifo: address of the fifo to be used
* @to: where the data must be copied
* @len: the size of the destination buffer
* @copied: pointer to output variable to store the number of copied bytes
*
* This macro copies at most @len bytes from the fifo into the
* @to buffer and returns -EFAULT/0.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macro.
*/
#define kfifo_to_user(fifo, to, len, copied) \
__kfifo_uint_must_check_helper( \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
void __user *__to = (to); \
unsigned int __len = (len); \
unsigned int *__copied = (copied); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
(__recsize) ? \
__kfifo_to_user_r(__kfifo, __to, __len, __copied, __recsize) : \
__kfifo_to_user(__kfifo, __to, __len, __copied); \
}) \
)
/**
* kfifo_dma_in_prepare - setup a scatterlist for DMA input
* @fifo: address of the fifo to be used
* @sgl: pointer to the scatterlist array
* @nents: number of entries in the scatterlist array
* @len: number of elements to transfer
*
* This macro fills a scatterlist for DMA input.
* It returns the number entries in the scatterlist array.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macros.
*/
#define kfifo_dma_in_prepare(fifo, sgl, nents, len) \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
struct scatterlist *__sgl = (sgl); \
int __nents = (nents); \
unsigned int __len = (len); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
(__recsize) ? \
__kfifo_dma_in_prepare_r(__kfifo, __sgl, __nents, __len, __recsize) : \
__kfifo_dma_in_prepare(__kfifo, __sgl, __nents, __len); \
})
/**
* kfifo_dma_in_finish - finish a DMA IN operation
* @fifo: address of the fifo to be used
* @len: number of bytes to received
*
* This macro finish a DMA IN operation. The in counter will be updated by
* the len parameter. No error checking will be done.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macros.
*/
#define kfifo_dma_in_finish(fifo, len) \
(void)({ \
typeof((fifo) + 1) __tmp = (fifo); \
unsigned int __len = (len); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
if (__recsize) \
__kfifo_dma_in_finish_r(__kfifo, __len, __recsize); \
else \
__kfifo->in += __len / sizeof(*__tmp->type); \
})
/**
* kfifo_dma_out_prepare - setup a scatterlist for DMA output
* @fifo: address of the fifo to be used
* @sgl: pointer to the scatterlist array
* @nents: number of entries in the scatterlist array
* @len: number of elements to transfer
*
* This macro fills a scatterlist for DMA output which at most @len bytes
* to transfer.
* It returns the number entries in the scatterlist array.
* A zero means there is no space available and the scatterlist is not filled.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macros.
*/
#define kfifo_dma_out_prepare(fifo, sgl, nents, len) \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
struct scatterlist *__sgl = (sgl); \
int __nents = (nents); \
unsigned int __len = (len); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
(__recsize) ? \
__kfifo_dma_out_prepare_r(__kfifo, __sgl, __nents, __len, __recsize) : \
__kfifo_dma_out_prepare(__kfifo, __sgl, __nents, __len); \
})
/**
* kfifo_dma_out_finish - finish a DMA OUT operation
* @fifo: address of the fifo to be used
* @len: number of bytes transferd
*
* This macro finish a DMA OUT operation. The out counter will be updated by
* the len parameter. No error checking will be done.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macros.
*/
#define kfifo_dma_out_finish(fifo, len) \
(void)({ \
typeof((fifo) + 1) __tmp = (fifo); \
unsigned int __len = (len); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
if (__recsize) \
__kfifo_dma_out_finish_r(__kfifo, __recsize); \
else \
__kfifo->out += __len / sizeof(*__tmp->type); \
})
/**
* kfifo_out_peek - gets some data from the fifo
* @fifo: address of the fifo to be used
* @buf: pointer to the storage buffer
* @n: max. number of elements to get
*
* This macro get the data from the fifo and return the numbers of elements
* copied. The data is not removed from the fifo.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these macro.
*/
#define kfifo_out_peek(fifo, buf, n) \
__kfifo_uint_must_check_helper( \
({ \
typeof((fifo) + 1) __tmp = (fifo); \
typeof((buf) + 1) __buf = (buf); \
unsigned long __n = (n); \
const size_t __recsize = sizeof(*__tmp->rectype); \
struct __kfifo *__kfifo = &__tmp->kfifo; \
if (0) { \
typeof(__tmp->ptr) __dummy __attribute__ ((unused)) = NULL; \
__buf = __dummy; \
} \
(__recsize) ? \
__kfifo_out_peek_r(__kfifo, __buf, __n, __recsize) : \
__kfifo_out_peek(__kfifo, __buf, __n); \
}) \
)
extern int __kfifo_alloc(struct __kfifo *fifo, unsigned int size,
size_t esize, gfp_t gfp_mask);
extern void __kfifo_free(struct __kfifo *fifo);
extern int __kfifo_init(struct __kfifo *fifo, void *buffer,
unsigned int size, size_t esize);
extern unsigned int __kfifo_in(struct __kfifo *fifo,
const void *buf, unsigned int len);
extern unsigned int __kfifo_out(struct __kfifo *fifo,
void *buf, unsigned int len);
extern int __kfifo_from_user(struct __kfifo *fifo,
const void __user *from, unsigned long len, unsigned int *copied);
extern int __kfifo_to_user(struct __kfifo *fifo,
void __user *to, unsigned long len, unsigned int *copied);
extern unsigned int __kfifo_dma_in_prepare(struct __kfifo *fifo,
struct scatterlist *sgl, int nents, unsigned int len);
extern unsigned int __kfifo_dma_out_prepare(struct __kfifo *fifo,
struct scatterlist *sgl, int nents, unsigned int len);
extern unsigned int __kfifo_out_peek(struct __kfifo *fifo,
void *buf, unsigned int len);
extern unsigned int __kfifo_in_r(struct __kfifo *fifo,
const void *buf, unsigned int len, size_t recsize);
extern unsigned int __kfifo_out_r(struct __kfifo *fifo,
void *buf, unsigned int len, size_t recsize);
extern int __kfifo_from_user_r(struct __kfifo *fifo,
const void __user *from, unsigned long len, unsigned int *copied,
size_t recsize);
extern int __kfifo_to_user_r(struct __kfifo *fifo, void __user *to,
unsigned long len, unsigned int *copied, size_t recsize);
extern unsigned int __kfifo_dma_in_prepare_r(struct __kfifo *fifo,
struct scatterlist *sgl, int nents, unsigned int len, size_t recsize);
extern void __kfifo_dma_in_finish_r(struct __kfifo *fifo,
unsigned int len, size_t recsize);
extern unsigned int __kfifo_dma_out_prepare_r(struct __kfifo *fifo,
struct scatterlist *sgl, int nents, unsigned int len, size_t recsize);
extern void __kfifo_dma_out_finish_r(struct __kfifo *fifo, size_t recsize);
extern unsigned int __kfifo_len_r(struct __kfifo *fifo, size_t recsize);
extern void __kfifo_skip_r(struct __kfifo *fifo, size_t recsize);
extern unsigned int __kfifo_out_peek_r(struct __kfifo *fifo,
void *buf, unsigned int len, size_t recsize);
extern unsigned int __kfifo_max_r(unsigned int len, size_t recsize);
#endif
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) */
external/compat-wireless/include/linux/math64.h
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#ifndef _COMPAT_LINUX_MATH64_H
#define _COMPAT_LINUX_MATH64_H 1
#include <linux/version.h>
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25))
#include_next <linux/math64.h>
#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)) */
#endif /* _COMPAT_LINUX_MATH64_H */
external/compat-wireless/include/linux/nl80211.h
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+3064
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external/compat-wireless/include/linux/of.h
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+16
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@@ -0,0 +1,16 @@
#ifndef _COMPAT_LINUX_OF_H
#define _COMPAT_LINUX_OF_H 1
#include <linux/version.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))
#include_next <linux/of.h>
#else
#ifdef CONFIG_OF
#include_next <linux/of.h>
#endif /* CONFIG_OF */
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)) */
#endif /* _COMPAT_LINUX_OF_H */
external/compat-wireless/include/linux/pci-aspm.h
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#include <linux/version.h>
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25))
#include_next <linux/pci-aspm.h>
#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)) */
external/compat-wireless/include/linux/pci_ids.h
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+2908
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external/compat-wireless/include/linux/pm_qos.h
Vendored
+12
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@@ -0,0 +1,12 @@
#ifndef _COMPAT_LINUX_PM_QOS_H
#define _COMPAT_LINUX_PM_QOS_H 1
#include <linux/version.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0))
#include_next <linux/pm_qos.h>
#else
#include <linux/pm_qos_params.h>
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) */
#endif /* _COMPAT_LINUX_PM_QOS_H */
external/compat-wireless/include/linux/pm_qos_params.h
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+36
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@@ -0,0 +1,36 @@
#include <linux/version.h>
#ifndef __COMPAT_LINUX_PM_QOS_PARAMS_H
#define __COMPAT_LINUX_PM_QOS_PARAMS_H
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25))
#include_next <linux/pm_qos_params.h>
#else
/* interface for the pm_qos_power infrastructure of the linux kernel.
*
* Mark Gross <mgross@linux.intel.com>
*/
#include <linux/list.h>
#include <linux/notifier.h>
#include <linux/miscdevice.h>
#define PM_QOS_RESERVED 0
#define PM_QOS_CPU_DMA_LATENCY 1
#define PM_QOS_NETWORK_LATENCY 2
#define PM_QOS_NETWORK_THROUGHPUT 3
#define PM_QOS_SYSTEM_BUS_FREQ 4
#define PM_QOS_NUM_CLASSES 5
#define PM_QOS_DEFAULT_VALUE -1
int pm_qos_add_requirement(int qos, char *name, s32 value);
int pm_qos_update_requirement(int qos, char *name, s32 new_value);
void pm_qos_remove_requirement(int qos, char *name);
int pm_qos_requirement(int qos);
int pm_qos_add_notifier(int qos, struct notifier_block *notifier);
int pm_qos_remove_notifier(int qos, struct notifier_block *notifier);
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)) */
#endif
external/compat-wireless/include/linux/pm_runtime.h
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+14
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#include <linux/version.h>
#ifndef __COMPAT_LINUX_PM_RUNTIME_H
#define __COMPAT_LINUX_PM_RUNTIME_H
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
#include_next <linux/pm_runtime.h>
#else
static inline void pm_runtime_enable(struct device *dev) {}
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)) */
#endif
external/compat-wireless/include/linux/printk.h
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+12
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#ifndef _COMPAT_LINUX_PRINTK_H
#define _COMPAT_LINUX_PRINTK_H 1
#include <linux/version.h>
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,36))
#include_next <linux/printk.h>
#else
#include <linux/kernel.h>
#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,35)) */
#endif /* _COMPAT_LINUX_PRINTK_H */
external/compat-wireless/include/linux/rfkill.h
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#ifndef __COMPAT_RFKILL_H
#define __COMPAT_RFKILL_H
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31))
#include_next <linux/rfkill.h>
#else
#include <linux/compat-2.6.h>
#undef CONFIG_RFKILL
#undef CONFIG_RFKILL_INPUT
#undef CONFIG_RFKILL_LEDS
#ifdef CONFIG_RFKILL_BACKPORT
#define CONFIG_RFKILL 1
#endif
#ifdef CONFIG_RFKILL_BACKPORT_INPUT
#define CONFIG_RFKILL_INPUT
#endif
#ifdef CONFIG_RFKILL_BACKPORT_LEDS
#define CONFIG_RFKILL_LEDS
#endif
#include <linux/rfkill_backport.h>
#endif
#endif
external/compat-wireless/include/linux/rfkill_backport.h
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#ifndef __RFKILL_H
#define __RFKILL_H
/*
* Copyright (C) 2006 - 2007 Ivo van Doorn
* Copyright (C) 2007 Dmitry Torokhov
* Copyright 2009 Johannes Berg <johannes@sipsolutions.net>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <linux/types.h>
/* define userspace visible states */
#define RFKILL_STATE_SOFT_BLOCKED 0
#define RFKILL_STATE_UNBLOCKED 1
#define RFKILL_STATE_HARD_BLOCKED 2
/**
* enum rfkill_type - type of rfkill switch.
*
* @RFKILL_TYPE_ALL: toggles all switches (requests only - not a switch type)
* @RFKILL_TYPE_WLAN: switch is on a 802.11 wireless network device.
* @RFKILL_TYPE_BLUETOOTH: switch is on a bluetooth device.
* @RFKILL_TYPE_UWB: switch is on a ultra wideband device.
* @RFKILL_TYPE_WIMAX: switch is on a WiMAX device.
* @RFKILL_TYPE_WWAN: switch is on a wireless WAN device.
* @RFKILL_TYPE_GPS: switch is on a GPS device.
* @RFKILL_TYPE_FM: switch is on a FM radio device.
* @NUM_RFKILL_TYPES: number of defined rfkill types
*/
enum rfkill_type {
RFKILL_TYPE_ALL = 0,
RFKILL_TYPE_WLAN,
RFKILL_TYPE_BLUETOOTH,
RFKILL_TYPE_UWB,
RFKILL_TYPE_WIMAX,
RFKILL_TYPE_WWAN,
RFKILL_TYPE_GPS,
RFKILL_TYPE_FM,
NUM_RFKILL_TYPES,
};
/**
* enum rfkill_operation - operation types
* @RFKILL_OP_ADD: a device was added
* @RFKILL_OP_DEL: a device was removed
* @RFKILL_OP_CHANGE: a device's state changed -- userspace changes one device
* @RFKILL_OP_CHANGE_ALL: userspace changes all devices (of a type, or all)
*/
enum rfkill_operation {
RFKILL_OP_ADD = 0,
RFKILL_OP_DEL,
RFKILL_OP_CHANGE,
RFKILL_OP_CHANGE_ALL,
};
/**
* struct rfkill_event - events for userspace on /dev/rfkill
* @idx: index of dev rfkill
* @type: type of the rfkill struct
* @op: operation code
* @hard: hard state (0/1)
* @soft: soft state (0/1)
*
* Structure used for userspace communication on /dev/rfkill,
* used for events from the kernel and control to the kernel.
*/
struct rfkill_event {
__u32 idx;
__u8 type;
__u8 op;
__u8 soft, hard;
} __attribute__((packed));
/*
* We are planning to be backward and forward compatible with changes
* to the event struct, by adding new, optional, members at the end.
* When reading an event (whether the kernel from userspace or vice
* versa) we need to accept anything that's at least as large as the
* version 1 event size, but might be able to accept other sizes in
* the future.
*
* One exception is the kernel -- we already have two event sizes in
* that we've made the 'hard' member optional since our only option
* is to ignore it anyway.
*/
#define RFKILL_EVENT_SIZE_V1 8
/* ioctl for turning off rfkill-input (if present) */
#define RFKILL_IOC_MAGIC 'R'
#define RFKILL_IOC_NOINPUT 1
#define RFKILL_IOCTL_NOINPUT _IO(RFKILL_IOC_MAGIC, RFKILL_IOC_NOINPUT)
/* and that's all userspace gets */
#ifdef __KERNEL__
/* don't allow anyone to use these in the kernel */
enum rfkill_user_states {
RFKILL_USER_STATE_SOFT_BLOCKED = RFKILL_STATE_SOFT_BLOCKED,
RFKILL_USER_STATE_UNBLOCKED = RFKILL_STATE_UNBLOCKED,
RFKILL_USER_STATE_HARD_BLOCKED = RFKILL_STATE_HARD_BLOCKED,
};
#undef RFKILL_STATE_SOFT_BLOCKED
#undef RFKILL_STATE_UNBLOCKED
#undef RFKILL_STATE_HARD_BLOCKED
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/leds.h>
#include <linux/err.h>
struct device;
/* this is opaque */
struct rfkill;
/**
* struct rfkill_ops - rfkill driver methods
*
* @poll: poll the rfkill block state(s) -- only assign this method
* when you need polling. When called, simply call one of the
* rfkill_set{,_hw,_sw}_state family of functions. If the hw
* is getting unblocked you need to take into account the return
* value of those functions to make sure the software block is
* properly used.
* @query: query the rfkill block state(s) and call exactly one of the
* rfkill_set{,_hw,_sw}_state family of functions. Assign this
* method if input events can cause hardware state changes to make
* the rfkill core query your driver before setting a requested
* block.
* @set_block: turn the transmitter on (blocked == false) or off
* (blocked == true) -- ignore and return 0 when hard blocked.
* This callback must be assigned.
*/
struct rfkill_ops {
void (*poll)(struct rfkill *rfkill, void *data);
void (*query)(struct rfkill *rfkill, void *data);
int (*set_block)(void *data, bool blocked);
};
#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
/**
* rfkill_alloc - allocate rfkill structure
* @name: name of the struct -- the string is not copied internally
* @parent: device that has rf switch on it
* @type: type of the switch (RFKILL_TYPE_*)
* @ops: rfkill methods
* @ops_data: data passed to each method
*
* This function should be called by the transmitter driver to allocate an
* rfkill structure. Returns %NULL on failure.
*/
struct rfkill * __must_check rfkill_alloc(const char *name,
struct device *parent,
const enum rfkill_type type,
const struct rfkill_ops *ops,
void *ops_data);
/**
* rfkill_register - Register a rfkill structure.
* @rfkill: rfkill structure to be registered
*
* This function should be called by the transmitter driver to register
* the rfkill structure. Before calling this function the driver needs
* to be ready to service method calls from rfkill.
*
* If rfkill_init_sw_state() is not called before registration,
* set_block() will be called to initialize the software blocked state
* to a default value.
*
* If the hardware blocked state is not set before registration,
* it is assumed to be unblocked.
*/
int __must_check rfkill_register(struct rfkill *rfkill);
/**
* rfkill_pause_polling(struct rfkill *rfkill)
*
* Pause polling -- say transmitter is off for other reasons.
* NOTE: not necessary for suspend/resume -- in that case the
* core stops polling anyway
*/
void rfkill_pause_polling(struct rfkill *rfkill);
/**
* rfkill_resume_polling(struct rfkill *rfkill)
*
* Pause polling -- say transmitter is off for other reasons.
* NOTE: not necessary for suspend/resume -- in that case the
* core stops polling anyway
*/
void rfkill_resume_polling(struct rfkill *rfkill);
/**
* rfkill_unregister - Unregister a rfkill structure.
* @rfkill: rfkill structure to be unregistered
*
* This function should be called by the network driver during device
* teardown to destroy rfkill structure. Until it returns, the driver
* needs to be able to service method calls.
*/
void rfkill_unregister(struct rfkill *rfkill);
/**
* rfkill_destroy - free rfkill structure
* @rfkill: rfkill structure to be destroyed
*
* Destroys the rfkill structure.
*/
void rfkill_destroy(struct rfkill *rfkill);
/**
* rfkill_set_hw_state - Set the internal rfkill hardware block state
* @rfkill: pointer to the rfkill class to modify.
* @state: the current hardware block state to set
*
* rfkill drivers that get events when the hard-blocked state changes
* use this function to notify the rfkill core (and through that also
* userspace) of the current state. They should also use this after
* resume if the state could have changed.
*
* You need not (but may) call this function if poll_state is assigned.
*
* This function can be called in any context, even from within rfkill
* callbacks.
*
* The function returns the combined block state (true if transmitter
* should be blocked) so that drivers need not keep track of the soft
* block state -- which they might not be able to.
*/
bool rfkill_set_hw_state(struct rfkill *rfkill, bool blocked);
/**
* rfkill_set_sw_state - Set the internal rfkill software block state
* @rfkill: pointer to the rfkill class to modify.
* @state: the current software block state to set
*
* rfkill drivers that get events when the soft-blocked state changes
* (yes, some platforms directly act on input but allow changing again)
* use this function to notify the rfkill core (and through that also
* userspace) of the current state.
*
* Drivers should also call this function after resume if the state has
* been changed by the user. This only makes sense for "persistent"
* devices (see rfkill_init_sw_state()).
*
* This function can be called in any context, even from within rfkill
* callbacks.
*
* The function returns the combined block state (true if transmitter
* should be blocked).
*/
bool rfkill_set_sw_state(struct rfkill *rfkill, bool blocked);
/**
* rfkill_init_sw_state - Initialize persistent software block state
* @rfkill: pointer to the rfkill class to modify.
* @state: the current software block state to set
*
* rfkill drivers that preserve their software block state over power off
* use this function to notify the rfkill core (and through that also
* userspace) of their initial state. It should only be used before
* registration.
*
* In addition, it marks the device as "persistent", an attribute which
* can be read by userspace. Persistent devices are expected to preserve
* their own state when suspended.
*/
void rfkill_init_sw_state(struct rfkill *rfkill, bool blocked);
/**
* rfkill_set_states - Set the internal rfkill block states
* @rfkill: pointer to the rfkill class to modify.
* @sw: the current software block state to set
* @hw: the current hardware block state to set
*
* This function can be called in any context, even from within rfkill
* callbacks.
*/
void rfkill_set_states(struct rfkill *rfkill, bool sw, bool hw);
/**
* rfkill_blocked - query rfkill block
*
* @rfkill: rfkill struct to query
*/
bool rfkill_blocked(struct rfkill *rfkill);
#else /* !RFKILL */
static inline struct rfkill * __must_check
rfkill_alloc(const char *name,
struct device *parent,
const enum rfkill_type type,
const struct rfkill_ops *ops,
void *ops_data)
{
return ERR_PTR(-ENODEV);
}
static inline int __must_check rfkill_register(struct rfkill *rfkill)
{
if (rfkill == ERR_PTR(-ENODEV))
return 0;
return -EINVAL;
}
static inline void rfkill_pause_polling(struct rfkill *rfkill)
{
}
static inline void rfkill_resume_polling(struct rfkill *rfkill)
{
}
static inline void rfkill_unregister(struct rfkill *rfkill)
{
}
static inline void rfkill_destroy(struct rfkill *rfkill)
{
}
static inline bool rfkill_set_hw_state(struct rfkill *rfkill, bool blocked)
{
return blocked;
}
static inline bool rfkill_set_sw_state(struct rfkill *rfkill, bool blocked)
{
return blocked;
}
static inline void rfkill_init_sw_state(struct rfkill *rfkill, bool blocked)
{
}
static inline void rfkill_set_states(struct rfkill *rfkill, bool sw, bool hw)
{
}
static inline bool rfkill_blocked(struct rfkill *rfkill)
{
return false;
}
#endif /* RFKILL || RFKILL_MODULE */
#endif /* __KERNEL__ */
#endif /* RFKILL_H */
external/compat-wireless/include/linux/semaphore.h
Vendored
+12
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@@ -0,0 +1,12 @@
#ifndef _COMPAT_LINUX_SEMAPHORE_H
#define _COMPAT_LINUX_SEMAPHORE_H 1
#include <linux/version.h>
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25))
#include_next <linux/semaphore.h>
#else
#include <asm/semaphore.h>
#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)) */
#endif /* _COMPAT_LINUX_SEMAPHORE_H */
external/compat-wireless/include/linux/spi/libertas_spi.h
Vendored
+29
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@@ -0,0 +1,29 @@
/*
* board-specific data for the libertas_spi driver.
*
* Copyright 2008 Analog Devices Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#ifndef _LIBERTAS_SPI_H_
#define _LIBERTAS_SPI_H_
struct spi_device;
struct libertas_spi_platform_data {
/* There are two ways to read data from the WLAN module's SPI
* interface. Setting 0 or 1 here controls which one is used.
*
* Usually you want to set use_dummy_writes = 1.
* However, if that doesn't work or if you are using a slow SPI clock
* speed, you may want to use 0 here. */
u16 use_dummy_writes;
/* Board specific setup/teardown */
int (*setup)(struct spi_device *spi);
int (*teardown)(struct spi_device *spi);
};
#endif
external/compat-wireless/include/linux/ssb/ssb.h
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+625
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#ifndef LINUX_SSB_H_
#define LINUX_SSB_H_
#include <linux/device.h>
#include <linux/list.h>
#include <linux/types.h>
#include <linux/spinlock.h>
#include <linux/pci.h>
#include <linux/mod_devicetable.h>
#include <linux/dma-mapping.h>
#include <linux/ssb/ssb_regs.h>
struct pcmcia_device;
struct ssb_bus;
struct ssb_driver;
struct ssb_sprom_core_pwr_info {
u8 itssi_2g, itssi_5g;
u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
u16 pa_2g[4], pa_5gl[4], pa_5g[4], pa_5gh[4];
};
struct ssb_sprom {
u8 revision;
u8 il0mac[6]; /* MAC address for 802.11b/g */
u8 et0mac[6]; /* MAC address for Ethernet */
u8 et1mac[6]; /* MAC address for 802.11a */
u8 et0phyaddr; /* MII address for enet0 */
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
u8 et1mdcport; /* MDIO for enet1 */
u16 board_rev; /* Board revision number from SPROM. */
u16 board_num; /* Board number from SPROM. */
u16 board_type; /* Board type from SPROM. */
u8 country_code; /* Country Code */
char alpha2[2]; /* Country Code as two chars like EU or US */
u8 leddc_on_time; /* LED Powersave Duty Cycle On Count */
u8 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
u16 pa0b0;
u16 pa0b1;
u16 pa0b2;
u16 pa1b0;
u16 pa1b1;
u16 pa1b2;
u16 pa1lob0;
u16 pa1lob1;
u16 pa1lob2;
u16 pa1hib0;
u16 pa1hib1;
u16 pa1hib2;
u8 gpio0; /* GPIO pin 0 */
u8 gpio1; /* GPIO pin 1 */
u8 gpio2; /* GPIO pin 2 */
u8 gpio3; /* GPIO pin 3 */
u8 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
u8 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
u8 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
u8 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
u8 itssi_a; /* Idle TSSI Target for A-PHY */
u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
u8 tri2g; /* 2.4GHz TX isolation */
u8 tri5gl; /* 5.2GHz TX isolation */
u8 tri5g; /* 5.3GHz TX isolation */
u8 tri5gh; /* 5.8GHz TX isolation */
u8 txpid2g[4]; /* 2GHz TX power index */
u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
s8 rxpo2g; /* 2GHz RX power offset */
s8 rxpo5g; /* 5GHz RX power offset */
u8 rssisav2g; /* 2GHz RSSI params */
u8 rssismc2g;
u8 rssismf2g;
u8 bxa2g; /* 2GHz BX arch */
u8 rssisav5g; /* 5GHz RSSI params */
u8 rssismc5g;
u8 rssismf5g;
u8 bxa5g; /* 5GHz BX arch */
u16 cck2gpo; /* CCK power offset */
u32 ofdm2gpo; /* 2.4GHz OFDM power offset */
u32 ofdm5glpo; /* 5.2GHz OFDM power offset */
u32 ofdm5gpo; /* 5.3GHz OFDM power offset */
u32 ofdm5ghpo; /* 5.8GHz OFDM power offset */
u16 boardflags_lo; /* Board flags (bits 0-15) */
u16 boardflags_hi; /* Board flags (bits 16-31) */
u16 boardflags2_lo; /* Board flags (bits 32-47) */
u16 boardflags2_hi; /* Board flags (bits 48-63) */
/* TODO store board flags in a single u64 */
struct ssb_sprom_core_pwr_info core_pwr_info[4];
/* Antenna gain values for up to 4 antennas
* on each band. Values in dBm/4 (Q5.2). Negative gain means the
* loss in the connectors is bigger than the gain. */
struct {
s8 a0, a1, a2, a3;
} antenna_gain;
struct {
struct {
u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
} ghz2;
struct {
u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
} ghz5;
} fem;
u16 mcs2gpo[8];
u16 mcs5gpo[8];
u16 mcs5glpo[8];
u16 mcs5ghpo[8];
u8 opo;
u8 rxgainerr2ga[3];
u8 rxgainerr5gla[3];
u8 rxgainerr5gma[3];
u8 rxgainerr5gha[3];
u8 rxgainerr5gua[3];
u8 noiselvl2ga[3];
u8 noiselvl5gla[3];
u8 noiselvl5gma[3];
u8 noiselvl5gha[3];
u8 noiselvl5gua[3];
u8 regrev;
u8 txchain;
u8 rxchain;
u8 antswitch;
u16 cddpo;
u16 stbcpo;
u16 bw40po;
u16 bwduppo;
u8 tempthresh;
u8 tempoffset;
u16 rawtempsense;
u8 measpower;
u8 tempsense_slope;
u8 tempcorrx;
u8 tempsense_option;
u8 freqoffset_corr;
u8 iqcal_swp_dis;
u8 hw_iqcal_en;
u8 elna2g;
u8 elna5g;
u8 phycal_tempdelta;
u8 temps_period;
u8 temps_hysteresis;
u8 measpower1;
u8 measpower2;
u8 pcieingress_war;
/* power per rate from sromrev 9 */
u16 cckbw202gpo;
u16 cckbw20ul2gpo;
u32 legofdmbw202gpo;
u32 legofdmbw20ul2gpo;
u32 legofdmbw205glpo;
u32 legofdmbw20ul5glpo;
u32 legofdmbw205gmpo;
u32 legofdmbw20ul5gmpo;
u32 legofdmbw205ghpo;
u32 legofdmbw20ul5ghpo;
u32 mcsbw202gpo;
u32 mcsbw20ul2gpo;
u32 mcsbw402gpo;
u32 mcsbw205glpo;
u32 mcsbw20ul5glpo;
u32 mcsbw405glpo;
u32 mcsbw205gmpo;
u32 mcsbw20ul5gmpo;
u32 mcsbw405gmpo;
u32 mcsbw205ghpo;
u32 mcsbw20ul5ghpo;
u32 mcsbw405ghpo;
u16 mcs32po;
u16 legofdm40duppo;
u8 sar2g;
u8 sar5g;
};
/* Information about the PCB the circuitry is soldered on. */
struct ssb_boardinfo {
u16 vendor;
u16 type;
};
struct ssb_device;
/* Lowlevel read/write operations on the device MMIO.
* Internal, don't use that outside of ssb. */
struct ssb_bus_ops {
u8 (*read8)(struct ssb_device *dev, u16 offset);
u16 (*read16)(struct ssb_device *dev, u16 offset);
u32 (*read32)(struct ssb_device *dev, u16 offset);
void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
#ifdef CONFIG_SSB_BLOCKIO
void (*block_read)(struct ssb_device *dev, void *buffer,
size_t count, u16 offset, u8 reg_width);
void (*block_write)(struct ssb_device *dev, const void *buffer,
size_t count, u16 offset, u8 reg_width);
#endif
};
/* Core-ID values. */
#define SSB_DEV_CHIPCOMMON 0x800
#define SSB_DEV_ILINE20 0x801
#define SSB_DEV_SDRAM 0x803
#define SSB_DEV_PCI 0x804
#define SSB_DEV_MIPS 0x805
#define SSB_DEV_ETHERNET 0x806
#define SSB_DEV_V90 0x807
#define SSB_DEV_USB11_HOSTDEV 0x808
#define SSB_DEV_ADSL 0x809
#define SSB_DEV_ILINE100 0x80A
#define SSB_DEV_IPSEC 0x80B
#define SSB_DEV_PCMCIA 0x80D
#define SSB_DEV_INTERNAL_MEM 0x80E
#define SSB_DEV_MEMC_SDRAM 0x80F
#define SSB_DEV_EXTIF 0x811
#define SSB_DEV_80211 0x812
#define SSB_DEV_MIPS_3302 0x816
#define SSB_DEV_USB11_HOST 0x817
#define SSB_DEV_USB11_DEV 0x818
#define SSB_DEV_USB20_HOST 0x819
#define SSB_DEV_USB20_DEV 0x81A
#define SSB_DEV_SDIO_HOST 0x81B
#define SSB_DEV_ROBOSWITCH 0x81C
#define SSB_DEV_PARA_ATA 0x81D
#define SSB_DEV_SATA_XORDMA 0x81E
#define SSB_DEV_ETHERNET_GBIT 0x81F
#define SSB_DEV_PCIE 0x820
#define SSB_DEV_MIMO_PHY 0x821
#define SSB_DEV_SRAM_CTRLR 0x822
#define SSB_DEV_MINI_MACPHY 0x823
#define SSB_DEV_ARM_1176 0x824
#define SSB_DEV_ARM_7TDMI 0x825
#define SSB_DEV_ARM_CM3 0x82A
/* Vendor-ID values */
#define SSB_VENDOR_BROADCOM 0x4243
/* Some kernel subsystems poke with dev->drvdata, so we must use the
* following ugly workaround to get from struct device to struct ssb_device */
struct __ssb_dev_wrapper {
struct device dev;
struct ssb_device *sdev;
};
struct ssb_device {
/* Having a copy of the ops pointer in each dev struct
* is an optimization. */
const struct ssb_bus_ops *ops;
struct device *dev, *dma_dev;
struct ssb_bus *bus;
struct ssb_device_id id;
u8 core_index;
unsigned int irq;
/* Internal-only stuff follows. */
void *drvdata; /* Per-device data */
void *devtypedata; /* Per-devicetype (eg 802.11) data */
};
/* Go from struct device to struct ssb_device. */
static inline
struct ssb_device * dev_to_ssb_dev(struct device *dev)
{
struct __ssb_dev_wrapper *wrap;
wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
return wrap->sdev;
}
/* Device specific user data */
static inline
void ssb_set_drvdata(struct ssb_device *dev, void *data)
{
dev->drvdata = data;
}
static inline
void * ssb_get_drvdata(struct ssb_device *dev)
{
return dev->drvdata;
}
/* Devicetype specific user data. This is per device-type (not per device) */
void ssb_set_devtypedata(struct ssb_device *dev, void *data);
static inline
void * ssb_get_devtypedata(struct ssb_device *dev)
{
return dev->devtypedata;
}
struct ssb_driver {
const char *name;
const struct ssb_device_id *id_table;
int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
void (*remove)(struct ssb_device *dev);
int (*suspend)(struct ssb_device *dev, pm_message_t state);
int (*resume)(struct ssb_device *dev);
void (*shutdown)(struct ssb_device *dev);
struct device_driver drv;
};
#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
#define ssb_driver_register(drv) \
__ssb_driver_register(drv, THIS_MODULE)
extern void ssb_driver_unregister(struct ssb_driver *drv);
enum ssb_bustype {
SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
SSB_BUSTYPE_SDIO, /* SSB is connected to SDIO bus */
};
/* board_vendor */
#define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */
#define SSB_BOARD_BCM94306MP 0x0418
#define SSB_BOARD_BCM4309G 0x0421
#define SSB_BOARD_BCM4306CB 0x0417
#define SSB_BOARD_BCM4309MP 0x040C
#define SSB_BOARD_MP4318 0x044A
#define SSB_BOARD_BU4306 0x0416
#define SSB_BOARD_BU4309 0x040A
/* chip_package */
#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
#include <linux/ssb/ssb_driver_chipcommon.h>
#include <linux/ssb/ssb_driver_mips.h>
#include <linux/ssb/ssb_driver_extif.h>
#include <linux/ssb/ssb_driver_pci.h>
struct ssb_bus {
/* The MMIO area. */
void __iomem *mmio;
const struct ssb_bus_ops *ops;
/* The core currently mapped into the MMIO window.
* Not valid on all host-buses. So don't use outside of SSB. */
struct ssb_device *mapped_device;
union {
/* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
u8 mapped_pcmcia_seg;
/* Current SSB base address window for SDIO. */
u32 sdio_sbaddr;
};
/* Lock for core and segment switching.
* On PCMCIA-host busses this is used to protect the whole MMIO access. */
spinlock_t bar_lock;
/* The host-bus this backplane is running on. */
enum ssb_bustype bustype;
/* Pointers to the host-bus. Check bustype before using any of these pointers. */
union {
/* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
struct pci_dev *host_pci;
/* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
struct pcmcia_device *host_pcmcia;
/* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */
struct sdio_func *host_sdio;
};
/* See enum ssb_quirks */
unsigned int quirks;
#ifdef CONFIG_SSB_SPROM
/* Mutex to protect the SPROM writing. */
struct mutex sprom_mutex;
#endif
/* ID information about the Chip. */
u16 chip_id;
u8 chip_rev;
u16 sprom_offset;
u16 sprom_size; /* number of words in sprom */
u8 chip_package;
/* List of devices (cores) on the backplane. */
struct ssb_device devices[SSB_MAX_NR_CORES];
u8 nr_devices;
/* Software ID number for this bus. */
unsigned int busnumber;
/* The ChipCommon device (if available). */
struct ssb_chipcommon chipco;
/* The PCI-core device (if available). */
struct ssb_pcicore pcicore;
/* The MIPS-core device (if available). */
struct ssb_mipscore mipscore;
/* The EXTif-core device (if available). */
struct ssb_extif extif;
/* The following structure elements are not available in early
* SSB initialization. Though, they are available for regular
* registered drivers at any stage. So be careful when
* using them in the ssb core code. */
/* ID information about the PCB. */
struct ssb_boardinfo boardinfo;
/* Contents of the SPROM. */
struct ssb_sprom sprom;
/* If the board has a cardbus slot, this is set to true. */
bool has_cardbus_slot;
#ifdef CONFIG_SSB_EMBEDDED
/* Lock for GPIO register access. */
spinlock_t gpio_lock;
#endif /* EMBEDDED */
/* Internal-only stuff follows. Do not touch. */
struct list_head list;
#ifdef CONFIG_SSB_DEBUG
/* Is the bus already powered up? */
bool powered_up;
int power_warn_count;
#endif /* DEBUG */
};
enum ssb_quirks {
/* SDIO connected card requires performing a read after writing a 32-bit value */
SSB_QUIRK_SDIO_READ_AFTER_WRITE32 = (1 << 0),
};
/* The initialization-invariants. */
struct ssb_init_invariants {
/* Versioning information about the PCB. */
struct ssb_boardinfo boardinfo;
/* The SPROM information. That's either stored in an
* EEPROM or NVRAM on the board. */
struct ssb_sprom sprom;
/* If the board has a cardbus slot, this is set to true. */
bool has_cardbus_slot;
};
/* Type of function to fetch the invariants. */
typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
struct ssb_init_invariants *iv);
/* Register a SSB system bus. get_invariants() is called after the
* basic system devices are initialized.
* The invariants are usually fetched from some NVRAM.
* Put the invariants into the struct pointed to by iv. */
extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
unsigned long baseaddr,
ssb_invariants_func_t get_invariants);
#ifdef CONFIG_SSB_PCIHOST
extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
struct pci_dev *host_pci);
#endif /* CONFIG_SSB_PCIHOST */
#ifdef CONFIG_SSB_PCMCIAHOST
extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
struct pcmcia_device *pcmcia_dev,
unsigned long baseaddr);
#endif /* CONFIG_SSB_PCMCIAHOST */
#ifdef CONFIG_SSB_SDIOHOST
extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
struct sdio_func *sdio_func,
unsigned int quirks);
#endif /* CONFIG_SSB_SDIOHOST */
extern void ssb_bus_unregister(struct ssb_bus *bus);
/* Does the device have an SPROM? */
extern bool ssb_is_sprom_available(struct ssb_bus *bus);
/* Set a fallback SPROM.
* See kdoc at the function definition for complete documentation. */
extern int ssb_arch_register_fallback_sprom(
int (*sprom_callback)(struct ssb_bus *bus,
struct ssb_sprom *out));
/* Suspend a SSB bus.
* Call this from the parent bus suspend routine. */
extern int ssb_bus_suspend(struct ssb_bus *bus);
/* Resume a SSB bus.
* Call this from the parent bus resume routine. */
extern int ssb_bus_resume(struct ssb_bus *bus);
extern u32 ssb_clockspeed(struct ssb_bus *bus);
/* Is the device enabled in hardware? */
int ssb_device_is_enabled(struct ssb_device *dev);
/* Enable a device and pass device-specific SSB_TMSLOW flags.
* If no device-specific flags are available, use 0. */
void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
/* Device MMIO register read/write functions. */
static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
{
return dev->ops->read8(dev, offset);
}
static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
{
return dev->ops->read16(dev, offset);
}
static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
{
return dev->ops->read32(dev, offset);
}
static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
{
dev->ops->write8(dev, offset, value);
}
static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
{
dev->ops->write16(dev, offset, value);
}
static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
{
dev->ops->write32(dev, offset, value);
}
#ifdef CONFIG_SSB_BLOCKIO
static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
size_t count, u16 offset, u8 reg_width)
{
dev->ops->block_read(dev, buffer, count, offset, reg_width);
}
static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
size_t count, u16 offset, u8 reg_width)
{
dev->ops->block_write(dev, buffer, count, offset, reg_width);
}
#endif /* CONFIG_SSB_BLOCKIO */
/* The SSB DMA API. Use this API for any DMA operation on the device.
* This API basically is a wrapper that calls the correct DMA API for
* the host device type the SSB device is attached to. */
/* Translation (routing) bits that need to be ORed to DMA
* addresses before they are given to a device. */
extern u32 ssb_dma_translation(struct ssb_device *dev);
#define SSB_DMA_TRANSLATION_MASK 0xC0000000
#define SSB_DMA_TRANSLATION_SHIFT 30
static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
{
#ifdef CONFIG_SSB_DEBUG
printk(KERN_ERR "SSB: BUG! Calling DMA API for "
"unsupported bustype %d\n", dev->bus->bustype);
#endif /* DEBUG */
}
#ifdef CONFIG_SSB_PCIHOST
/* PCI-host wrapper driver */
extern int ssb_pcihost_register(struct pci_driver *driver);
static inline void ssb_pcihost_unregister(struct pci_driver *driver)
{
pci_unregister_driver(driver);
}
static inline
void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
{
if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
pci_set_power_state(sdev->bus->host_pci, state);
}
#else
static inline void ssb_pcihost_unregister(struct pci_driver *driver)
{
}
static inline
void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
{
}
#endif /* CONFIG_SSB_PCIHOST */
/* If a driver is shutdown or suspended, call this to signal
* that the bus may be completely powered down. SSB will decide,
* if it's really time to power down the bus, based on if there
* are other devices that want to run. */
extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
/* Before initializing and enabling a device, call this to power-up the bus.
* If you want to allow use of dynamic-power-control, pass the flag.
* Otherwise static always-on powercontrol will be used. */
extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
extern void ssb_commit_settings(struct ssb_bus *bus);
/* Various helper functions */
extern u32 ssb_admatch_base(u32 adm);
extern u32 ssb_admatch_size(u32 adm);
/* PCI device mapping and fixup routines.
* Called from the architecture pcibios init code.
* These are only available on SSB_EMBEDDED configurations. */
#ifdef CONFIG_SSB_EMBEDDED
int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
#endif /* CONFIG_SSB_EMBEDDED */
#endif /* LINUX_SSB_H_ */
external/compat-wireless/include/linux/ssb/ssb_driver_chipcommon.h
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#ifndef LINUX_SSB_CHIPCO_H_
#define LINUX_SSB_CHIPCO_H_
/* SonicsSiliconBackplane CHIPCOMMON core hardware definitions
*
* The chipcommon core provides chip identification, SB control,
* jtag, 0/1/2 uarts, clock frequency control, a watchdog interrupt timer,
* gpio interface, extbus, and support for serial and parallel flashes.
*
* Copyright 2005, Broadcom Corporation
* Copyright 2006, Michael Buesch <m@bues.ch>
*
* Licensed under the GPL version 2. See COPYING for details.
*/
/** ChipCommon core registers. **/
#define SSB_CHIPCO_CHIPID 0x0000
#define SSB_CHIPCO_IDMASK 0x0000FFFF
#define SSB_CHIPCO_REVMASK 0x000F0000
#define SSB_CHIPCO_REVSHIFT 16
#define SSB_CHIPCO_PACKMASK 0x00F00000
#define SSB_CHIPCO_PACKSHIFT 20
#define SSB_CHIPCO_NRCORESMASK 0x0F000000
#define SSB_CHIPCO_NRCORESSHIFT 24
#define SSB_CHIPCO_CAP 0x0004 /* Capabilities */
#define SSB_CHIPCO_CAP_NRUART 0x00000003 /* # of UARTs */
#define SSB_CHIPCO_CAP_MIPSEB 0x00000004 /* MIPS in BigEndian Mode */
#define SSB_CHIPCO_CAP_UARTCLK 0x00000018 /* UART clock select */
#define SSB_CHIPCO_CAP_UARTCLK_INT 0x00000008 /* UARTs are driven by internal divided clock */
#define SSB_CHIPCO_CAP_UARTGPIO 0x00000020 /* UARTs on GPIO 15-12 */
#define SSB_CHIPCO_CAP_EXTBUS 0x000000C0 /* External buses present */
#define SSB_CHIPCO_CAP_FLASHT 0x00000700 /* Flash Type */
#define SSB_CHIPCO_FLASHT_NONE 0x00000000 /* No flash */
#define SSB_CHIPCO_FLASHT_STSER 0x00000100 /* ST serial flash */
#define SSB_CHIPCO_FLASHT_ATSER 0x00000200 /* Atmel serial flash */
#define SSB_CHIPCO_FLASHT_PARA 0x00000700 /* Parallel flash */
#define SSB_CHIPCO_CAP_PLLT 0x00038000 /* PLL Type */
#define SSB_PLLTYPE_NONE 0x00000000
#define SSB_PLLTYPE_1 0x00010000 /* 48Mhz base, 3 dividers */
#define SSB_PLLTYPE_2 0x00020000 /* 48Mhz, 4 dividers */
#define SSB_PLLTYPE_3 0x00030000 /* 25Mhz, 2 dividers */
#define SSB_PLLTYPE_4 0x00008000 /* 48Mhz, 4 dividers */
#define SSB_PLLTYPE_5 0x00018000 /* 25Mhz, 4 dividers */
#define SSB_PLLTYPE_6 0x00028000 /* 100/200 or 120/240 only */
#define SSB_PLLTYPE_7 0x00038000 /* 25Mhz, 4 dividers */
#define SSB_CHIPCO_CAP_PCTL 0x00040000 /* Power Control */
#define SSB_CHIPCO_CAP_OTPS 0x00380000 /* OTP size */
#define SSB_CHIPCO_CAP_OTPS_SHIFT 19
#define SSB_CHIPCO_CAP_OTPS_BASE 5
#define SSB_CHIPCO_CAP_JTAGM 0x00400000 /* JTAG master present */
#define SSB_CHIPCO_CAP_BROM 0x00800000 /* Internal boot ROM active */
#define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
#define SSB_CHIPCO_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */
#define SSB_CHIPCO_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */
#define SSB_CHIPCO_CAP_SPROM 0x40000000 /* SPROM present */
#define SSB_CHIPCO_CORECTL 0x0008
#define SSB_CHIPCO_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */
#define SSB_CHIPCO_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */
#define SSB_CHIPCO_CORECTL_UARTCLKEN 0x00000008 /* UART clock enable (rev >= 21) */
#define SSB_CHIPCO_BIST 0x000C
#define SSB_CHIPCO_OTPS 0x0010 /* OTP status */
#define SSB_CHIPCO_OTPS_PROGFAIL 0x80000000
#define SSB_CHIPCO_OTPS_PROTECT 0x00000007
#define SSB_CHIPCO_OTPS_HW_PROTECT 0x00000001
#define SSB_CHIPCO_OTPS_SW_PROTECT 0x00000002
#define SSB_CHIPCO_OTPS_CID_PROTECT 0x00000004
#define SSB_CHIPCO_OTPC 0x0014 /* OTP control */
#define SSB_CHIPCO_OTPC_RECWAIT 0xFF000000
#define SSB_CHIPCO_OTPC_PROGWAIT 0x00FFFF00
#define SSB_CHIPCO_OTPC_PRW_SHIFT 8
#define SSB_CHIPCO_OTPC_MAXFAIL 0x00000038
#define SSB_CHIPCO_OTPC_VSEL 0x00000006
#define SSB_CHIPCO_OTPC_SELVL 0x00000001
#define SSB_CHIPCO_OTPP 0x0018 /* OTP prog */
#define SSB_CHIPCO_OTPP_COL 0x000000FF
#define SSB_CHIPCO_OTPP_ROW 0x0000FF00
#define SSB_CHIPCO_OTPP_ROW_SHIFT 8
#define SSB_CHIPCO_OTPP_READERR 0x10000000
#define SSB_CHIPCO_OTPP_VALUE 0x20000000
#define SSB_CHIPCO_OTPP_READ 0x40000000
#define SSB_CHIPCO_OTPP_START 0x80000000
#define SSB_CHIPCO_OTPP_BUSY 0x80000000
#define SSB_CHIPCO_IRQSTAT 0x0020
#define SSB_CHIPCO_IRQMASK 0x0024
#define SSB_CHIPCO_IRQ_GPIO 0x00000001 /* gpio intr */
#define SSB_CHIPCO_IRQ_EXT 0x00000002 /* ro: ext intr pin (corerev >= 3) */
#define SSB_CHIPCO_IRQ_WDRESET 0x80000000 /* watchdog reset occurred */
#define SSB_CHIPCO_CHIPCTL 0x0028 /* Rev >= 11 only */
#define SSB_CHIPCO_CHIPSTAT 0x002C /* Rev >= 11 only */
#define SSB_CHIPCO_JCMD 0x0030 /* Rev >= 10 only */
#define SSB_CHIPCO_JCMD_START 0x80000000
#define SSB_CHIPCO_JCMD_BUSY 0x80000000
#define SSB_CHIPCO_JCMD_PAUSE 0x40000000
#define SSB_CHIPCO_JCMD0_ACC_MASK 0x0000F000
#define SSB_CHIPCO_JCMD0_ACC_IRDR 0x00000000
#define SSB_CHIPCO_JCMD0_ACC_DR 0x00001000
#define SSB_CHIPCO_JCMD0_ACC_IR 0x00002000
#define SSB_CHIPCO_JCMD0_ACC_RESET 0x00003000
#define SSB_CHIPCO_JCMD0_ACC_IRPDR 0x00004000
#define SSB_CHIPCO_JCMD0_ACC_PDR 0x00005000
#define SSB_CHIPCO_JCMD0_IRW_MASK 0x00000F00
#define SSB_CHIPCO_JCMD_ACC_MASK 0x000F0000 /* Changes for corerev 11 */
#define SSB_CHIPCO_JCMD_ACC_IRDR 0x00000000
#define SSB_CHIPCO_JCMD_ACC_DR 0x00010000
#define SSB_CHIPCO_JCMD_ACC_IR 0x00020000
#define SSB_CHIPCO_JCMD_ACC_RESET 0x00030000
#define SSB_CHIPCO_JCMD_ACC_IRPDR 0x00040000
#define SSB_CHIPCO_JCMD_ACC_PDR 0x00050000
#define SSB_CHIPCO_JCMD_IRW_MASK 0x00001F00
#define SSB_CHIPCO_JCMD_IRW_SHIFT 8
#define SSB_CHIPCO_JCMD_DRW_MASK 0x0000003F
#define SSB_CHIPCO_JIR 0x0034 /* Rev >= 10 only */
#define SSB_CHIPCO_JDR 0x0038 /* Rev >= 10 only */
#define SSB_CHIPCO_JCTL 0x003C /* Rev >= 10 only */
#define SSB_CHIPCO_JCTL_FORCE_CLK 4 /* Force clock */
#define SSB_CHIPCO_JCTL_EXT_EN 2 /* Enable external targets */
#define SSB_CHIPCO_JCTL_EN 1 /* Enable Jtag master */
#define SSB_CHIPCO_FLASHCTL 0x0040
#define SSB_CHIPCO_FLASHCTL_START 0x80000000
#define SSB_CHIPCO_FLASHCTL_BUSY SSB_CHIPCO_FLASHCTL_START
#define SSB_CHIPCO_FLASHADDR 0x0044
#define SSB_CHIPCO_FLASHDATA 0x0048
#define SSB_CHIPCO_BCAST_ADDR 0x0050
#define SSB_CHIPCO_BCAST_DATA 0x0054
#define SSB_CHIPCO_GPIOPULLUP 0x0058 /* Rev >= 20 only */
#define SSB_CHIPCO_GPIOPULLDOWN 0x005C /* Rev >= 20 only */
#define SSB_CHIPCO_GPIOIN 0x0060
#define SSB_CHIPCO_GPIOOUT 0x0064
#define SSB_CHIPCO_GPIOOUTEN 0x0068
#define SSB_CHIPCO_GPIOCTL 0x006C
#define SSB_CHIPCO_GPIOPOL 0x0070
#define SSB_CHIPCO_GPIOIRQ 0x0074
#define SSB_CHIPCO_WATCHDOG 0x0080
#define SSB_CHIPCO_GPIOTIMER 0x0088 /* LED powersave (corerev >= 16) */
#define SSB_CHIPCO_GPIOTIMER_OFFTIME 0x0000FFFF
#define SSB_CHIPCO_GPIOTIMER_OFFTIME_SHIFT 0
#define SSB_CHIPCO_GPIOTIMER_ONTIME 0xFFFF0000
#define SSB_CHIPCO_GPIOTIMER_ONTIME_SHIFT 16
#define SSB_CHIPCO_GPIOTOUTM 0x008C /* LED powersave (corerev >= 16) */
#define SSB_CHIPCO_CLOCK_N 0x0090
#define SSB_CHIPCO_CLOCK_SB 0x0094
#define SSB_CHIPCO_CLOCK_PCI 0x0098
#define SSB_CHIPCO_CLOCK_M2 0x009C
#define SSB_CHIPCO_CLOCK_MIPS 0x00A0
#define SSB_CHIPCO_CLKDIV 0x00A4 /* Rev >= 3 only */
#define SSB_CHIPCO_CLKDIV_SFLASH 0x0F000000
#define SSB_CHIPCO_CLKDIV_SFLASH_SHIFT 24
#define SSB_CHIPCO_CLKDIV_OTP 0x000F0000
#define SSB_CHIPCO_CLKDIV_OTP_SHIFT 16
#define SSB_CHIPCO_CLKDIV_JTAG 0x00000F00
#define SSB_CHIPCO_CLKDIV_JTAG_SHIFT 8
#define SSB_CHIPCO_CLKDIV_UART 0x000000FF
#define SSB_CHIPCO_PLLONDELAY 0x00B0 /* Rev >= 4 only */
#define SSB_CHIPCO_FREFSELDELAY 0x00B4 /* Rev >= 4 only */
#define SSB_CHIPCO_SLOWCLKCTL 0x00B8 /* 6 <= Rev <= 9 only */
#define SSB_CHIPCO_SLOWCLKCTL_SRC 0x00000007 /* slow clock source mask */
#define SSB_CHIPCO_SLOWCLKCTL_SRC_LPO 0x00000000 /* source of slow clock is LPO */
#define SSB_CHIPCO_SLOWCLKCTL_SRC_XTAL 0x00000001 /* source of slow clock is crystal */
#define SSB_CHIPCO_SLOECLKCTL_SRC_PCI 0x00000002 /* source of slow clock is PCI */
#define SSB_CHIPCO_SLOWCLKCTL_LPOFREQ 0x00000200 /* LPOFreqSel, 1: 160Khz, 0: 32KHz */
#define SSB_CHIPCO_SLOWCLKCTL_LPOPD 0x00000400 /* LPOPowerDown, 1: LPO is disabled, 0: LPO is enabled */
#define SSB_CHIPCO_SLOWCLKCTL_FSLOW 0x00000800 /* ForceSlowClk, 1: sb/cores running on slow clock, 0: power logic control */
#define SSB_CHIPCO_SLOWCLKCTL_IPLL 0x00001000 /* IgnorePllOffReq, 1/0: power logic ignores/honors PLL clock disable requests from core */
#define SSB_CHIPCO_SLOWCLKCTL_ENXTAL 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't disable crystal when appropriate */
#define SSB_CHIPCO_SLOWCLKCTL_XTALPU 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */
#define SSB_CHIPCO_SLOWCLKCTL_CLKDIV 0xFFFF0000 /* ClockDivider (SlowClk = 1/(4+divisor)) */
#define SSB_CHIPCO_SLOWCLKCTL_CLKDIV_SHIFT 16
#define SSB_CHIPCO_SYSCLKCTL 0x00C0 /* Rev >= 3 only */
#define SSB_CHIPCO_SYSCLKCTL_IDLPEN 0x00000001 /* ILPen: Enable Idle Low Power */
#define SSB_CHIPCO_SYSCLKCTL_ALPEN 0x00000002 /* ALPen: Enable Active Low Power */
#define SSB_CHIPCO_SYSCLKCTL_PLLEN 0x00000004 /* ForcePLLOn */
#define SSB_CHIPCO_SYSCLKCTL_FORCEALP 0x00000008 /* Force ALP (or HT if ALPen is not set */
#define SSB_CHIPCO_SYSCLKCTL_FORCEHT 0x00000010 /* Force HT */
#define SSB_CHIPCO_SYSCLKCTL_CLKDIV 0xFFFF0000 /* ClkDiv (ILP = 1/(4+divisor)) */
#define SSB_CHIPCO_SYSCLKCTL_CLKDIV_SHIFT 16
#define SSB_CHIPCO_CLKSTSTR 0x00C4 /* Rev >= 3 only */
#define SSB_CHIPCO_PCMCIA_CFG 0x0100
#define SSB_CHIPCO_PCMCIA_MEMWAIT 0x0104
#define SSB_CHIPCO_PCMCIA_ATTRWAIT 0x0108
#define SSB_CHIPCO_PCMCIA_IOWAIT 0x010C
#define SSB_CHIPCO_IDE_CFG 0x0110
#define SSB_CHIPCO_IDE_MEMWAIT 0x0114
#define SSB_CHIPCO_IDE_ATTRWAIT 0x0118
#define SSB_CHIPCO_IDE_IOWAIT 0x011C
#define SSB_CHIPCO_PROG_CFG 0x0120
#define SSB_CHIPCO_PROG_WAITCNT 0x0124
#define SSB_CHIPCO_FLASH_CFG 0x0128
#define SSB_CHIPCO_FLASH_WAITCNT 0x012C
#define SSB_CHIPCO_CLKCTLST 0x01E0 /* Clock control and status (rev >= 20) */
#define SSB_CHIPCO_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */
#define SSB_CHIPCO_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */
#define SSB_CHIPCO_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */
#define SSB_CHIPCO_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */
#define SSB_CHIPCO_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */
#define SSB_CHIPCO_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */
#define SSB_CHIPCO_CLKCTLST_HAVEALP 0x00010000 /* ALP available */
#define SSB_CHIPCO_CLKCTLST_HAVEHT 0x00020000 /* HT available */
#define SSB_CHIPCO_CLKCTLST_4328A0_HAVEHT 0x00010000 /* 4328a0 has reversed bits */
#define SSB_CHIPCO_CLKCTLST_4328A0_HAVEALP 0x00020000 /* 4328a0 has reversed bits */
#define SSB_CHIPCO_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */
#define SSB_CHIPCO_UART0_DATA 0x0300
#define SSB_CHIPCO_UART0_IMR 0x0304
#define SSB_CHIPCO_UART0_FCR 0x0308
#define SSB_CHIPCO_UART0_LCR 0x030C
#define SSB_CHIPCO_UART0_MCR 0x0310
#define SSB_CHIPCO_UART0_LSR 0x0314
#define SSB_CHIPCO_UART0_MSR 0x0318
#define SSB_CHIPCO_UART0_SCRATCH 0x031C
#define SSB_CHIPCO_UART1_DATA 0x0400
#define SSB_CHIPCO_UART1_IMR 0x0404
#define SSB_CHIPCO_UART1_FCR 0x0408
#define SSB_CHIPCO_UART1_LCR 0x040C
#define SSB_CHIPCO_UART1_MCR 0x0410
#define SSB_CHIPCO_UART1_LSR 0x0414
#define SSB_CHIPCO_UART1_MSR 0x0418
#define SSB_CHIPCO_UART1_SCRATCH 0x041C
/* PMU registers (rev >= 20) */
#define SSB_CHIPCO_PMU_CTL 0x0600 /* PMU control */
#define SSB_CHIPCO_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */
#define SSB_CHIPCO_PMU_CTL_ILP_DIV_SHIFT 16
#define SSB_CHIPCO_PMU_CTL_NOILPONW 0x00000200 /* No ILP on wait */
#define SSB_CHIPCO_PMU_CTL_HTREQEN 0x00000100 /* HT req enable */
#define SSB_CHIPCO_PMU_CTL_ALPREQEN 0x00000080 /* ALP req enable */
#define SSB_CHIPCO_PMU_CTL_XTALFREQ 0x0000007C /* Crystal freq */
#define SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT 2
#define SSB_CHIPCO_PMU_CTL_ILPDIVEN 0x00000002 /* ILP div enable */
#define SSB_CHIPCO_PMU_CTL_LPOSEL 0x00000001 /* LPO sel */
#define SSB_CHIPCO_PMU_CAP 0x0604 /* PMU capabilities */
#define SSB_CHIPCO_PMU_CAP_REVISION 0x000000FF /* Revision mask */
#define SSB_CHIPCO_PMU_STAT 0x0608 /* PMU status */
#define SSB_CHIPCO_PMU_STAT_INTPEND 0x00000040 /* Interrupt pending */
#define SSB_CHIPCO_PMU_STAT_SBCLKST 0x00000030 /* Backplane clock status? */
#define SSB_CHIPCO_PMU_STAT_HAVEALP 0x00000008 /* ALP available */
#define SSB_CHIPCO_PMU_STAT_HAVEHT 0x00000004 /* HT available */
#define SSB_CHIPCO_PMU_STAT_RESINIT 0x00000003 /* Res init */
#define SSB_CHIPCO_PMU_RES_STAT 0x060C /* PMU res status */
#define SSB_CHIPCO_PMU_RES_PEND 0x0610 /* PMU res pending */
#define SSB_CHIPCO_PMU_TIMER 0x0614 /* PMU timer */
#define SSB_CHIPCO_PMU_MINRES_MSK 0x0618 /* PMU min res mask */
#define SSB_CHIPCO_PMU_MAXRES_MSK 0x061C /* PMU max res mask */
#define SSB_CHIPCO_PMU_RES_TABSEL 0x0620 /* PMU res table sel */
#define SSB_CHIPCO_PMU_RES_DEPMSK 0x0624 /* PMU res dep mask */
#define SSB_CHIPCO_PMU_RES_UPDNTM 0x0628 /* PMU res updown timer */
#define SSB_CHIPCO_PMU_RES_TIMER 0x062C /* PMU res timer */
#define SSB_CHIPCO_PMU_CLKSTRETCH 0x0630 /* PMU clockstretch */
#define SSB_CHIPCO_PMU_WATCHDOG 0x0634 /* PMU watchdog */
#define SSB_CHIPCO_PMU_RES_REQTS 0x0640 /* PMU res req timer sel */
#define SSB_CHIPCO_PMU_RES_REQT 0x0644 /* PMU res req timer */
#define SSB_CHIPCO_PMU_RES_REQM 0x0648 /* PMU res req mask */
#define SSB_CHIPCO_CHIPCTL_ADDR 0x0650
#define SSB_CHIPCO_CHIPCTL_DATA 0x0654
#define SSB_CHIPCO_REGCTL_ADDR 0x0658
#define SSB_CHIPCO_REGCTL_DATA 0x065C
#define SSB_CHIPCO_PLLCTL_ADDR 0x0660
#define SSB_CHIPCO_PLLCTL_DATA 0x0664
/** PMU PLL registers */
/* PMU rev 0 PLL registers */
#define SSB_PMU0_PLLCTL0 0
#define SSB_PMU0_PLLCTL0_PDIV_MSK 0x00000001
#define SSB_PMU0_PLLCTL0_PDIV_FREQ 25000 /* kHz */
#define SSB_PMU0_PLLCTL1 1
#define SSB_PMU0_PLLCTL1_WILD_IMSK 0xF0000000 /* Wild int mask (low nibble) */
#define SSB_PMU0_PLLCTL1_WILD_IMSK_SHIFT 28
#define SSB_PMU0_PLLCTL1_WILD_FMSK 0x0FFFFF00 /* Wild frac mask */
#define SSB_PMU0_PLLCTL1_WILD_FMSK_SHIFT 8
#define SSB_PMU0_PLLCTL1_STOPMOD 0x00000040 /* Stop mod */
#define SSB_PMU0_PLLCTL2 2
#define SSB_PMU0_PLLCTL2_WILD_IMSKHI 0x0000000F /* Wild int mask (high nibble) */
#define SSB_PMU0_PLLCTL2_WILD_IMSKHI_SHIFT 0
/* PMU rev 1 PLL registers */
#define SSB_PMU1_PLLCTL0 0
#define SSB_PMU1_PLLCTL0_P1DIV 0x00F00000 /* P1 div */
#define SSB_PMU1_PLLCTL0_P1DIV_SHIFT 20
#define SSB_PMU1_PLLCTL0_P2DIV 0x0F000000 /* P2 div */
#define SSB_PMU1_PLLCTL0_P2DIV_SHIFT 24
#define SSB_PMU1_PLLCTL1 1
#define SSB_PMU1_PLLCTL1_M1DIV 0x000000FF /* M1 div */
#define SSB_PMU1_PLLCTL1_M1DIV_SHIFT 0
#define SSB_PMU1_PLLCTL1_M2DIV 0x0000FF00 /* M2 div */
#define SSB_PMU1_PLLCTL1_M2DIV_SHIFT 8
#define SSB_PMU1_PLLCTL1_M3DIV 0x00FF0000 /* M3 div */
#define SSB_PMU1_PLLCTL1_M3DIV_SHIFT 16
#define SSB_PMU1_PLLCTL1_M4DIV 0xFF000000 /* M4 div */
#define SSB_PMU1_PLLCTL1_M4DIV_SHIFT 24
#define SSB_PMU1_PLLCTL2 2
#define SSB_PMU1_PLLCTL2_M5DIV 0x000000FF /* M5 div */
#define SSB_PMU1_PLLCTL2_M5DIV_SHIFT 0
#define SSB_PMU1_PLLCTL2_M6DIV 0x0000FF00 /* M6 div */
#define SSB_PMU1_PLLCTL2_M6DIV_SHIFT 8
#define SSB_PMU1_PLLCTL2_NDIVMODE 0x000E0000 /* NDIV mode */
#define SSB_PMU1_PLLCTL2_NDIVMODE_SHIFT 17
#define SSB_PMU1_PLLCTL2_NDIVINT 0x1FF00000 /* NDIV int */
#define SSB_PMU1_PLLCTL2_NDIVINT_SHIFT 20
#define SSB_PMU1_PLLCTL3 3
#define SSB_PMU1_PLLCTL3_NDIVFRAC 0x00FFFFFF /* NDIV frac */
#define SSB_PMU1_PLLCTL3_NDIVFRAC_SHIFT 0
#define SSB_PMU1_PLLCTL4 4
#define SSB_PMU1_PLLCTL5 5
#define SSB_PMU1_PLLCTL5_CLKDRV 0xFFFFFF00 /* clk drv */
#define SSB_PMU1_PLLCTL5_CLKDRV_SHIFT 8
/* BCM4312 PLL resource numbers. */
#define SSB_PMURES_4312_SWITCHER_BURST 0
#define SSB_PMURES_4312_SWITCHER_PWM 1
#define SSB_PMURES_4312_PA_REF_LDO 2
#define SSB_PMURES_4312_CORE_LDO_BURST 3
#define SSB_PMURES_4312_CORE_LDO_PWM 4
#define SSB_PMURES_4312_RADIO_LDO 5
#define SSB_PMURES_4312_ILP_REQUEST 6
#define SSB_PMURES_4312_BG_FILTBYP 7
#define SSB_PMURES_4312_TX_FILTBYP 8
#define SSB_PMURES_4312_RX_FILTBYP 9
#define SSB_PMURES_4312_XTAL_PU 10
#define SSB_PMURES_4312_ALP_AVAIL 11
#define SSB_PMURES_4312_BB_PLL_FILTBYP 12
#define SSB_PMURES_4312_RF_PLL_FILTBYP 13
#define SSB_PMURES_4312_HT_AVAIL 14
/* BCM4325 PLL resource numbers. */
#define SSB_PMURES_4325_BUCK_BOOST_BURST 0
#define SSB_PMURES_4325_CBUCK_BURST 1
#define SSB_PMURES_4325_CBUCK_PWM 2
#define SSB_PMURES_4325_CLDO_CBUCK_BURST 3
#define SSB_PMURES_4325_CLDO_CBUCK_PWM 4
#define SSB_PMURES_4325_BUCK_BOOST_PWM 5
#define SSB_PMURES_4325_ILP_REQUEST 6
#define SSB_PMURES_4325_ABUCK_BURST 7
#define SSB_PMURES_4325_ABUCK_PWM 8
#define SSB_PMURES_4325_LNLDO1_PU 9
#define SSB_PMURES_4325_LNLDO2_PU 10
#define SSB_PMURES_4325_LNLDO3_PU 11
#define SSB_PMURES_4325_LNLDO4_PU 12
#define SSB_PMURES_4325_XTAL_PU 13
#define SSB_PMURES_4325_ALP_AVAIL 14
#define SSB_PMURES_4325_RX_PWRSW_PU 15
#define SSB_PMURES_4325_TX_PWRSW_PU 16
#define SSB_PMURES_4325_RFPLL_PWRSW_PU 17
#define SSB_PMURES_4325_LOGEN_PWRSW_PU 18
#define SSB_PMURES_4325_AFE_PWRSW_PU 19
#define SSB_PMURES_4325_BBPLL_PWRSW_PU 20
#define SSB_PMURES_4325_HT_AVAIL 21
/* BCM4328 PLL resource numbers. */
#define SSB_PMURES_4328_EXT_SWITCHER_PWM 0
#define SSB_PMURES_4328_BB_SWITCHER_PWM 1
#define SSB_PMURES_4328_BB_SWITCHER_BURST 2
#define SSB_PMURES_4328_BB_EXT_SWITCHER_BURST 3
#define SSB_PMURES_4328_ILP_REQUEST 4
#define SSB_PMURES_4328_RADIO_SWITCHER_PWM 5
#define SSB_PMURES_4328_RADIO_SWITCHER_BURST 6
#define SSB_PMURES_4328_ROM_SWITCH 7
#define SSB_PMURES_4328_PA_REF_LDO 8
#define SSB_PMURES_4328_RADIO_LDO 9
#define SSB_PMURES_4328_AFE_LDO 10
#define SSB_PMURES_4328_PLL_LDO 11
#define SSB_PMURES_4328_BG_FILTBYP 12
#define SSB_PMURES_4328_TX_FILTBYP 13
#define SSB_PMURES_4328_RX_FILTBYP 14
#define SSB_PMURES_4328_XTAL_PU 15
#define SSB_PMURES_4328_XTAL_EN 16
#define SSB_PMURES_4328_BB_PLL_FILTBYP 17
#define SSB_PMURES_4328_RF_PLL_FILTBYP 18
#define SSB_PMURES_4328_BB_PLL_PU 19
/* BCM5354 PLL resource numbers. */
#define SSB_PMURES_5354_EXT_SWITCHER_PWM 0
#define SSB_PMURES_5354_BB_SWITCHER_PWM 1
#define SSB_PMURES_5354_BB_SWITCHER_BURST 2
#define SSB_PMURES_5354_BB_EXT_SWITCHER_BURST 3
#define SSB_PMURES_5354_ILP_REQUEST 4
#define SSB_PMURES_5354_RADIO_SWITCHER_PWM 5
#define SSB_PMURES_5354_RADIO_SWITCHER_BURST 6
#define SSB_PMURES_5354_ROM_SWITCH 7
#define SSB_PMURES_5354_PA_REF_LDO 8
#define SSB_PMURES_5354_RADIO_LDO 9
#define SSB_PMURES_5354_AFE_LDO 10
#define SSB_PMURES_5354_PLL_LDO 11
#define SSB_PMURES_5354_BG_FILTBYP 12
#define SSB_PMURES_5354_TX_FILTBYP 13
#define SSB_PMURES_5354_RX_FILTBYP 14
#define SSB_PMURES_5354_XTAL_PU 15
#define SSB_PMURES_5354_XTAL_EN 16
#define SSB_PMURES_5354_BB_PLL_FILTBYP 17
#define SSB_PMURES_5354_RF_PLL_FILTBYP 18
#define SSB_PMURES_5354_BB_PLL_PU 19
/** Chip specific Chip-Status register contents. */
#define SSB_CHIPCO_CHST_4322_SPROM_EXISTS 0x00000040 /* SPROM present */
#define SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL 0x00000003
#define SSB_CHIPCO_CHST_4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
#define SSB_CHIPCO_CHST_4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
#define SSB_CHIPCO_CHST_4325_OTP_SEL 2 /* OTP is powered up, no SPROM */
#define SSB_CHIPCO_CHST_4325_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */
#define SSB_CHIPCO_CHST_4325_SDIO_USB_MODE 0x00000004
#define SSB_CHIPCO_CHST_4325_SDIO_USB_MODE_SHIFT 2
#define SSB_CHIPCO_CHST_4325_RCAL_VALID 0x00000008
#define SSB_CHIPCO_CHST_4325_RCAL_VALID_SHIFT 3
#define SSB_CHIPCO_CHST_4325_RCAL_VALUE 0x000001F0
#define SSB_CHIPCO_CHST_4325_RCAL_VALUE_SHIFT 4
#define SSB_CHIPCO_CHST_4325_PMUTOP_2B 0x00000200 /* 1 for 2b, 0 for to 2a */
/** Macros to determine SPROM presence based on Chip-Status register. */
#define SSB_CHIPCO_CHST_4312_SPROM_PRESENT(status) \
((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
SSB_CHIPCO_CHST_4325_OTP_SEL)
#define SSB_CHIPCO_CHST_4322_SPROM_PRESENT(status) \
(status & SSB_CHIPCO_CHST_4322_SPROM_EXISTS)
#define SSB_CHIPCO_CHST_4325_SPROM_PRESENT(status) \
(((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
SSB_CHIPCO_CHST_4325_DEFCIS_SEL) && \
((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
SSB_CHIPCO_CHST_4325_OTP_SEL))
/** Clockcontrol masks and values **/
/* SSB_CHIPCO_CLOCK_N */
#define SSB_CHIPCO_CLK_N1 0x0000003F /* n1 control */
#define SSB_CHIPCO_CLK_N2 0x00003F00 /* n2 control */
#define SSB_CHIPCO_CLK_N2_SHIFT 8
#define SSB_CHIPCO_CLK_PLLC 0x000F0000 /* pll control */
#define SSB_CHIPCO_CLK_PLLC_SHIFT 16
/* SSB_CHIPCO_CLOCK_SB/PCI/UART */
#define SSB_CHIPCO_CLK_M1 0x0000003F /* m1 control */
#define SSB_CHIPCO_CLK_M2 0x00003F00 /* m2 control */
#define SSB_CHIPCO_CLK_M2_SHIFT 8
#define SSB_CHIPCO_CLK_M3 0x003F0000 /* m3 control */
#define SSB_CHIPCO_CLK_M3_SHIFT 16
#define SSB_CHIPCO_CLK_MC 0x1F000000 /* mux control */
#define SSB_CHIPCO_CLK_MC_SHIFT 24
/* N3M Clock control magic field values */
#define SSB_CHIPCO_CLK_F6_2 0x02 /* A factor of 2 in */
#define SSB_CHIPCO_CLK_F6_3 0x03 /* 6-bit fields like */
#define SSB_CHIPCO_CLK_F6_4 0x05 /* N1, M1 or M3 */
#define SSB_CHIPCO_CLK_F6_5 0x09
#define SSB_CHIPCO_CLK_F6_6 0x11
#define SSB_CHIPCO_CLK_F6_7 0x21
#define SSB_CHIPCO_CLK_F5_BIAS 5 /* 5-bit fields get this added */
#define SSB_CHIPCO_CLK_MC_BYPASS 0x08
#define SSB_CHIPCO_CLK_MC_M1 0x04
#define SSB_CHIPCO_CLK_MC_M1M2 0x02
#define SSB_CHIPCO_CLK_MC_M1M2M3 0x01
#define SSB_CHIPCO_CLK_MC_M1M3 0x11
/* Type 2 Clock control magic field values */
#define SSB_CHIPCO_CLK_T2_BIAS 2 /* n1, n2, m1 & m3 bias */
#define SSB_CHIPCO_CLK_T2M2_BIAS 3 /* m2 bias */
#define SSB_CHIPCO_CLK_T2MC_M1BYP 1
#define SSB_CHIPCO_CLK_T2MC_M2BYP 2
#define SSB_CHIPCO_CLK_T2MC_M3BYP 4
/* Type 6 Clock control magic field values */
#define SSB_CHIPCO_CLK_T6_MMASK 1 /* bits of interest in m */
#define SSB_CHIPCO_CLK_T6_M0 120000000 /* sb clock for m = 0 */
#define SSB_CHIPCO_CLK_T6_M1 100000000 /* sb clock for m = 1 */
#define SSB_CHIPCO_CLK_SB2MIPS_T6(sb) (2 * (sb))
/* Common clock base */
#define SSB_CHIPCO_CLK_BASE1 24000000 /* Half the clock freq */
#define SSB_CHIPCO_CLK_BASE2 12500000 /* Alternate crystal on some PLL's */
/* Clock control values for 200Mhz in 5350 */
#define SSB_CHIPCO_CLK_5350_N 0x0311
#define SSB_CHIPCO_CLK_5350_M 0x04020009
/** Bits in the config registers **/
#define SSB_CHIPCO_CFG_EN 0x0001 /* Enable */
#define SSB_CHIPCO_CFG_EXTM 0x000E /* Extif Mode */
#define SSB_CHIPCO_CFG_EXTM_ASYNC 0x0002 /* Async/Parallel flash */
#define SSB_CHIPCO_CFG_EXTM_SYNC 0x0004 /* Synchronous */
#define SSB_CHIPCO_CFG_EXTM_PCMCIA 0x0008 /* PCMCIA */
#define SSB_CHIPCO_CFG_EXTM_IDE 0x000A /* IDE */
#define SSB_CHIPCO_CFG_DS16 0x0010 /* Data size, 0=8bit, 1=16bit */
#define SSB_CHIPCO_CFG_CLKDIV 0x0060 /* Sync: Clock divisor */
#define SSB_CHIPCO_CFG_CLKEN 0x0080 /* Sync: Clock enable */
#define SSB_CHIPCO_CFG_BSTRO 0x0100 /* Sync: Size/Bytestrobe */
/** Flash-specific control/status values */
/* flashcontrol opcodes for ST flashes */
#define SSB_CHIPCO_FLASHCTL_ST_WREN 0x0006 /* Write Enable */
#define SSB_CHIPCO_FLASHCTL_ST_WRDIS 0x0004 /* Write Disable */
#define SSB_CHIPCO_FLASHCTL_ST_RDSR 0x0105 /* Read Status Register */
#define SSB_CHIPCO_FLASHCTL_ST_WRSR 0x0101 /* Write Status Register */
#define SSB_CHIPCO_FLASHCTL_ST_READ 0x0303 /* Read Data Bytes */
#define SSB_CHIPCO_FLASHCTL_ST_PP 0x0302 /* Page Program */
#define SSB_CHIPCO_FLASHCTL_ST_SE 0x02D8 /* Sector Erase */
#define SSB_CHIPCO_FLASHCTL_ST_BE 0x00C7 /* Bulk Erase */
#define SSB_CHIPCO_FLASHCTL_ST_DP 0x00B9 /* Deep Power-down */
#define SSB_CHIPCO_FLASHCTL_ST_RSIG 0x03AB /* Read Electronic Signature */
/* Status register bits for ST flashes */
#define SSB_CHIPCO_FLASHSTA_ST_WIP 0x01 /* Write In Progress */
#define SSB_CHIPCO_FLASHSTA_ST_WEL 0x02 /* Write Enable Latch */
#define SSB_CHIPCO_FLASHSTA_ST_BP 0x1C /* Block Protect */
#define SSB_CHIPCO_FLASHSTA_ST_BP_SHIFT 2
#define SSB_CHIPCO_FLASHSTA_ST_SRWD 0x80 /* Status Register Write Disable */
/* flashcontrol opcodes for Atmel flashes */
#define SSB_CHIPCO_FLASHCTL_AT_READ 0x07E8
#define SSB_CHIPCO_FLASHCTL_AT_PAGE_READ 0x07D2
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_READ /* FIXME */
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_READ /* FIXME */
#define SSB_CHIPCO_FLASHCTL_AT_STATUS 0x01D7
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_WRITE 0x0384
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_WRITE 0x0387
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_ERASE_PRGM 0x0283 /* Erase program */
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_ERASE_PRGM 0x0286 /* Erase program */
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_PROGRAM 0x0288
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_PROGRAM 0x0289
#define SSB_CHIPCO_FLASHCTL_AT_PAGE_ERASE 0x0281
#define SSB_CHIPCO_FLASHCTL_AT_BLOCK_ERASE 0x0250
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_WRER_PRGM 0x0382 /* Write erase program */
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_WRER_PRGM 0x0385 /* Write erase program */
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_LOAD 0x0253
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_LOAD 0x0255
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_COMPARE 0x0260
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_COMPARE 0x0261
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_REPROGRAM 0x0258
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_REPROGRAM 0x0259
/* Status register bits for Atmel flashes */
#define SSB_CHIPCO_FLASHSTA_AT_READY 0x80
#define SSB_CHIPCO_FLASHSTA_AT_MISMATCH 0x40
#define SSB_CHIPCO_FLASHSTA_AT_ID 0x38
#define SSB_CHIPCO_FLASHSTA_AT_ID_SHIFT 3
/** OTP **/
/* OTP regions */
#define SSB_CHIPCO_OTP_HW_REGION SSB_CHIPCO_OTPS_HW_PROTECT
#define SSB_CHIPCO_OTP_SW_REGION SSB_CHIPCO_OTPS_SW_PROTECT
#define SSB_CHIPCO_OTP_CID_REGION SSB_CHIPCO_OTPS_CID_PROTECT
/* OTP regions (Byte offsets from otp size) */
#define SSB_CHIPCO_OTP_SWLIM_OFF (-8)
#define SSB_CHIPCO_OTP_CIDBASE_OFF 0
#define SSB_CHIPCO_OTP_CIDLIM_OFF 8
/* Predefined OTP words (Word offset from otp size) */
#define SSB_CHIPCO_OTP_BOUNDARY_OFF (-4)
#define SSB_CHIPCO_OTP_HWSIGN_OFF (-3)
#define SSB_CHIPCO_OTP_SWSIGN_OFF (-2)
#define SSB_CHIPCO_OTP_CIDSIGN_OFF (-1)
#define SSB_CHIPCO_OTP_CID_OFF 0
#define SSB_CHIPCO_OTP_PKG_OFF 1
#define SSB_CHIPCO_OTP_FID_OFF 2
#define SSB_CHIPCO_OTP_RSV_OFF 3
#define SSB_CHIPCO_OTP_LIM_OFF 4
#define SSB_CHIPCO_OTP_SIGNATURE 0x578A
#define SSB_CHIPCO_OTP_MAGIC 0x4E56
struct ssb_device;
struct ssb_serial_port;
/* Data for the PMU, if available.
* Check availability with ((struct ssb_chipcommon)->capabilities & SSB_CHIPCO_CAP_PMU)
*/
struct ssb_chipcommon_pmu {
u8 rev; /* PMU revision */
u32 crystalfreq; /* The active crystal frequency (in kHz) */
};
struct ssb_chipcommon {
struct ssb_device *dev;
u32 capabilities;
u32 status;
/* Fast Powerup Delay constant */
u16 fast_pwrup_delay;
struct ssb_chipcommon_pmu pmu;
};
static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
{
return (cc->dev != NULL);
}
/* Register access */
#define chipco_read32(cc, offset) ssb_read32((cc)->dev, offset)
#define chipco_write32(cc, offset, val) ssb_write32((cc)->dev, offset, val)
#define chipco_mask32(cc, offset, mask) \
chipco_write32(cc, offset, chipco_read32(cc, offset) & (mask))
#define chipco_set32(cc, offset, set) \
chipco_write32(cc, offset, chipco_read32(cc, offset) | (set))
#define chipco_maskset32(cc, offset, mask, set) \
chipco_write32(cc, offset, (chipco_read32(cc, offset) & (mask)) | (set))
extern void ssb_chipcommon_init(struct ssb_chipcommon *cc);
extern void ssb_chipco_suspend(struct ssb_chipcommon *cc);
extern void ssb_chipco_resume(struct ssb_chipcommon *cc);
extern void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m);
extern void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m);
extern void ssb_chipco_timing_init(struct ssb_chipcommon *cc,
unsigned long ns_per_cycle);
enum ssb_clkmode {
SSB_CLKMODE_SLOW,
SSB_CLKMODE_FAST,
SSB_CLKMODE_DYNAMIC,
};
extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
enum ssb_clkmode mode);
extern void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc,
u32 ticks);
void ssb_chipco_irq_mask(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_irq_status(struct ssb_chipcommon *cc, u32 mask);
/* Chipcommon GPIO pin access. */
u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask);
u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value);
#ifdef CONFIG_SSB_SERIAL
extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
struct ssb_serial_port *ports);
#endif /* CONFIG_SSB_SERIAL */
/* PMU support */
extern void ssb_pmu_init(struct ssb_chipcommon *cc);
enum ssb_pmu_ldo_volt_id {
LDO_PAREF = 0,
LDO_VOLT1,
LDO_VOLT2,
LDO_VOLT3,
};
void ssb_pmu_set_ldo_voltage(struct ssb_chipcommon *cc,
enum ssb_pmu_ldo_volt_id id, u32 voltage);
void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on);
#endif /* LINUX_SSB_CHIPCO_H_ */
external/compat-wireless/include/linux/ssb/ssb_driver_extif.h
Vendored
+214
View File
@@ -0,0 +1,214 @@
/*
* Hardware-specific External Interface I/O core definitions
* for the BCM47xx family of SiliconBackplane-based chips.
*
* The External Interface core supports a total of three external chip selects
* supporting external interfaces. One of the external chip selects is
* used for Flash, one is used for PCMCIA, and the other may be
* programmed to support either a synchronous interface or an
* asynchronous interface. The asynchronous interface can be used to
* support external devices such as UARTs and the BCM2019 Bluetooth
* baseband processor.
* The external interface core also contains 2 on-chip 16550 UARTs, clock
* frequency control, a watchdog interrupt timer, and a GPIO interface.
*
* Copyright 2005, Broadcom Corporation
* Copyright 2006, Michael Buesch
*
* Licensed under the GPL version 2. See COPYING for details.
*/
#ifndef LINUX_SSB_EXTIFCORE_H_
#define LINUX_SSB_EXTIFCORE_H_
/* external interface address space */
#define SSB_EXTIF_PCMCIA_MEMBASE(x) (x)
#define SSB_EXTIF_PCMCIA_IOBASE(x) ((x) + 0x100000)
#define SSB_EXTIF_PCMCIA_CFGBASE(x) ((x) + 0x200000)
#define SSB_EXTIF_CFGIF_BASE(x) ((x) + 0x800000)
#define SSB_EXTIF_FLASH_BASE(x) ((x) + 0xc00000)
#define SSB_EXTIF_NR_GPIOOUT 5
/* GPIO NOTE:
* The multiple instances of output and output enable registers
* are present to allow driver software for multiple cores to control
* gpio outputs without needing to share a single register pair.
* Use the following helper macro to get a register offset value.
*/
#define SSB_EXTIF_GPIO_OUT(index) ({ \
BUILD_BUG_ON(index >= SSB_EXTIF_NR_GPIOOUT); \
SSB_EXTIF_GPIO_OUT_BASE + ((index) * 8); \
})
#define SSB_EXTIF_GPIO_OUTEN(index) ({ \
BUILD_BUG_ON(index >= SSB_EXTIF_NR_GPIOOUT); \
SSB_EXTIF_GPIO_OUTEN_BASE + ((index) * 8); \
})
/** EXTIF core registers **/
#define SSB_EXTIF_CTL 0x0000
#define SSB_EXTIF_CTL_UARTEN (1 << 0) /* UART enable */
#define SSB_EXTIF_EXTSTAT 0x0004
#define SSB_EXTIF_EXTSTAT_EMODE (1 << 0) /* Endian mode (ro) */
#define SSB_EXTIF_EXTSTAT_EIRQPIN (1 << 1) /* External interrupt pin (ro) */
#define SSB_EXTIF_EXTSTAT_GPIOIRQPIN (1 << 2) /* GPIO interrupt pin (ro) */
#define SSB_EXTIF_PCMCIA_CFG 0x0010
#define SSB_EXTIF_PCMCIA_MEMWAIT 0x0014
#define SSB_EXTIF_PCMCIA_ATTRWAIT 0x0018
#define SSB_EXTIF_PCMCIA_IOWAIT 0x001C
#define SSB_EXTIF_PROG_CFG 0x0020
#define SSB_EXTIF_PROG_WAITCNT 0x0024
#define SSB_EXTIF_FLASH_CFG 0x0028
#define SSB_EXTIF_FLASH_WAITCNT 0x002C
#define SSB_EXTIF_WATCHDOG 0x0040
#define SSB_EXTIF_CLOCK_N 0x0044
#define SSB_EXTIF_CLOCK_SB 0x0048
#define SSB_EXTIF_CLOCK_PCI 0x004C
#define SSB_EXTIF_CLOCK_MII 0x0050
#define SSB_EXTIF_GPIO_IN 0x0060
#define SSB_EXTIF_GPIO_OUT_BASE 0x0064
#define SSB_EXTIF_GPIO_OUTEN_BASE 0x0068
#define SSB_EXTIF_EJTAG_OUTEN 0x0090
#define SSB_EXTIF_GPIO_INTPOL 0x0094
#define SSB_EXTIF_GPIO_INTMASK 0x0098
#define SSB_EXTIF_UART_DATA 0x0300
#define SSB_EXTIF_UART_TIMER 0x0310
#define SSB_EXTIF_UART_FCR 0x0320
#define SSB_EXTIF_UART_LCR 0x0330
#define SSB_EXTIF_UART_MCR 0x0340
#define SSB_EXTIF_UART_LSR 0x0350
#define SSB_EXTIF_UART_MSR 0x0360
#define SSB_EXTIF_UART_SCRATCH 0x0370
/* pcmcia/prog/flash_config */
#define SSB_EXTCFG_EN (1 << 0) /* enable */
#define SSB_EXTCFG_MODE 0xE /* mode */
#define SSB_EXTCFG_MODE_SHIFT 1
#define SSB_EXTCFG_MODE_FLASH 0x0 /* flash/asynchronous mode */
#define SSB_EXTCFG_MODE_SYNC 0x2 /* synchronous mode */
#define SSB_EXTCFG_MODE_PCMCIA 0x4 /* pcmcia mode */
#define SSB_EXTCFG_DS16 (1 << 4) /* destsize: 0=8bit, 1=16bit */
#define SSB_EXTCFG_BSWAP (1 << 5) /* byteswap */
#define SSB_EXTCFG_CLKDIV 0xC0 /* clock divider */
#define SSB_EXTCFG_CLKDIV_SHIFT 6
#define SSB_EXTCFG_CLKDIV_2 0x0 /* backplane/2 */
#define SSB_EXTCFG_CLKDIV_3 0x40 /* backplane/3 */
#define SSB_EXTCFG_CLKDIV_4 0x80 /* backplane/4 */
#define SSB_EXTCFG_CLKEN (1 << 8) /* clock enable */
#define SSB_EXTCFG_STROBE (1 << 9) /* size/bytestrobe (synch only) */
/* pcmcia_memwait */
#define SSB_PCMCIA_MEMW_0 0x0000003F /* waitcount0 */
#define SSB_PCMCIA_MEMW_1 0x00001F00 /* waitcount1 */
#define SSB_PCMCIA_MEMW_1_SHIFT 8
#define SSB_PCMCIA_MEMW_2 0x001F0000 /* waitcount2 */
#define SSB_PCMCIA_MEMW_2_SHIFT 16
#define SSB_PCMCIA_MEMW_3 0x1F000000 /* waitcount3 */
#define SSB_PCMCIA_MEMW_3_SHIFT 24
/* pcmcia_attrwait */
#define SSB_PCMCIA_ATTW_0 0x0000003F /* waitcount0 */
#define SSB_PCMCIA_ATTW_1 0x00001F00 /* waitcount1 */
#define SSB_PCMCIA_ATTW_1_SHIFT 8
#define SSB_PCMCIA_ATTW_2 0x001F0000 /* waitcount2 */
#define SSB_PCMCIA_ATTW_2_SHIFT 16
#define SSB_PCMCIA_ATTW_3 0x1F000000 /* waitcount3 */
#define SSB_PCMCIA_ATTW_3_SHIFT 24
/* pcmcia_iowait */
#define SSB_PCMCIA_IOW_0 0x0000003F /* waitcount0 */
#define SSB_PCMCIA_IOW_1 0x00001F00 /* waitcount1 */
#define SSB_PCMCIA_IOW_1_SHIFT 8
#define SSB_PCMCIA_IOW_2 0x001F0000 /* waitcount2 */
#define SSB_PCMCIA_IOW_2_SHIFT 16
#define SSB_PCMCIA_IOW_3 0x1F000000 /* waitcount3 */
#define SSB_PCMCIA_IOW_3_SHIFT 24
/* prog_waitcount */
#define SSB_PROG_WCNT_0 0x0000001F /* waitcount0 */
#define SSB_PROG_WCNT_1 0x00001F00 /* waitcount1 */
#define SSB_PROG_WCNT_1_SHIFT 8
#define SSB_PROG_WCNT_2 0x001F0000 /* waitcount2 */
#define SSB_PROG_WCNT_2_SHIFT 16
#define SSB_PROG_WCNT_3 0x1F000000 /* waitcount3 */
#define SSB_PROG_WCNT_3_SHIFT 24
#define SSB_PROG_W0 0x0000000C
#define SSB_PROG_W1 0x00000A00
#define SSB_PROG_W2 0x00020000
#define SSB_PROG_W3 0x01000000
/* flash_waitcount */
#define SSB_FLASH_WCNT_0 0x0000001F /* waitcount0 */
#define SSB_FLASH_WCNT_1 0x00001F00 /* waitcount1 */
#define SSB_FLASH_WCNT_1_SHIFT 8
#define SSB_FLASH_WCNT_2 0x001F0000 /* waitcount2 */
#define SSB_FLASH_WCNT_2_SHIFT 16
#define SSB_FLASH_WCNT_3 0x1F000000 /* waitcount3 */
#define SSB_FLASH_WCNT_3_SHIFT 24
/* watchdog */
#define SSB_EXTIF_WATCHDOG_CLK 48000000 /* Hz */
#ifdef CONFIG_SSB_DRIVER_EXTIF
struct ssb_extif {
struct ssb_device *dev;
};
static inline bool ssb_extif_available(struct ssb_extif *extif)
{
return (extif->dev != NULL);
}
extern void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
u32 *plltype, u32 *n, u32 *m);
extern void ssb_extif_timing_init(struct ssb_extif *extif,
unsigned long ns);
extern void ssb_extif_watchdog_timer_set(struct ssb_extif *extif,
u32 ticks);
/* Extif GPIO pin access */
u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask);
u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value);
#ifdef CONFIG_SSB_SERIAL
extern int ssb_extif_serial_init(struct ssb_extif *extif,
struct ssb_serial_port *ports);
#endif /* CONFIG_SSB_SERIAL */
#else /* CONFIG_SSB_DRIVER_EXTIF */
/* extif disabled */
struct ssb_extif {
};
static inline bool ssb_extif_available(struct ssb_extif *extif)
{
return 0;
}
static inline
void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
u32 *plltype, u32 *n, u32 *m)
{
}
static inline
void ssb_extif_watchdog_timer_set(struct ssb_extif *extif,
u32 ticks)
{
}
#endif /* CONFIG_SSB_DRIVER_EXTIF */
#endif /* LINUX_SSB_EXTIFCORE_H_ */
external/compat-wireless/include/linux/ssb/ssb_driver_gige.h
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#ifndef LINUX_SSB_DRIVER_GIGE_H_
#define LINUX_SSB_DRIVER_GIGE_H_
#include <linux/ssb/ssb.h>
#include <linux/bug.h>
#include <linux/pci.h>
#include <linux/spinlock.h>
#ifdef CONFIG_SSB_DRIVER_GIGE
#define SSB_GIGE_PCIIO 0x0000 /* PCI I/O Registers (1024 bytes) */
#define SSB_GIGE_RESERVED 0x0400 /* Reserved (1024 bytes) */
#define SSB_GIGE_PCICFG 0x0800 /* PCI config space (256 bytes) */
#define SSB_GIGE_SHIM_FLUSHSTAT 0x0C00 /* PCI to OCP: Flush status control (32bit) */
#define SSB_GIGE_SHIM_FLUSHRDA 0x0C04 /* PCI to OCP: Flush read address (32bit) */
#define SSB_GIGE_SHIM_FLUSHTO 0x0C08 /* PCI to OCP: Flush timeout counter (32bit) */
#define SSB_GIGE_SHIM_BARRIER 0x0C0C /* PCI to OCP: Barrier register (32bit) */
#define SSB_GIGE_SHIM_MAOCPSI 0x0C10 /* PCI to OCP: MaocpSI Control (32bit) */
#define SSB_GIGE_SHIM_SIOCPMA 0x0C14 /* PCI to OCP: SiocpMa Control (32bit) */
/* TM Status High flags */
#define SSB_GIGE_TMSHIGH_RGMII 0x00010000 /* Have an RGMII PHY-bus */
/* TM Status Low flags */
#define SSB_GIGE_TMSLOW_TXBYPASS 0x00080000 /* TX bypass (no delay) */
#define SSB_GIGE_TMSLOW_RXBYPASS 0x00100000 /* RX bypass (no delay) */
#define SSB_GIGE_TMSLOW_DLLEN 0x01000000 /* Enable DLL controls */
/* Boardflags (low) */
#define SSB_GIGE_BFL_ROBOSWITCH 0x0010
#define SSB_GIGE_MEM_RES_NAME "SSB Broadcom 47xx GigE memory"
#define SSB_GIGE_IO_RES_NAME "SSB Broadcom 47xx GigE I/O"
struct ssb_gige {
struct ssb_device *dev;
spinlock_t lock;
/* True, if the device has an RGMII bus.
* False, if the device has a GMII bus. */
bool has_rgmii;
/* The PCI controller device. */
struct pci_controller pci_controller;
struct pci_ops pci_ops;
struct resource mem_resource;
struct resource io_resource;
};
/* Check whether a PCI device is a SSB Gigabit Ethernet core. */
extern bool pdev_is_ssb_gige_core(struct pci_dev *pdev);
/* Convert a pci_dev pointer to a ssb_gige pointer. */
static inline struct ssb_gige * pdev_to_ssb_gige(struct pci_dev *pdev)
{
if (!pdev_is_ssb_gige_core(pdev))
return NULL;
return container_of(pdev->bus->ops, struct ssb_gige, pci_ops);
}
/* Returns whether the PHY is connected by an RGMII bus. */
static inline bool ssb_gige_is_rgmii(struct pci_dev *pdev)
{
struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
return (dev ? dev->has_rgmii : 0);
}
/* Returns whether we have a Roboswitch. */
static inline bool ssb_gige_have_roboswitch(struct pci_dev *pdev)
{
struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
if (dev)
return !!(dev->dev->bus->sprom.boardflags_lo &
SSB_GIGE_BFL_ROBOSWITCH);
return 0;
}
/* Returns whether we can only do one DMA at once. */
static inline bool ssb_gige_one_dma_at_once(struct pci_dev *pdev)
{
struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
if (dev)
return ((dev->dev->bus->chip_id == 0x4785) &&
(dev->dev->bus->chip_rev < 2));
return 0;
}
/* Returns whether we must flush posted writes. */
static inline bool ssb_gige_must_flush_posted_writes(struct pci_dev *pdev)
{
struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
if (dev)
return (dev->dev->bus->chip_id == 0x4785);
return 0;
}
#ifdef CONFIG_BCM47XX
#include <asm/mach-bcm47xx/nvram.h>
/* Get the device MAC address */
static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
{
char buf[20];
if (nvram_getenv("et0macaddr", buf, sizeof(buf)) < 0)
return;
nvram_parse_macaddr(buf, macaddr);
}
#else
static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
{
}
#endif
extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
struct pci_dev *pdev);
extern int ssb_gige_map_irq(struct ssb_device *sdev,
const struct pci_dev *pdev);
/* The GigE driver is not a standalone module, because we don't have support
* for unregistering the driver. So we could not unload the module anyway. */
extern int ssb_gige_init(void);
static inline void ssb_gige_exit(void)
{
/* Currently we can not unregister the GigE driver,
* because we can not unregister the PCI bridge. */
BUG();
}
#else /* CONFIG_SSB_DRIVER_GIGE */
/* Gigabit Ethernet driver disabled */
static inline int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
struct pci_dev *pdev)
{
return -ENOSYS;
}
static inline int ssb_gige_map_irq(struct ssb_device *sdev,
const struct pci_dev *pdev)
{
return -ENOSYS;
}
static inline int ssb_gige_init(void)
{
return 0;
}
static inline void ssb_gige_exit(void)
{
}
static inline bool pdev_is_ssb_gige_core(struct pci_dev *pdev)
{
return 0;
}
static inline struct ssb_gige * pdev_to_ssb_gige(struct pci_dev *pdev)
{
return NULL;
}
static inline bool ssb_gige_is_rgmii(struct pci_dev *pdev)
{
return 0;
}
static inline bool ssb_gige_have_roboswitch(struct pci_dev *pdev)
{
return 0;
}
static inline bool ssb_gige_one_dma_at_once(struct pci_dev *pdev)
{
return 0;
}
static inline bool ssb_gige_must_flush_posted_writes(struct pci_dev *pdev)
{
return 0;
}
#endif /* CONFIG_SSB_DRIVER_GIGE */
#endif /* LINUX_SSB_DRIVER_GIGE_H_ */
external/compat-wireless/include/linux/ssb/ssb_driver_mips.h
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#ifndef LINUX_SSB_MIPSCORE_H_
#define LINUX_SSB_MIPSCORE_H_
#ifdef CONFIG_SSB_DRIVER_MIPS
struct ssb_device;
struct ssb_serial_port {
void *regs;
unsigned long clockspeed;
unsigned int irq;
unsigned int baud_base;
unsigned int reg_shift;
};
struct ssb_mipscore {
struct ssb_device *dev;
int nr_serial_ports;
struct ssb_serial_port serial_ports[4];
u8 flash_buswidth;
u32 flash_window;
u32 flash_window_size;
};
extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
extern u32 ssb_cpu_clock(struct ssb_mipscore *mcore);
extern unsigned int ssb_mips_irq(struct ssb_device *dev);
#else /* CONFIG_SSB_DRIVER_MIPS */
struct ssb_mipscore {
};
static inline
void ssb_mipscore_init(struct ssb_mipscore *mcore)
{
}
#endif /* CONFIG_SSB_DRIVER_MIPS */
#endif /* LINUX_SSB_MIPSCORE_H_ */
external/compat-wireless/include/linux/ssb/ssb_driver_pci.h
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#ifndef LINUX_SSB_PCICORE_H_
#define LINUX_SSB_PCICORE_H_
#include <linux/types.h>
struct pci_dev;
#ifdef CONFIG_SSB_DRIVER_PCICORE
/* PCI core registers. */
#define SSB_PCICORE_CTL 0x0000 /* PCI Control */
#define SSB_PCICORE_CTL_RST_OE 0x00000001 /* PCI_RESET Output Enable */
#define SSB_PCICORE_CTL_RST 0x00000002 /* PCI_RESET driven out to pin */
#define SSB_PCICORE_CTL_CLK_OE 0x00000004 /* Clock gate Output Enable */
#define SSB_PCICORE_CTL_CLK 0x00000008 /* Gate for clock driven out to pin */
#define SSB_PCICORE_ARBCTL 0x0010 /* PCI Arbiter Control */
#define SSB_PCICORE_ARBCTL_INTERN 0x00000001 /* Use internal arbiter */
#define SSB_PCICORE_ARBCTL_EXTERN 0x00000002 /* Use external arbiter */
#define SSB_PCICORE_ARBCTL_PARKID 0x00000006 /* Mask, selects which agent is parked on an idle bus */
#define SSB_PCICORE_ARBCTL_PARKID_LAST 0x00000000 /* Last requestor */
#define SSB_PCICORE_ARBCTL_PARKID_4710 0x00000002 /* 4710 */
#define SSB_PCICORE_ARBCTL_PARKID_EXT0 0x00000004 /* External requestor 0 */
#define SSB_PCICORE_ARBCTL_PARKID_EXT1 0x00000006 /* External requestor 1 */
#define SSB_PCICORE_ISTAT 0x0020 /* Interrupt status */
#define SSB_PCICORE_ISTAT_INTA 0x00000001 /* PCI INTA# */
#define SSB_PCICORE_ISTAT_INTB 0x00000002 /* PCI INTB# */
#define SSB_PCICORE_ISTAT_SERR 0x00000004 /* PCI SERR# (write to clear) */
#define SSB_PCICORE_ISTAT_PERR 0x00000008 /* PCI PERR# (write to clear) */
#define SSB_PCICORE_ISTAT_PME 0x00000010 /* PCI PME# */
#define SSB_PCICORE_IMASK 0x0024 /* Interrupt mask */
#define SSB_PCICORE_IMASK_INTA 0x00000001 /* PCI INTA# */
#define SSB_PCICORE_IMASK_INTB 0x00000002 /* PCI INTB# */
#define SSB_PCICORE_IMASK_SERR 0x00000004 /* PCI SERR# */
#define SSB_PCICORE_IMASK_PERR 0x00000008 /* PCI PERR# */
#define SSB_PCICORE_IMASK_PME 0x00000010 /* PCI PME# */
#define SSB_PCICORE_MBOX 0x0028 /* Backplane to PCI Mailbox */
#define SSB_PCICORE_MBOX_F0_0 0x00000100 /* PCI function 0, INT 0 */
#define SSB_PCICORE_MBOX_F0_1 0x00000200 /* PCI function 0, INT 1 */
#define SSB_PCICORE_MBOX_F1_0 0x00000400 /* PCI function 1, INT 0 */
#define SSB_PCICORE_MBOX_F1_1 0x00000800 /* PCI function 1, INT 1 */
#define SSB_PCICORE_MBOX_F2_0 0x00001000 /* PCI function 2, INT 0 */
#define SSB_PCICORE_MBOX_F2_1 0x00002000 /* PCI function 2, INT 1 */
#define SSB_PCICORE_MBOX_F3_0 0x00004000 /* PCI function 3, INT 0 */
#define SSB_PCICORE_MBOX_F3_1 0x00008000 /* PCI function 3, INT 1 */
#define SSB_PCICORE_BCAST_ADDR 0x0050 /* Backplane Broadcast Address */
#define SSB_PCICORE_BCAST_ADDR_MASK 0x000000FF
#define SSB_PCICORE_BCAST_DATA 0x0054 /* Backplane Broadcast Data */
#define SSB_PCICORE_GPIO_IN 0x0060 /* rev >= 2 only */
#define SSB_PCICORE_GPIO_OUT 0x0064 /* rev >= 2 only */
#define SSB_PCICORE_GPIO_ENABLE 0x0068 /* rev >= 2 only */
#define SSB_PCICORE_GPIO_CTL 0x006C /* rev >= 2 only */
#define SSB_PCICORE_SBTOPCI0 0x0100 /* Backplane to PCI translation 0 (sbtopci0) */
#define SSB_PCICORE_SBTOPCI0_MASK 0xFC000000
#define SSB_PCICORE_SBTOPCI1 0x0104 /* Backplane to PCI translation 1 (sbtopci1) */
#define SSB_PCICORE_SBTOPCI1_MASK 0xFC000000
#define SSB_PCICORE_SBTOPCI2 0x0108 /* Backplane to PCI translation 2 (sbtopci2) */
#define SSB_PCICORE_SBTOPCI2_MASK 0xC0000000
#define SSB_PCICORE_PCICFG0 0x0400 /* PCI config space 0 (rev >= 8) */
#define SSB_PCICORE_PCICFG1 0x0500 /* PCI config space 1 (rev >= 8) */
#define SSB_PCICORE_PCICFG2 0x0600 /* PCI config space 2 (rev >= 8) */
#define SSB_PCICORE_PCICFG3 0x0700 /* PCI config space 3 (rev >= 8) */
#define SSB_PCICORE_SPROM(wordoffset) (0x0800 + ((wordoffset) * 2)) /* SPROM shadow area (72 bytes) */
/* SBtoPCIx */
#define SSB_PCICORE_SBTOPCI_MEM 0x00000000
#define SSB_PCICORE_SBTOPCI_IO 0x00000001
#define SSB_PCICORE_SBTOPCI_CFG0 0x00000002
#define SSB_PCICORE_SBTOPCI_CFG1 0x00000003
#define SSB_PCICORE_SBTOPCI_PREF 0x00000004 /* Prefetch enable */
#define SSB_PCICORE_SBTOPCI_BURST 0x00000008 /* Burst enable */
#define SSB_PCICORE_SBTOPCI_MRM 0x00000020 /* Memory Read Multiple */
#define SSB_PCICORE_SBTOPCI_RC 0x00000030 /* Read Command mask (rev >= 11) */
#define SSB_PCICORE_SBTOPCI_RC_READ 0x00000000 /* Memory read */
#define SSB_PCICORE_SBTOPCI_RC_READL 0x00000010 /* Memory read line */
#define SSB_PCICORE_SBTOPCI_RC_READM 0x00000020 /* Memory read multiple */
/* PCIcore specific boardflags */
#define SSB_PCICORE_BFL_NOPCI 0x00000400 /* Board leaves PCI floating */
struct ssb_pcicore {
struct ssb_device *dev;
u8 setup_done:1;
u8 hostmode:1;
u8 cardbusmode:1;
};
extern void ssb_pcicore_init(struct ssb_pcicore *pc);
/* Enable IRQ routing for a specific device */
extern int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,
struct ssb_device *dev);
int ssb_pcicore_plat_dev_init(struct pci_dev *d);
int ssb_pcicore_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
#else /* CONFIG_SSB_DRIVER_PCICORE */
struct ssb_pcicore {
};
static inline
void ssb_pcicore_init(struct ssb_pcicore *pc)
{
}
static inline
int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,
struct ssb_device *dev)
{
return 0;
}
static inline
int ssb_pcicore_plat_dev_init(struct pci_dev *d)
{
return -ENODEV;
}
static inline
int ssb_pcicore_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
return -ENODEV;
}
#endif /* CONFIG_SSB_DRIVER_PCICORE */
#endif /* LINUX_SSB_PCICORE_H_ */
external/compat-wireless/include/linux/ssb/ssb_embedded.h
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#ifndef LINUX_SSB_EMBEDDED_H_
#define LINUX_SSB_EMBEDDED_H_
#include <linux/types.h>
#include <linux/ssb/ssb.h>
extern int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks);
/* Generic GPIO API */
u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask);
u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value);
u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value);
u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value);
u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value);
u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value);
#endif /* LINUX_SSB_EMBEDDED_H_ */
external/compat-wireless/include/linux/ssb/ssb_regs.h
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#ifndef LINUX_SSB_REGS_H_
#define LINUX_SSB_REGS_H_
/* SiliconBackplane Address Map.
* All regions may not exist on all chips.
*/
#define SSB_SDRAM_BASE 0x00000000U /* Physical SDRAM */
#define SSB_PCI_MEM 0x08000000U /* Host Mode sb2pcitranslation0 (64 MB) */
#define SSB_PCI_CFG 0x0c000000U /* Host Mode sb2pcitranslation1 (64 MB) */
#define SSB_SDRAM_SWAPPED 0x10000000U /* Byteswapped Physical SDRAM */
#define SSB_ENUM_BASE 0x18000000U /* Enumeration space base */
#define SSB_ENUM_LIMIT 0x18010000U /* Enumeration space limit */
#define SSB_FLASH2 0x1c000000U /* Flash Region 2 (region 1 shadowed here) */
#define SSB_FLASH2_SZ 0x02000000U /* Size of Flash Region 2 */
#define SSB_EXTIF_BASE 0x1f000000U /* External Interface region base address */
#define SSB_FLASH1 0x1fc00000U /* Flash Region 1 */
#define SSB_FLASH1_SZ 0x00400000U /* Size of Flash Region 1 */
#define SSB_PCI_DMA 0x40000000U /* Client Mode sb2pcitranslation2 (1 GB) */
#define SSB_PCI_DMA_SZ 0x40000000U /* Client Mode sb2pcitranslation2 size in bytes */
#define SSB_PCIE_DMA_L32 0x00000000U /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), low 32 bits */
#define SSB_PCIE_DMA_H32 0x80000000U /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), high 32 bits */
#define SSB_EUART (SSB_EXTIF_BASE + 0x00800000)
#define SSB_LED (SSB_EXTIF_BASE + 0x00900000)
/* Enumeration space constants */
#define SSB_CORE_SIZE 0x1000 /* Size of a core MMIO area */
#define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE)
/* mips address */
#define SSB_EJTAG 0xff200000 /* MIPS EJTAG space (2M) */
/* SSB PCI config space registers. */
#define SSB_PMCSR 0x44
#define SSB_PE 0x100
#define SSB_BAR0_WIN 0x80 /* Backplane address space 0 */
#define SSB_BAR1_WIN 0x84 /* Backplane address space 1 */
#define SSB_SPROMCTL 0x88 /* SPROM control */
#define SSB_SPROMCTL_WE 0x10 /* SPROM write enable */
#define SSB_BAR1_CONTROL 0x8c /* Address space 1 burst control */
#define SSB_PCI_IRQS 0x90 /* PCI interrupts */
#define SSB_PCI_IRQMASK 0x94 /* PCI IRQ control and mask (pcirev >= 6 only) */
#define SSB_BACKPLANE_IRQS 0x98 /* Backplane Interrupts */
#define SSB_GPIO_IN 0xB0 /* GPIO Input (pcirev >= 3 only) */
#define SSB_GPIO_OUT 0xB4 /* GPIO Output (pcirev >= 3 only) */
#define SSB_GPIO_OUT_ENABLE 0xB8 /* GPIO Output Enable/Disable (pcirev >= 3 only) */
#define SSB_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */
#define SSB_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */
#define SSB_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */
#define SSB_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */
#define SSB_BAR0_MAX_RETRIES 50
/* Silicon backplane configuration register definitions */
#define SSB_IPSFLAG 0x0F08
#define SSB_IPSFLAG_IRQ1 0x0000003F /* which sbflags get routed to mips interrupt 1 */
#define SSB_IPSFLAG_IRQ1_SHIFT 0
#define SSB_IPSFLAG_IRQ2 0x00003F00 /* which sbflags get routed to mips interrupt 2 */
#define SSB_IPSFLAG_IRQ2_SHIFT 8
#define SSB_IPSFLAG_IRQ3 0x003F0000 /* which sbflags get routed to mips interrupt 3 */
#define SSB_IPSFLAG_IRQ3_SHIFT 16
#define SSB_IPSFLAG_IRQ4 0x3F000000 /* which sbflags get routed to mips interrupt 4 */
#define SSB_IPSFLAG_IRQ4_SHIFT 24
#define SSB_TPSFLAG 0x0F18
#define SSB_TPSFLAG_BPFLAG 0x0000003F /* Backplane flag # */
#define SSB_TPSFLAG_ALWAYSIRQ 0x00000040 /* IRQ is always sent on the Backplane */
#define SSB_TMERRLOGA 0x0F48
#define SSB_TMERRLOG 0x0F50
#define SSB_ADMATCH3 0x0F60
#define SSB_ADMATCH2 0x0F68
#define SSB_ADMATCH1 0x0F70
#define SSB_IMSTATE 0x0F90 /* SB Initiator Agent State */
#define SSB_IMSTATE_PC 0x0000000f /* Pipe Count */
#define SSB_IMSTATE_AP_MASK 0x00000030 /* Arbitration Priority */
#define SSB_IMSTATE_AP_BOTH 0x00000000 /* Use both timeslices and token */
#define SSB_IMSTATE_AP_TS 0x00000010 /* Use timeslices only */
#define SSB_IMSTATE_AP_TK 0x00000020 /* Use token only */
#define SSB_IMSTATE_AP_RSV 0x00000030 /* Reserved */
#define SSB_IMSTATE_IBE 0x00020000 /* In Band Error */
#define SSB_IMSTATE_TO 0x00040000 /* Timeout */
#define SSB_IMSTATE_BUSY 0x01800000 /* Busy (Backplane rev >= 2.3 only) */
#define SSB_IMSTATE_REJECT 0x02000000 /* Reject (Backplane rev >= 2.3 only) */
#define SSB_INTVEC 0x0F94 /* SB Interrupt Mask */
#define SSB_INTVEC_PCI 0x00000001 /* Enable interrupts for PCI */
#define SSB_INTVEC_ENET0 0x00000002 /* Enable interrupts for enet 0 */
#define SSB_INTVEC_ILINE20 0x00000004 /* Enable interrupts for iline20 */
#define SSB_INTVEC_CODEC 0x00000008 /* Enable interrupts for v90 codec */
#define SSB_INTVEC_USB 0x00000010 /* Enable interrupts for usb */
#define SSB_INTVEC_EXTIF 0x00000020 /* Enable interrupts for external i/f */
#define SSB_INTVEC_ENET1 0x00000040 /* Enable interrupts for enet 1 */
#define SSB_TMSLOW 0x0F98 /* SB Target State Low */
#define SSB_TMSLOW_RESET 0x00000001 /* Reset */
#define SSB_TMSLOW_REJECT 0x00000002 /* Reject (Standard Backplane) */
#define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */
#define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */
#define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */
#define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */
#define SSB_TMSLOW_BE 0x80000000 /* BIST Enable */
#define SSB_TMSHIGH 0x0F9C /* SB Target State High */
#define SSB_TMSHIGH_SERR 0x00000001 /* S-error */
#define SSB_TMSHIGH_INT 0x00000002 /* Interrupt */
#define SSB_TMSHIGH_BUSY 0x00000004 /* Busy */
#define SSB_TMSHIGH_TO 0x00000020 /* Timeout. Backplane rev >= 2.3 only */
#define SSB_TMSHIGH_COREFL 0x1FFF0000 /* Core specific flags */
#define SSB_TMSHIGH_COREFL_SHIFT 16
#define SSB_TMSHIGH_DMA64 0x10000000 /* 64bit DMA supported */
#define SSB_TMSHIGH_GCR 0x20000000 /* Gated Clock Request */
#define SSB_TMSHIGH_BISTF 0x40000000 /* BIST Failed */
#define SSB_TMSHIGH_BISTD 0x80000000 /* BIST Done */
#define SSB_BWA0 0x0FA0
#define SSB_IMCFGLO 0x0FA8
#define SSB_IMCFGLO_SERTO 0x00000007 /* Service timeout */
#define SSB_IMCFGLO_REQTO 0x00000070 /* Request timeout */
#define SSB_IMCFGLO_REQTO_SHIFT 4
#define SSB_IMCFGLO_CONNID 0x00FF0000 /* Connection ID */
#define SSB_IMCFGLO_CONNID_SHIFT 16
#define SSB_IMCFGHI 0x0FAC
#define SSB_ADMATCH0 0x0FB0
#define SSB_TMCFGLO 0x0FB8
#define SSB_TMCFGHI 0x0FBC
#define SSB_BCONFIG 0x0FC0
#define SSB_BSTATE 0x0FC8
#define SSB_ACTCFG 0x0FD8
#define SSB_FLAGST 0x0FE8
#define SSB_IDLOW 0x0FF8
#define SSB_IDLOW_CFGSP 0x00000003 /* Config Space */
#define SSB_IDLOW_ADDRNGE 0x00000038 /* Address Ranges supported */
#define SSB_IDLOW_ADDRNGE_SHIFT 3
#define SSB_IDLOW_SYNC 0x00000040
#define SSB_IDLOW_INITIATOR 0x00000080
#define SSB_IDLOW_MIBL 0x00000F00 /* Minimum Backplane latency */
#define SSB_IDLOW_MIBL_SHIFT 8
#define SSB_IDLOW_MABL 0x0000F000 /* Maximum Backplane latency */
#define SSB_IDLOW_MABL_SHIFT 12
#define SSB_IDLOW_TIF 0x00010000 /* This Initiator is first */
#define SSB_IDLOW_CCW 0x000C0000 /* Cycle counter width */
#define SSB_IDLOW_CCW_SHIFT 18
#define SSB_IDLOW_TPT 0x00F00000 /* Target ports */
#define SSB_IDLOW_TPT_SHIFT 20
#define SSB_IDLOW_INITP 0x0F000000 /* Initiator ports */
#define SSB_IDLOW_INITP_SHIFT 24
#define SSB_IDLOW_SSBREV 0xF0000000 /* Sonics Backplane Revision code */
#define SSB_IDLOW_SSBREV_22 0x00000000 /* <= 2.2 */
#define SSB_IDLOW_SSBREV_23 0x10000000 /* 2.3 */
#define SSB_IDLOW_SSBREV_24 0x40000000 /* ?? Found in BCM4328 */
#define SSB_IDLOW_SSBREV_25 0x50000000 /* ?? Not Found yet */
#define SSB_IDLOW_SSBREV_26 0x60000000 /* ?? Found in some BCM4311/2 */
#define SSB_IDLOW_SSBREV_27 0x70000000 /* ?? Found in some BCM4311/2 */
#define SSB_IDHIGH 0x0FFC /* SB Identification High */
#define SSB_IDHIGH_RCLO 0x0000000F /* Revision Code (low part) */
#define SSB_IDHIGH_CC 0x00008FF0 /* Core Code */
#define SSB_IDHIGH_CC_SHIFT 4
#define SSB_IDHIGH_RCHI 0x00007000 /* Revision Code (high part) */
#define SSB_IDHIGH_RCHI_SHIFT 8 /* yes, shift 8 is right */
#define SSB_IDHIGH_VC 0xFFFF0000 /* Vendor Code */
#define SSB_IDHIGH_VC_SHIFT 16
/* SPROM shadow area. If not otherwise noted, fields are
* two bytes wide. Note that the SPROM can _only_ be read
* in two-byte quantities.
*/
#define SSB_SPROMSIZE_WORDS 64
#define SSB_SPROMSIZE_BYTES (SSB_SPROMSIZE_WORDS * sizeof(u16))
#define SSB_SPROMSIZE_WORDS_R123 64
#define SSB_SPROMSIZE_WORDS_R4 220
#define SSB_SPROMSIZE_BYTES_R123 (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
#define SSB_SPROMSIZE_BYTES_R4 (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
#define SSB_SPROM_BASE1 0x1000
#define SSB_SPROM_BASE31 0x0800
#define SSB_SPROM_REVISION 0x007E
#define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */
#define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */
#define SSB_SPROM_REVISION_CRC_SHIFT 8
/* SPROM Revision 1 */
#define SSB_SPROM1_SPID 0x0004 /* Subsystem Product ID for PCI */
#define SSB_SPROM1_SVID 0x0006 /* Subsystem Vendor ID for PCI */
#define SSB_SPROM1_PID 0x0008 /* Product ID for PCI */
#define SSB_SPROM1_IL0MAC 0x0048 /* 6 bytes MAC address for 802.11b/g */
#define SSB_SPROM1_ET0MAC 0x004E /* 6 bytes MAC address for Ethernet */
#define SSB_SPROM1_ET1MAC 0x0054 /* 6 bytes MAC address for 802.11a */
#define SSB_SPROM1_ETHPHY 0x005A /* Ethernet PHY settings */
#define SSB_SPROM1_ETHPHY_ET0A 0x001F /* MII Address for enet0 */
#define SSB_SPROM1_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */
#define SSB_SPROM1_ETHPHY_ET1A_SHIFT 5
#define SSB_SPROM1_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
#define SSB_SPROM1_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
#define SSB_SPROM1_BINF 0x005C /* Board info */
#define SSB_SPROM1_BINF_BREV 0x00FF /* Board Revision */
#define SSB_SPROM1_BINF_CCODE 0x0F00 /* Country Code */
#define SSB_SPROM1_BINF_CCODE_SHIFT 8
#define SSB_SPROM1_BINF_ANTBG 0x3000 /* Available B-PHY and G-PHY antennas */
#define SSB_SPROM1_BINF_ANTBG_SHIFT 12
#define SSB_SPROM1_BINF_ANTA 0xC000 /* Available A-PHY antennas */
#define SSB_SPROM1_BINF_ANTA_SHIFT 14
#define SSB_SPROM1_PA0B0 0x005E
#define SSB_SPROM1_PA0B1 0x0060
#define SSB_SPROM1_PA0B2 0x0062
#define SSB_SPROM1_GPIOA 0x0064 /* General Purpose IO pins 0 and 1 */
#define SSB_SPROM1_GPIOA_P0 0x00FF /* Pin 0 */
#define SSB_SPROM1_GPIOA_P1 0xFF00 /* Pin 1 */
#define SSB_SPROM1_GPIOA_P1_SHIFT 8
#define SSB_SPROM1_GPIOB 0x0066 /* General Purpuse IO pins 2 and 3 */
#define SSB_SPROM1_GPIOB_P2 0x00FF /* Pin 2 */
#define SSB_SPROM1_GPIOB_P3 0xFF00 /* Pin 3 */
#define SSB_SPROM1_GPIOB_P3_SHIFT 8
#define SSB_SPROM1_MAXPWR 0x0068 /* Power Amplifier Max Power */
#define SSB_SPROM1_MAXPWR_BG 0x00FF /* B-PHY and G-PHY (in dBm Q5.2) */
#define SSB_SPROM1_MAXPWR_A 0xFF00 /* A-PHY (in dBm Q5.2) */
#define SSB_SPROM1_MAXPWR_A_SHIFT 8
#define SSB_SPROM1_PA1B0 0x006A
#define SSB_SPROM1_PA1B1 0x006C
#define SSB_SPROM1_PA1B2 0x006E
#define SSB_SPROM1_ITSSI 0x0070 /* Idle TSSI Target */
#define SSB_SPROM1_ITSSI_BG 0x00FF /* B-PHY and G-PHY*/
#define SSB_SPROM1_ITSSI_A 0xFF00 /* A-PHY */
#define SSB_SPROM1_ITSSI_A_SHIFT 8
#define SSB_SPROM1_BFLLO 0x0072 /* Boardflags (low 16 bits) */
#define SSB_SPROM1_AGAIN 0x0074 /* Antenna Gain (in dBm Q5.2) */
#define SSB_SPROM1_AGAIN_BG 0x00FF /* B-PHY and G-PHY */
#define SSB_SPROM1_AGAIN_BG_SHIFT 0
#define SSB_SPROM1_AGAIN_A 0xFF00 /* A-PHY */
#define SSB_SPROM1_AGAIN_A_SHIFT 8
#define SSB_SPROM1_CCODE 0x0076
/* SPROM Revision 2 (inherits from rev 1) */
#define SSB_SPROM2_BFLHI 0x0038 /* Boardflags (high 16 bits) */
#define SSB_SPROM2_MAXP_A 0x003A /* A-PHY Max Power */
#define SSB_SPROM2_MAXP_A_HI 0x00FF /* Max Power High */
#define SSB_SPROM2_MAXP_A_LO 0xFF00 /* Max Power Low */
#define SSB_SPROM2_MAXP_A_LO_SHIFT 8
#define SSB_SPROM2_PA1LOB0 0x003C /* A-PHY PowerAmplifier Low Settings */
#define SSB_SPROM2_PA1LOB1 0x003E /* A-PHY PowerAmplifier Low Settings */
#define SSB_SPROM2_PA1LOB2 0x0040 /* A-PHY PowerAmplifier Low Settings */
#define SSB_SPROM2_PA1HIB0 0x0042 /* A-PHY PowerAmplifier High Settings */
#define SSB_SPROM2_PA1HIB1 0x0044 /* A-PHY PowerAmplifier High Settings */
#define SSB_SPROM2_PA1HIB2 0x0046 /* A-PHY PowerAmplifier High Settings */
#define SSB_SPROM2_OPO 0x0078 /* OFDM Power Offset from CCK Level */
#define SSB_SPROM2_OPO_VALUE 0x00FF
#define SSB_SPROM2_OPO_UNUSED 0xFF00
#define SSB_SPROM2_CCODE 0x007C /* Two char Country Code */
/* SPROM Revision 3 (inherits most data from rev 2) */
#define SSB_SPROM3_OFDMAPO 0x002C /* A-PHY OFDM Mid Power Offset (4 bytes, BigEndian) */
#define SSB_SPROM3_OFDMALPO 0x0030 /* A-PHY OFDM Low Power Offset (4 bytes, BigEndian) */
#define SSB_SPROM3_OFDMAHPO 0x0034 /* A-PHY OFDM High Power Offset (4 bytes, BigEndian) */
#define SSB_SPROM3_GPIOLDC 0x0042 /* GPIO LED Powersave Duty Cycle (4 bytes, BigEndian) */
#define SSB_SPROM3_GPIOLDC_OFF 0x0000FF00 /* Off Count */
#define SSB_SPROM3_GPIOLDC_OFF_SHIFT 8
#define SSB_SPROM3_GPIOLDC_ON 0x00FF0000 /* On Count */
#define SSB_SPROM3_GPIOLDC_ON_SHIFT 16
#define SSB_SPROM3_IL0MAC 0x004A /* 6 bytes MAC address for 802.11b/g */
#define SSB_SPROM3_CCKPO 0x0078 /* CCK Power Offset */
#define SSB_SPROM3_CCKPO_1M 0x000F /* 1M Rate PO */
#define SSB_SPROM3_CCKPO_2M 0x00F0 /* 2M Rate PO */
#define SSB_SPROM3_CCKPO_2M_SHIFT 4
#define SSB_SPROM3_CCKPO_55M 0x0F00 /* 5.5M Rate PO */
#define SSB_SPROM3_CCKPO_55M_SHIFT 8
#define SSB_SPROM3_CCKPO_11M 0xF000 /* 11M Rate PO */
#define SSB_SPROM3_CCKPO_11M_SHIFT 12
#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
/* SPROM Revision 4 */
#define SSB_SPROM4_BOARDREV 0x0042 /* Board revision */
#define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */
#define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */
#define SSB_SPROM4_BFL2LO 0x0048 /* Board flags 2 (low 16 bits) */
#define SSB_SPROM4_BFL2HI 0x004A /* Board flags 2 Hi */
#define SSB_SPROM4_IL0MAC 0x004C /* 6 byte MAC address for a/b/g/n */
#define SSB_SPROM4_CCODE 0x0052 /* Country Code (2 bytes) */
#define SSB_SPROM4_GPIOA 0x0056 /* Gen. Purpose IO # 0 and 1 */
#define SSB_SPROM4_GPIOA_P0 0x00FF /* Pin 0 */
#define SSB_SPROM4_GPIOA_P1 0xFF00 /* Pin 1 */
#define SSB_SPROM4_GPIOA_P1_SHIFT 8
#define SSB_SPROM4_GPIOB 0x0058 /* Gen. Purpose IO # 2 and 3 */
#define SSB_SPROM4_GPIOB_P2 0x00FF /* Pin 2 */
#define SSB_SPROM4_GPIOB_P3 0xFF00 /* Pin 3 */
#define SSB_SPROM4_GPIOB_P3_SHIFT 8
#define SSB_SPROM4_ETHPHY 0x005A /* Ethernet PHY settings ?? */
#define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */
#define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */
#define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5
#define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
#define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
#define SSB_SPROM4_ANTAVAIL 0x005D /* Antenna available bitfields */
#define SSB_SPROM4_ANTAVAIL_A 0x00FF /* A-PHY bitfield */
#define SSB_SPROM4_ANTAVAIL_A_SHIFT 0
#define SSB_SPROM4_ANTAVAIL_BG 0xFF00 /* B-PHY and G-PHY bitfield */
#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 8
#define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */
#define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */
#define SSB_SPROM4_AGAIN0_SHIFT 0
#define SSB_SPROM4_AGAIN1 0xFF00 /* Antenna 1 */
#define SSB_SPROM4_AGAIN1_SHIFT 8
#define SSB_SPROM4_AGAIN23 0x0060
#define SSB_SPROM4_AGAIN2 0x00FF /* Antenna 2 */
#define SSB_SPROM4_AGAIN2_SHIFT 0
#define SSB_SPROM4_AGAIN3 0xFF00 /* Antenna 3 */
#define SSB_SPROM4_AGAIN3_SHIFT 8
#define SSB_SPROM4_TXPID2G01 0x0062 /* TX Power Index 2GHz */
#define SSB_SPROM4_TXPID2G0 0x00FF
#define SSB_SPROM4_TXPID2G0_SHIFT 0
#define SSB_SPROM4_TXPID2G1 0xFF00
#define SSB_SPROM4_TXPID2G1_SHIFT 8
#define SSB_SPROM4_TXPID2G23 0x0064 /* TX Power Index 2GHz */
#define SSB_SPROM4_TXPID2G2 0x00FF
#define SSB_SPROM4_TXPID2G2_SHIFT 0
#define SSB_SPROM4_TXPID2G3 0xFF00
#define SSB_SPROM4_TXPID2G3_SHIFT 8
#define SSB_SPROM4_TXPID5G01 0x0066 /* TX Power Index 5GHz middle subband */
#define SSB_SPROM4_TXPID5G0 0x00FF
#define SSB_SPROM4_TXPID5G0_SHIFT 0
#define SSB_SPROM4_TXPID5G1 0xFF00
#define SSB_SPROM4_TXPID5G1_SHIFT 8
#define SSB_SPROM4_TXPID5G23 0x0068 /* TX Power Index 5GHz middle subband */
#define SSB_SPROM4_TXPID5G2 0x00FF
#define SSB_SPROM4_TXPID5G2_SHIFT 0
#define SSB_SPROM4_TXPID5G3 0xFF00
#define SSB_SPROM4_TXPID5G3_SHIFT 8
#define SSB_SPROM4_TXPID5GL01 0x006A /* TX Power Index 5GHz low subband */
#define SSB_SPROM4_TXPID5GL0 0x00FF
#define SSB_SPROM4_TXPID5GL0_SHIFT 0
#define SSB_SPROM4_TXPID5GL1 0xFF00
#define SSB_SPROM4_TXPID5GL1_SHIFT 8
#define SSB_SPROM4_TXPID5GL23 0x006C /* TX Power Index 5GHz low subband */
#define SSB_SPROM4_TXPID5GL2 0x00FF
#define SSB_SPROM4_TXPID5GL2_SHIFT 0
#define SSB_SPROM4_TXPID5GL3 0xFF00
#define SSB_SPROM4_TXPID5GL3_SHIFT 8
#define SSB_SPROM4_TXPID5GH01 0x006E /* TX Power Index 5GHz high subband */
#define SSB_SPROM4_TXPID5GH0 0x00FF
#define SSB_SPROM4_TXPID5GH0_SHIFT 0
#define SSB_SPROM4_TXPID5GH1 0xFF00
#define SSB_SPROM4_TXPID5GH1_SHIFT 8
#define SSB_SPROM4_TXPID5GH23 0x0070 /* TX Power Index 5GHz high subband */
#define SSB_SPROM4_TXPID5GH2 0x00FF
#define SSB_SPROM4_TXPID5GH2_SHIFT 0
#define SSB_SPROM4_TXPID5GH3 0xFF00
#define SSB_SPROM4_TXPID5GH3_SHIFT 8
#define SSB_SPROM4_MAXP_BG 0x0080 /* Max Power BG in path 1 */
#define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
#define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
#define SSB_SPROM4_ITSSI_BG_SHIFT 8
#define SSB_SPROM4_MAXP_A 0x008A /* Max Power A in path 1 */
#define SSB_SPROM4_MAXP_A_MASK 0x00FF /* Mask for Max Power A */
#define SSB_SPROM4_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */
#define SSB_SPROM4_ITSSI_A_SHIFT 8
#define SSB_SPROM4_PA0B0 0x0082 /* The paXbY locations are */
#define SSB_SPROM4_PA0B1 0x0084 /* only guesses */
#define SSB_SPROM4_PA0B2 0x0086
#define SSB_SPROM4_PA1B0 0x008E
#define SSB_SPROM4_PA1B1 0x0090
#define SSB_SPROM4_PA1B2 0x0092
/* SPROM Revision 5 (inherits most data from rev 4) */
#define SSB_SPROM5_CCODE 0x0044 /* Country Code (2 bytes) */
#define SSB_SPROM5_BFLLO 0x004A /* Boardflags (low 16 bits) */
#define SSB_SPROM5_BFLHI 0x004C /* Board Flags Hi */
#define SSB_SPROM5_BFL2LO 0x004E /* Board flags 2 (low 16 bits) */
#define SSB_SPROM5_BFL2HI 0x0050 /* Board flags 2 Hi */
#define SSB_SPROM5_IL0MAC 0x0052 /* 6 byte MAC address for a/b/g/n */
#define SSB_SPROM5_GPIOA 0x0076 /* Gen. Purpose IO # 0 and 1 */
#define SSB_SPROM5_GPIOA_P0 0x00FF /* Pin 0 */
#define SSB_SPROM5_GPIOA_P1 0xFF00 /* Pin 1 */
#define SSB_SPROM5_GPIOA_P1_SHIFT 8
#define SSB_SPROM5_GPIOB 0x0078 /* Gen. Purpose IO # 2 and 3 */
#define SSB_SPROM5_GPIOB_P2 0x00FF /* Pin 2 */
#define SSB_SPROM5_GPIOB_P3 0xFF00 /* Pin 3 */
#define SSB_SPROM5_GPIOB_P3_SHIFT 8
/* SPROM Revision 8 */
#define SSB_SPROM8_BOARDREV 0x0082 /* Board revision */
#define SSB_SPROM8_BFLLO 0x0084 /* Board flags (bits 0-15) */
#define SSB_SPROM8_BFLHI 0x0086 /* Board flags (bits 16-31) */
#define SSB_SPROM8_BFL2LO 0x0088 /* Board flags (bits 32-47) */
#define SSB_SPROM8_BFL2HI 0x008A /* Board flags (bits 48-63) */
#define SSB_SPROM8_IL0MAC 0x008C /* 6 byte MAC address */
#define SSB_SPROM8_CCODE 0x0092 /* 2 byte country code */
#define SSB_SPROM8_GPIOA 0x0096 /*Gen. Purpose IO # 0 and 1 */
#define SSB_SPROM8_GPIOA_P0 0x00FF /* Pin 0 */
#define SSB_SPROM8_GPIOA_P1 0xFF00 /* Pin 1 */
#define SSB_SPROM8_GPIOA_P1_SHIFT 8
#define SSB_SPROM8_GPIOB 0x0098 /* Gen. Purpose IO # 2 and 3 */
#define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */
#define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */
#define SSB_SPROM8_GPIOB_P3_SHIFT 8
#define SSB_SPROM8_LEDDC 0x009A
#define SSB_SPROM8_LEDDC_ON 0xFF00 /* oncount */
#define SSB_SPROM8_LEDDC_ON_SHIFT 8
#define SSB_SPROM8_LEDDC_OFF 0x00FF /* offcount */
#define SSB_SPROM8_LEDDC_OFF_SHIFT 0
#define SSB_SPROM8_ANTAVAIL 0x009C /* Antenna available bitfields*/
#define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
#define SSB_SPROM8_ANTAVAIL_A_SHIFT 8
#define SSB_SPROM8_ANTAVAIL_BG 0x00FF /* B-PHY and G-PHY bitfield */
#define SSB_SPROM8_ANTAVAIL_BG_SHIFT 0
#define SSB_SPROM8_AGAIN01 0x009E /* Antenna Gain (in dBm Q5.2) */
#define SSB_SPROM8_AGAIN0 0x00FF /* Antenna 0 */
#define SSB_SPROM8_AGAIN0_SHIFT 0
#define SSB_SPROM8_AGAIN1 0xFF00 /* Antenna 1 */
#define SSB_SPROM8_AGAIN1_SHIFT 8
#define SSB_SPROM8_AGAIN23 0x00A0
#define SSB_SPROM8_AGAIN2 0x00FF /* Antenna 2 */
#define SSB_SPROM8_AGAIN2_SHIFT 0
#define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */
#define SSB_SPROM8_AGAIN3_SHIFT 8
#define SSB_SPROM8_TXRXC 0x00A2
#define SSB_SPROM8_TXRXC_TXCHAIN 0x000f
#define SSB_SPROM8_TXRXC_TXCHAIN_SHIFT 0
#define SSB_SPROM8_TXRXC_RXCHAIN 0x00f0
#define SSB_SPROM8_TXRXC_RXCHAIN_SHIFT 4
#define SSB_SPROM8_TXRXC_SWITCH 0xff00
#define SSB_SPROM8_TXRXC_SWITCH_SHIFT 8
#define SSB_SPROM8_RSSIPARM2G 0x00A4 /* RSSI params for 2GHz */
#define SSB_SPROM8_RSSISMF2G 0x000F
#define SSB_SPROM8_RSSISMC2G 0x00F0
#define SSB_SPROM8_RSSISMC2G_SHIFT 4
#define SSB_SPROM8_RSSISAV2G 0x0700
#define SSB_SPROM8_RSSISAV2G_SHIFT 8
#define SSB_SPROM8_BXA2G 0x1800
#define SSB_SPROM8_BXA2G_SHIFT 11
#define SSB_SPROM8_RSSIPARM5G 0x00A6 /* RSSI params for 5GHz */
#define SSB_SPROM8_RSSISMF5G 0x000F
#define SSB_SPROM8_RSSISMC5G 0x00F0
#define SSB_SPROM8_RSSISMC5G_SHIFT 4
#define SSB_SPROM8_RSSISAV5G 0x0700
#define SSB_SPROM8_RSSISAV5G_SHIFT 8
#define SSB_SPROM8_BXA5G 0x1800
#define SSB_SPROM8_BXA5G_SHIFT 11
#define SSB_SPROM8_TRI25G 0x00A8 /* TX isolation 2.4&5.3GHz */
#define SSB_SPROM8_TRI2G 0x00FF /* TX isolation 2.4GHz */
#define SSB_SPROM8_TRI5G 0xFF00 /* TX isolation 5.3GHz */
#define SSB_SPROM8_TRI5G_SHIFT 8
#define SSB_SPROM8_TRI5GHL 0x00AA /* TX isolation 5.2/5.8GHz */
#define SSB_SPROM8_TRI5GL 0x00FF /* TX isolation 5.2GHz */
#define SSB_SPROM8_TRI5GH 0xFF00 /* TX isolation 5.8GHz */
#define SSB_SPROM8_TRI5GH_SHIFT 8
#define SSB_SPROM8_RXPO 0x00AC /* RX power offsets */
#define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
#define SSB_SPROM8_RXPO2G_SHIFT 0
#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
#define SSB_SPROM8_RXPO5G_SHIFT 8
#define SSB_SPROM8_FEM2G 0x00AE
#define SSB_SPROM8_FEM5G 0x00B0
#define SSB_SROM8_FEM_TSSIPOS 0x0001
#define SSB_SROM8_FEM_TSSIPOS_SHIFT 0
#define SSB_SROM8_FEM_EXTPA_GAIN 0x0006
#define SSB_SROM8_FEM_EXTPA_GAIN_SHIFT 1
#define SSB_SROM8_FEM_PDET_RANGE 0x00F8
#define SSB_SROM8_FEM_PDET_RANGE_SHIFT 3
#define SSB_SROM8_FEM_TR_ISO 0x0700
#define SSB_SROM8_FEM_TR_ISO_SHIFT 8
#define SSB_SROM8_FEM_ANTSWLUT 0xF800
#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11
#define SSB_SPROM8_THERMAL 0x00B2
#define SSB_SPROM8_THERMAL_OFFSET 0x00ff
#define SSB_SPROM8_THERMAL_OFFSET_SHIFT 0
#define SSB_SPROM8_THERMAL_TRESH 0xff00
#define SSB_SPROM8_THERMAL_TRESH_SHIFT 8
/* Temp sense related entries */
#define SSB_SPROM8_RAWTS 0x00B4
#define SSB_SPROM8_RAWTS_RAWTEMP 0x01ff
#define SSB_SPROM8_RAWTS_RAWTEMP_SHIFT 0
#define SSB_SPROM8_RAWTS_MEASPOWER 0xfe00
#define SSB_SPROM8_RAWTS_MEASPOWER_SHIFT 9
#define SSB_SPROM8_OPT_CORRX 0x00B6
#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE 0x00ff
#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT 0
#define SSB_SPROM8_OPT_CORRX_TEMPCORRX 0xfc00
#define SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT 10
#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION 0x0300
#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT 8
/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */
#define SSB_SPROM8_HWIQ_IQSWP 0x00B8
#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR 0x000f
#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT 0
#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP 0x0010
#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT 4
#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL 0x0020
#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT 5
#define SSB_SPROM8_TEMPDELTA 0x00BA
#define SSB_SPROM8_TEMPDELTA_PHYCAL 0x00ff
#define SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT 0
#define SSB_SPROM8_TEMPDELTA_PERIOD 0x0f00
#define SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT 8
#define SSB_SPROM8_TEMPDELTA_HYSTERESIS 0xf000
#define SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT 12
/* There are 4 blocks with power info sharing the same layout */
#define SSB_SROM8_PWR_INFO_CORE0 0x00C0
#define SSB_SROM8_PWR_INFO_CORE1 0x00E0
#define SSB_SROM8_PWR_INFO_CORE2 0x0100
#define SSB_SROM8_PWR_INFO_CORE3 0x0120
#define SSB_SROM8_2G_MAXP_ITSSI 0x00
#define SSB_SPROM8_2G_MAXP 0x00FF
#define SSB_SPROM8_2G_ITSSI 0xFF00
#define SSB_SPROM8_2G_ITSSI_SHIFT 8
#define SSB_SROM8_2G_PA_0 0x02 /* 2GHz power amp settings */
#define SSB_SROM8_2G_PA_1 0x04
#define SSB_SROM8_2G_PA_2 0x06
#define SSB_SROM8_5G_MAXP_ITSSI 0x08 /* 5GHz ITSSI and 5.3GHz Max Power */
#define SSB_SPROM8_5G_MAXP 0x00FF
#define SSB_SPROM8_5G_ITSSI 0xFF00
#define SSB_SPROM8_5G_ITSSI_SHIFT 8
#define SSB_SPROM8_5GHL_MAXP 0x0A /* 5.2GHz and 5.8GHz Max Power */
#define SSB_SPROM8_5GH_MAXP 0x00FF
#define SSB_SPROM8_5GL_MAXP 0xFF00
#define SSB_SPROM8_5GL_MAXP_SHIFT 8
#define SSB_SROM8_5G_PA_0 0x0C /* 5.3GHz power amp settings */
#define SSB_SROM8_5G_PA_1 0x0E
#define SSB_SROM8_5G_PA_2 0x10
#define SSB_SROM8_5GL_PA_0 0x12 /* 5.2GHz power amp settings */
#define SSB_SROM8_5GL_PA_1 0x14
#define SSB_SROM8_5GL_PA_2 0x16
#define SSB_SROM8_5GH_PA_0 0x18 /* 5.8GHz power amp settings */
#define SSB_SROM8_5GH_PA_1 0x1A
#define SSB_SROM8_5GH_PA_2 0x1C
/* TODO: Make it deprecated */
#define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
#define SSB_SPROM8_ITSSI_BG_SHIFT 8
#define SSB_SPROM8_PA0B0 0x00C2 /* 2GHz power amp settings */
#define SSB_SPROM8_PA0B1 0x00C4
#define SSB_SPROM8_PA0B2 0x00C6
#define SSB_SPROM8_MAXP_A 0x00C8 /* Max Power 5.3GHz */
#define SSB_SPROM8_MAXP_A_MASK 0x00FF /* Mask for Max Power 5.3GHz */
#define SSB_SPROM8_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */
#define SSB_SPROM8_ITSSI_A_SHIFT 8
#define SSB_SPROM8_MAXP_AHL 0x00CA /* Max Power 5.2/5.8GHz */
#define SSB_SPROM8_MAXP_AH_MASK 0x00FF /* Mask for Max Power 5.8GHz */
#define SSB_SPROM8_MAXP_AL_MASK 0xFF00 /* Mask for Max Power 5.2GHz */
#define SSB_SPROM8_MAXP_AL_SHIFT 8
#define SSB_SPROM8_PA1B0 0x00CC /* 5.3GHz power amp settings */
#define SSB_SPROM8_PA1B1 0x00CE
#define SSB_SPROM8_PA1B2 0x00D0
#define SSB_SPROM8_PA1LOB0 0x00D2 /* 5.2GHz power amp settings */
#define SSB_SPROM8_PA1LOB1 0x00D4
#define SSB_SPROM8_PA1LOB2 0x00D6
#define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */
#define SSB_SPROM8_PA1HIB1 0x00DA
#define SSB_SPROM8_PA1HIB2 0x00DC
#define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */
#define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */
#define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */
#define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
#define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
#define SSB_SPROM8_2G_MCSPO 0x0152
#define SSB_SPROM8_5G_MCSPO 0x0162
#define SSB_SPROM8_5GL_MCSPO 0x0172
#define SSB_SPROM8_5GH_MCSPO 0x0182
#define SSB_SPROM8_CDDPO 0x0192
#define SSB_SPROM8_STBCPO 0x0194
#define SSB_SPROM8_BW40PO 0x0196
#define SSB_SPROM8_BWDUPPO 0x0198
/* Values for boardflags_lo read from SPROM */
#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
#define SSB_BFL_ENETSPI 0x0010 /* has ephy roboswitch spi */
#define SSB_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */
#define SSB_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */
#define SSB_BFL_ENETADM 0x0080 /* has ADMtek switch */
#define SSB_BFL_ENETVLAN 0x0100 /* can do vlan */
#define SSB_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */
#define SSB_BFL_NOPCI 0x0400 /* board leaves PCI floating */
#define SSB_BFL_FEM 0x0800 /* supports the Front End Module */
#define SSB_BFL_EXTLNA 0x1000 /* has an external LNA */
#define SSB_BFL_HGPA 0x2000 /* had high gain PA */
#define SSB_BFL_BTCMOD 0x4000 /* BFL_BTCOEXIST is given in alternate GPIOs */
#define SSB_BFL_ALTIQ 0x8000 /* alternate I/Q settings */
/* Values for boardflags_hi read from SPROM */
#define SSB_BFH_NOPA 0x0001 /* has no PA */
#define SSB_BFH_RSSIINV 0x0002 /* RSSI uses positive slope (not TSSI) */
#define SSB_BFH_PAREF 0x0004 /* uses the PARef LDO */
#define SSB_BFH_3TSWITCH 0x0008 /* uses a triple throw switch shared with bluetooth */
#define SSB_BFH_PHASESHIFT 0x0010 /* can support phase shifter */
#define SSB_BFH_BUCKBOOST 0x0020 /* has buck/booster */
#define SSB_BFH_FEM_BT 0x0040 /* has FEM and switch to share antenna with bluetooth */
/* Values for boardflags2_lo read from SPROM */
#define SSB_BFL2_RXBB_INT_REG_DIS 0x0001 /* external RX BB regulator present */
#define SSB_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */
#define SSB_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */
#define SSB_BFL2_2X4_DIV 0x0008 /* 2x4 diversity switch */
#define SSB_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */
#define SSB_BFL2_PCIEWAR_OVR 0x0020 /* overrides ASPM and Clkreq settings */
#define SSB_BFL2_CAESERS_BRD 0x0040 /* is Caesers board (unused) */
#define SSB_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */
#define SSB_BFL2_SKWRKFEM_BRD 0x0100 /* 4321mcm93 uses Skyworks FEM */
#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
/* Values for SSB_SPROM1_BINF_CCODE */
enum {
SSB_SPROM1CCODE_WORLD = 0,
SSB_SPROM1CCODE_THAILAND,
SSB_SPROM1CCODE_ISRAEL,
SSB_SPROM1CCODE_JORDAN,
SSB_SPROM1CCODE_CHINA,
SSB_SPROM1CCODE_JAPAN,
SSB_SPROM1CCODE_USA_CANADA_ANZ,
SSB_SPROM1CCODE_EUROPE,
SSB_SPROM1CCODE_USA_LOW,
SSB_SPROM1CCODE_JAPAN_HIGH,
SSB_SPROM1CCODE_ALL,
SSB_SPROM1CCODE_NONE,
};
/* Address-Match values and masks (SSB_ADMATCHxxx) */
#define SSB_ADM_TYPE 0x00000003 /* Address type */
#define SSB_ADM_TYPE0 0
#define SSB_ADM_TYPE1 1
#define SSB_ADM_TYPE2 2
#define SSB_ADM_AD64 0x00000004
#define SSB_ADM_SZ0 0x000000F8 /* Type0 size */
#define SSB_ADM_SZ0_SHIFT 3
#define SSB_ADM_SZ1 0x000001F8 /* Type1 size */
#define SSB_ADM_SZ1_SHIFT 3
#define SSB_ADM_SZ2 0x000001F8 /* Type2 size */
#define SSB_ADM_SZ2_SHIFT 3
#define SSB_ADM_EN 0x00000400 /* Enable */
#define SSB_ADM_NEG 0x00000800 /* Negative decode */
#define SSB_ADM_BASE0 0xFFFFFF00 /* Type0 base address */
#define SSB_ADM_BASE0_SHIFT 8
#define SSB_ADM_BASE1 0xFFFFF000 /* Type1 base address for the core */
#define SSB_ADM_BASE1_SHIFT 12
#define SSB_ADM_BASE2 0xFFFF0000 /* Type2 base address for the core */
#define SSB_ADM_BASE2_SHIFT 16
#endif /* LINUX_SSB_REGS_H_ */
external/compat-wireless/include/linux/tracepoint.h
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#ifndef _COMPAT_LINUX_TRACEPOINT_H
#define _COMPAT_LINUX_TRACEPOINT_H 1
#include <linux/version.h>
#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,32))
/*
* Disable all tracing for older kernels
* < 2.6.27 had no tracing
* 2.6.27 had broken tracing
* 2.6.28-2.6.32 didn't have anything like DECLARE_EVENT_CLASS
* and faking it would be extremely difficult
*/
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
/*
* For 2.6.28+ include the original tracepoint.h but override
* the defines new code uses to disable tracing completely.
*/
#include_next <linux/tracepoint.h>
#endif
#undef TRACE_EVENT
#define TRACE_EVENT(name, proto, ...) \
static inline void trace_ ## name(proto) {}
#undef DECLARE_EVENT_CLASS
#define DECLARE_EVENT_CLASS(...)
#undef DEFINE_EVENT
#define DEFINE_EVENT(evt_class, name, proto, ...) \
static inline void trace_ ## name(proto) {}
#define TP_PROTO(args...) args
#define TP_ARGS(args...) args
#define TP_CONDITION(args...) args
#else
/* since 2.6.33, tracing hasn't changed, so just include the kernel's file */
#include_next <linux/tracepoint.h>
#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,32)) */
#endif /* _COMPAT_LINUX_TRACEPOINT_H */
external/compat-wireless/include/linux/unaligned/access_ok.h
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#ifndef _LINUX_UNALIGNED_ACCESS_OK_H
#define _LINUX_UNALIGNED_ACCESS_OK_H
#include <linux/kernel.h>
#include <asm/byteorder.h>
static inline u16 get_unaligned_le16(const void *p)
{
return le16_to_cpup((__le16 *)p);
}
static inline u32 get_unaligned_le32(const void *p)
{
return le32_to_cpup((__le32 *)p);
}
static inline u64 get_unaligned_le64(const void *p)
{
return le64_to_cpup((__le64 *)p);
}
static inline u16 get_unaligned_be16(const void *p)
{
return be16_to_cpup((__be16 *)p);
}
static inline u32 get_unaligned_be32(const void *p)
{
return be32_to_cpup((__be32 *)p);
}
static inline u64 get_unaligned_be64(const void *p)
{
return be64_to_cpup((__be64 *)p);
}
static inline void put_unaligned_le16(u16 val, void *p)
{
*((__le16 *)p) = cpu_to_le16(val);
}
static inline void put_unaligned_le32(u32 val, void *p)
{
*((__le32 *)p) = cpu_to_le32(val);
}
static inline void put_unaligned_le64(u64 val, void *p)
{
*((__le64 *)p) = cpu_to_le64(val);
}
static inline void put_unaligned_be16(u16 val, void *p)
{
*((__be16 *)p) = cpu_to_be16(val);
}
static inline void put_unaligned_be32(u32 val, void *p)
{
*((__be32 *)p) = cpu_to_be32(val);
}
static inline void put_unaligned_be64(u64 val, void *p)
{
*((__be64 *)p) = cpu_to_be64(val);
}
#endif /* _LINUX_UNALIGNED_ACCESS_OK_H */
external/compat-wireless/include/linux/unaligned/be_byteshift.h
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#ifndef _LINUX_UNALIGNED_BE_BYTESHIFT_H
#define _LINUX_UNALIGNED_BE_BYTESHIFT_H
#include <linux/types.h>
static inline u16 __get_unaligned_be16(const u8 *p)
{
return p[0] << 8 | p[1];
}
static inline u32 __get_unaligned_be32(const u8 *p)
{
return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3];
}
static inline u64 __get_unaligned_be64(const u8 *p)
{
return (u64)__get_unaligned_be32(p) << 32 |
__get_unaligned_be32(p + 4);
}
static inline void __put_unaligned_be16(u16 val, u8 *p)
{
*p++ = val >> 8;
*p++ = val;
}
static inline void __put_unaligned_be32(u32 val, u8 *p)
{
__put_unaligned_be16(val >> 16, p);
__put_unaligned_be16(val, p + 2);
}
static inline void __put_unaligned_be64(u64 val, u8 *p)
{
__put_unaligned_be32(val >> 32, p);
__put_unaligned_be32(val, p + 4);
}
static inline u16 get_unaligned_be16(const void *p)
{
return __get_unaligned_be16((const u8 *)p);
}
static inline u32 get_unaligned_be32(const void *p)
{
return __get_unaligned_be32((const u8 *)p);
}
static inline u64 get_unaligned_be64(const void *p)
{
return __get_unaligned_be64((const u8 *)p);
}
static inline void put_unaligned_be16(u16 val, void *p)
{
__put_unaligned_be16(val, p);
}
static inline void put_unaligned_be32(u32 val, void *p)
{
__put_unaligned_be32(val, p);
}
static inline void put_unaligned_be64(u64 val, void *p)
{
__put_unaligned_be64(val, p);
}
#endif /* _LINUX_UNALIGNED_BE_BYTESHIFT_H */
external/compat-wireless/include/linux/unaligned/be_memmove.h
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#ifndef _LINUX_UNALIGNED_BE_MEMMOVE_H
#define _LINUX_UNALIGNED_BE_MEMMOVE_H
#include <linux/unaligned/memmove.h>
static inline u16 get_unaligned_be16(const void *p)
{
return __get_unaligned_memmove16((const u8 *)p);
}
static inline u32 get_unaligned_be32(const void *p)
{
return __get_unaligned_memmove32((const u8 *)p);
}
static inline u64 get_unaligned_be64(const void *p)
{
return __get_unaligned_memmove64((const u8 *)p);
}
static inline void put_unaligned_be16(u16 val, void *p)
{
__put_unaligned_memmove16(val, p);
}
static inline void put_unaligned_be32(u32 val, void *p)
{
__put_unaligned_memmove32(val, p);
}
static inline void put_unaligned_be64(u64 val, void *p)
{
__put_unaligned_memmove64(val, p);
}
#endif /* _LINUX_UNALIGNED_LE_MEMMOVE_H */
external/compat-wireless/include/linux/unaligned/be_struct.h
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#ifndef _LINUX_UNALIGNED_BE_STRUCT_H
#define _LINUX_UNALIGNED_BE_STRUCT_H
#include <linux/unaligned/packed_struct.h>
static inline u16 get_unaligned_be16(const void *p)
{
return __get_unaligned_cpu16((const u8 *)p);
}
static inline u32 get_unaligned_be32(const void *p)
{
return __get_unaligned_cpu32((const u8 *)p);
}
static inline u64 get_unaligned_be64(const void *p)
{
return __get_unaligned_cpu64((const u8 *)p);
}
static inline void put_unaligned_be16(u16 val, void *p)
{
__put_unaligned_cpu16(val, p);
}
static inline void put_unaligned_be32(u32 val, void *p)
{
__put_unaligned_cpu32(val, p);
}
static inline void put_unaligned_be64(u64 val, void *p)
{
__put_unaligned_cpu64(val, p);
}
#endif /* _LINUX_UNALIGNED_BE_STRUCT_H */
external/compat-wireless/include/linux/unaligned/generic.h
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#ifndef _LINUX_UNALIGNED_GENERIC_H
#define _LINUX_UNALIGNED_GENERIC_H
/*
* Cause a link-time error if we try an unaligned access other than
* 1,2,4 or 8 bytes long
*/
extern void __bad_unaligned_access_size(void);
#define __get_unaligned_le(ptr) ((__force typeof(*(ptr)))({ \
__builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
__builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_le16((ptr)), \
__builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_le32((ptr)), \
__builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_le64((ptr)), \
__bad_unaligned_access_size())))); \
}))
#define __get_unaligned_be(ptr) ((__force typeof(*(ptr)))({ \
__builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
__builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_be16((ptr)), \
__builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_be32((ptr)), \
__builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_be64((ptr)), \
__bad_unaligned_access_size())))); \
}))
#define __put_unaligned_le(val, ptr) ({ \
void *__gu_p = (ptr); \
switch (sizeof(*(ptr))) { \
case 1: \
*(u8 *)__gu_p = (__force u8)(val); \
break; \
case 2: \
put_unaligned_le16((__force u16)(val), __gu_p); \
break; \
case 4: \
put_unaligned_le32((__force u32)(val), __gu_p); \
break; \
case 8: \
put_unaligned_le64((__force u64)(val), __gu_p); \
break; \
default: \
__bad_unaligned_access_size(); \
break; \
} \
(void)0; })
#define __put_unaligned_be(val, ptr) ({ \
void *__gu_p = (ptr); \
switch (sizeof(*(ptr))) { \
case 1: \
*(u8 *)__gu_p = (__force u8)(val); \
break; \
case 2: \
put_unaligned_be16((__force u16)(val), __gu_p); \
break; \
case 4: \
put_unaligned_be32((__force u32)(val), __gu_p); \
break; \
case 8: \
put_unaligned_be64((__force u64)(val), __gu_p); \
break; \
default: \
__bad_unaligned_access_size(); \
break; \
} \
(void)0; })
#endif /* _LINUX_UNALIGNED_GENERIC_H */
external/compat-wireless/include/linux/unaligned/le_byteshift.h
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#ifndef _LINUX_UNALIGNED_LE_BYTESHIFT_H
#define _LINUX_UNALIGNED_LE_BYTESHIFT_H
#include <linux/types.h>
static inline u16 __get_unaligned_le16(const u8 *p)
{
return p[0] | p[1] << 8;
}
static inline u32 __get_unaligned_le32(const u8 *p)
{
return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24;
}
static inline u64 __get_unaligned_le64(const u8 *p)
{
return (u64)__get_unaligned_le32(p + 4) << 32 |
__get_unaligned_le32(p);
}
static inline void __put_unaligned_le16(u16 val, u8 *p)
{
*p++ = val;
*p++ = val >> 8;
}
static inline void __put_unaligned_le32(u32 val, u8 *p)
{
__put_unaligned_le16(val >> 16, p + 2);
__put_unaligned_le16(val, p);
}
static inline void __put_unaligned_le64(u64 val, u8 *p)
{
__put_unaligned_le32(val >> 32, p + 4);
__put_unaligned_le32(val, p);
}
static inline u16 get_unaligned_le16(const void *p)
{
return __get_unaligned_le16((const u8 *)p);
}
static inline u32 get_unaligned_le32(const void *p)
{
return __get_unaligned_le32((const u8 *)p);
}
static inline u64 get_unaligned_le64(const void *p)
{
return __get_unaligned_le64((const u8 *)p);
}
static inline void put_unaligned_le16(u16 val, void *p)
{
__put_unaligned_le16(val, p);
}
static inline void put_unaligned_le32(u32 val, void *p)
{
__put_unaligned_le32(val, p);
}
static inline void put_unaligned_le64(u64 val, void *p)
{
__put_unaligned_le64(val, p);
}
#endif /* _LINUX_UNALIGNED_LE_BYTESHIFT_H */
external/compat-wireless/include/linux/unaligned/le_memmove.h
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#ifndef _LINUX_UNALIGNED_LE_MEMMOVE_H
#define _LINUX_UNALIGNED_LE_MEMMOVE_H
#include <linux/unaligned/memmove.h>
static inline u16 get_unaligned_le16(const void *p)
{
return __get_unaligned_memmove16((const u8 *)p);
}
static inline u32 get_unaligned_le32(const void *p)
{
return __get_unaligned_memmove32((const u8 *)p);
}
static inline u64 get_unaligned_le64(const void *p)
{
return __get_unaligned_memmove64((const u8 *)p);
}
static inline void put_unaligned_le16(u16 val, void *p)
{
__put_unaligned_memmove16(val, p);
}
static inline void put_unaligned_le32(u32 val, void *p)
{
__put_unaligned_memmove32(val, p);
}
static inline void put_unaligned_le64(u64 val, void *p)
{
__put_unaligned_memmove64(val, p);
}
#endif /* _LINUX_UNALIGNED_LE_MEMMOVE_H */
external/compat-wireless/include/linux/unaligned/le_struct.h
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#ifndef _LINUX_UNALIGNED_LE_STRUCT_H
#define _LINUX_UNALIGNED_LE_STRUCT_H
#include <linux/unaligned/packed_struct.h>
static inline u16 get_unaligned_le16(const void *p)
{
return __get_unaligned_cpu16((const u8 *)p);
}
static inline u32 get_unaligned_le32(const void *p)
{
return __get_unaligned_cpu32((const u8 *)p);
}
static inline u64 get_unaligned_le64(const void *p)
{
return __get_unaligned_cpu64((const u8 *)p);
}
static inline void put_unaligned_le16(u16 val, void *p)
{
__put_unaligned_cpu16(val, p);
}
static inline void put_unaligned_le32(u32 val, void *p)
{
__put_unaligned_cpu32(val, p);
}
static inline void put_unaligned_le64(u64 val, void *p)
{
__put_unaligned_cpu64(val, p);
}
#endif /* _LINUX_UNALIGNED_LE_STRUCT_H */
external/compat-wireless/include/linux/unaligned/memmove.h
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#ifndef _LINUX_UNALIGNED_MEMMOVE_H
#define _LINUX_UNALIGNED_MEMMOVE_H
#include <linux/kernel.h>
#include <linux/string.h>
/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
static inline u16 __get_unaligned_memmove16(const void *p)
{
u16 tmp;
memmove(&tmp, p, 2);
return tmp;
}
static inline u32 __get_unaligned_memmove32(const void *p)
{
u32 tmp;
memmove(&tmp, p, 4);
return tmp;
}
static inline u64 __get_unaligned_memmove64(const void *p)
{
u64 tmp;
memmove(&tmp, p, 8);
return tmp;
}
static inline void __put_unaligned_memmove16(u16 val, void *p)
{
memmove(p, &val, 2);
}
static inline void __put_unaligned_memmove32(u32 val, void *p)
{
memmove(p, &val, 4);
}
static inline void __put_unaligned_memmove64(u64 val, void *p)
{
memmove(p, &val, 8);
}
#endif /* _LINUX_UNALIGNED_MEMMOVE_H */
external/compat-wireless/include/linux/unaligned/packed_struct.h
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#ifndef _LINUX_UNALIGNED_PACKED_STRUCT_H
#define _LINUX_UNALIGNED_PACKED_STRUCT_H
#include <linux/kernel.h>
struct __una_u16 { u16 x __attribute__((packed)); };
struct __una_u32 { u32 x __attribute__((packed)); };
struct __una_u64 { u64 x __attribute__((packed)); };
static inline u16 __get_unaligned_cpu16(const void *p)
{
const struct __una_u16 *ptr = (const struct __una_u16 *)p;
return ptr->x;
}
static inline u32 __get_unaligned_cpu32(const void *p)
{
const struct __una_u32 *ptr = (const struct __una_u32 *)p;
return ptr->x;
}
static inline u64 __get_unaligned_cpu64(const void *p)
{
const struct __una_u64 *ptr = (const struct __una_u64 *)p;
return ptr->x;
}
static inline void __put_unaligned_cpu16(u16 val, void *p)
{
struct __una_u16 *ptr = (struct __una_u16 *)p;
ptr->x = val;
}
static inline void __put_unaligned_cpu32(u32 val, void *p)
{
struct __una_u32 *ptr = (struct __una_u32 *)p;
ptr->x = val;
}
static inline void __put_unaligned_cpu64(u64 val, void *p)
{
struct __una_u64 *ptr = (struct __una_u64 *)p;
ptr->x = val;
}
#endif /* _LINUX_UNALIGNED_PACKED_STRUCT_H */
external/compat-wireless/include/linux/usb/rndis_host.h
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/*
* Host Side support for RNDIS Networking Links
* Copyright (C) 2005 by David Brownell
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __LINUX_USB_RNDIS_HOST_H
#define __LINUX_USB_RNDIS_HOST_H
#include <linux/rndis.h>
/*
* CONTROL uses CDC "encapsulated commands" with funky notifications.
* - control-out: SEND_ENCAPSULATED
* - interrupt-in: RESPONSE_AVAILABLE
* - control-in: GET_ENCAPSULATED
*
* We'll try to ignore the RESPONSE_AVAILABLE notifications.
*
* REVISIT some RNDIS implementations seem to have curious issues still
* to be resolved.
*/
struct rndis_msg_hdr {
__le32 msg_type; /* RNDIS_MSG_* */
__le32 msg_len;
/* followed by data that varies between messages */
__le32 request_id;
__le32 status;
/* ... and more */
} __attribute__ ((packed));
/* MS-Windows uses this strange size, but RNDIS spec says 1024 minimum */
#define CONTROL_BUFFER_SIZE 1025
/* RNDIS defines an (absurdly huge) 10 second control timeout,
* but ActiveSync seems to use a more usual 5 second timeout
* (which matches the USB 2.0 spec).
*/
#define RNDIS_CONTROL_TIMEOUT_MS (5 * 1000)
struct rndis_data_hdr {
__le32 msg_type; /* RNDIS_MSG_PACKET */
__le32 msg_len; /* rndis_data_hdr + data_len + pad */
__le32 data_offset; /* 36 -- right after header */
__le32 data_len; /* ... real packet size */
__le32 oob_data_offset; /* zero */
__le32 oob_data_len; /* zero */
__le32 num_oob; /* zero */
__le32 packet_data_offset; /* zero */
__le32 packet_data_len; /* zero */
__le32 vc_handle; /* zero */
__le32 reserved; /* zero */
} __attribute__ ((packed));
struct rndis_init { /* OUT */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_INIT */
__le32 msg_len; /* 24 */
__le32 request_id;
__le32 major_version; /* of rndis (1.0) */
__le32 minor_version;
__le32 max_transfer_size;
} __attribute__ ((packed));
struct rndis_init_c { /* IN */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_INIT_C */
__le32 msg_len;
__le32 request_id;
__le32 status;
__le32 major_version; /* of rndis (1.0) */
__le32 minor_version;
__le32 device_flags;
__le32 medium; /* zero == 802.3 */
__le32 max_packets_per_message;
__le32 max_transfer_size;
__le32 packet_alignment; /* max 7; (1<<n) bytes */
__le32 af_list_offset; /* zero */
__le32 af_list_size; /* zero */
} __attribute__ ((packed));
struct rndis_halt { /* OUT (no reply) */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_HALT */
__le32 msg_len;
__le32 request_id;
} __attribute__ ((packed));
struct rndis_query { /* OUT */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_QUERY */
__le32 msg_len;
__le32 request_id;
__le32 oid;
__le32 len;
__le32 offset;
/*?*/ __le32 handle; /* zero */
} __attribute__ ((packed));
struct rndis_query_c { /* IN */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_QUERY_C */
__le32 msg_len;
__le32 request_id;
__le32 status;
__le32 len;
__le32 offset;
} __attribute__ ((packed));
struct rndis_set { /* OUT */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_SET */
__le32 msg_len;
__le32 request_id;
__le32 oid;
__le32 len;
__le32 offset;
/*?*/ __le32 handle; /* zero */
} __attribute__ ((packed));
struct rndis_set_c { /* IN */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_SET_C */
__le32 msg_len;
__le32 request_id;
__le32 status;
} __attribute__ ((packed));
struct rndis_reset { /* IN */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_RESET */
__le32 msg_len;
__le32 reserved;
} __attribute__ ((packed));
struct rndis_reset_c { /* OUT */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_RESET_C */
__le32 msg_len;
__le32 status;
__le32 addressing_lost;
} __attribute__ ((packed));
struct rndis_indicate { /* IN (unrequested) */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_INDICATE */
__le32 msg_len;
__le32 status;
__le32 length;
__le32 offset;
/**/ __le32 diag_status;
__le32 error_offset;
/**/ __le32 message;
} __attribute__ ((packed));
struct rndis_keepalive { /* OUT (optionally IN) */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_KEEPALIVE */
__le32 msg_len;
__le32 request_id;
} __attribute__ ((packed));
struct rndis_keepalive_c { /* IN (optionally OUT) */
/* header and: */
__le32 msg_type; /* RNDIS_MSG_KEEPALIVE_C */
__le32 msg_len;
__le32 request_id;
__le32 status;
} __attribute__ ((packed));
/* default filter used with RNDIS devices */
#define RNDIS_DEFAULT_FILTER ( \
RNDIS_PACKET_TYPE_DIRECTED | \
RNDIS_PACKET_TYPE_BROADCAST | \
RNDIS_PACKET_TYPE_ALL_MULTICAST | \
RNDIS_PACKET_TYPE_PROMISCUOUS)
/* Flags to require specific physical medium type for generic_rndis_bind() */
#define FLAG_RNDIS_PHYM_NOT_WIRELESS 0x0001
#define FLAG_RNDIS_PHYM_WIRELESS 0x0002
/* Flags for driver_info::data */
#define RNDIS_DRIVER_DATA_POLL_STATUS 1 /* poll status before control */
extern void rndis_status(struct usbnet *dev, struct urb *urb);
extern int
rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf, int buflen);
extern int
generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags);
extern void rndis_unbind(struct usbnet *dev, struct usb_interface *intf);
extern int rndis_rx_fixup(struct usbnet *dev, struct sk_buff *skb);
extern struct sk_buff *
rndis_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags);
#endif /* __LINUX_USB_RNDIS_HOST_H */
external/compat-wireless/include/linux/usb/usbnet.h
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/*
* USB Networking Link Interface
*
* Copyright (C) 2000-2005 by David Brownell <dbrownell@users.sourceforge.net>
* Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __LINUX_USB_USBNET_H
#define __LINUX_USB_USBNET_H
/* interface from usbnet core to each USB networking link we handle */
struct usbnet {
/* housekeeping */
struct usb_device *udev;
struct usb_interface *intf;
struct driver_info *driver_info;
const char *driver_name;
void *driver_priv;
wait_queue_head_t *wait;
struct mutex phy_mutex;
unsigned char suspend_count;
/* i/o info: pipes etc */
unsigned in, out;
struct usb_host_endpoint *status;
unsigned maxpacket;
struct timer_list delay;
/* protocol/interface state */
struct net_device *net;
int msg_enable;
unsigned long data[5];
u32 xid;
u32 hard_mtu; /* count any extra framing */
size_t rx_urb_size; /* size for rx urbs */
struct mii_if_info mii;
/* various kinds of pending driver work */
struct sk_buff_head rxq;
struct sk_buff_head txq;
struct sk_buff_head done;
struct sk_buff_head rxq_pause;
struct urb *interrupt;
struct usb_anchor deferred;
struct tasklet_struct bh;
struct work_struct kevent;
unsigned long flags;
# define EVENT_TX_HALT 0
# define EVENT_RX_HALT 1
# define EVENT_RX_MEMORY 2
# define EVENT_STS_SPLIT 3
# define EVENT_LINK_RESET 4
# define EVENT_RX_PAUSED 5
# define EVENT_DEV_WAKING 6
# define EVENT_DEV_ASLEEP 7
# define EVENT_DEV_OPEN 8
};
static inline struct usb_driver *driver_of(struct usb_interface *intf)
{
return to_usb_driver(intf->dev.driver);
}
/* interface from the device/framing level "minidriver" to core */
struct driver_info {
char *description;
int flags;
/* framing is CDC Ethernet, not writing ZLPs (hw issues), or optionally: */
#define FLAG_FRAMING_NC 0x0001 /* guard against device dropouts */
#define FLAG_FRAMING_GL 0x0002 /* genelink batches packets */
#define FLAG_FRAMING_Z 0x0004 /* zaurus adds a trailer */
#define FLAG_FRAMING_RN 0x0008 /* RNDIS batches, plus huge header */
#define FLAG_NO_SETINT 0x0010 /* device can't set_interface() */
#define FLAG_ETHER 0x0020 /* maybe use "eth%d" names */
#define FLAG_FRAMING_AX 0x0040 /* AX88772/178 packets */
#define FLAG_WLAN 0x0080 /* use "wlan%d" names */
#define FLAG_AVOID_UNLINK_URBS 0x0100 /* don't unlink urbs at usbnet_stop() */
#define FLAG_SEND_ZLP 0x0200 /* hw requires ZLPs are sent */
#define FLAG_WWAN 0x0400 /* use "wwan%d" names */
#define FLAG_LINK_INTR 0x0800 /* updates link (carrier) status */
#define FLAG_POINTTOPOINT 0x1000 /* possibly use "usb%d" names */
/*
* Indicates to usbnet, that USB driver accumulates multiple IP packets.
* Affects statistic (counters) and short packet handling.
*/
#define FLAG_MULTI_PACKET 0x2000
#define FLAG_RX_ASSEMBLE 0x4000 /* rx packets may span >1 frames */
/* init device ... can sleep, or cause probe() failure */
int (*bind)(struct usbnet *, struct usb_interface *);
/* cleanup device ... can sleep, but can't fail */
void (*unbind)(struct usbnet *, struct usb_interface *);
/* reset device ... can sleep */
int (*reset)(struct usbnet *);
/* stop device ... can sleep */
int (*stop)(struct usbnet *);
/* see if peer is connected ... can sleep */
int (*check_connect)(struct usbnet *);
/* (dis)activate runtime power management */
int (*manage_power)(struct usbnet *, int);
/* for status polling */
void (*status)(struct usbnet *, struct urb *);
/* link reset handling, called from defer_kevent */
int (*link_reset)(struct usbnet *);
/* fixup rx packet (strip framing) */
int (*rx_fixup)(struct usbnet *dev, struct sk_buff *skb);
/* fixup tx packet (add framing) */
struct sk_buff *(*tx_fixup)(struct usbnet *dev,
struct sk_buff *skb, gfp_t flags);
/* early initialization code, can sleep. This is for minidrivers
* having 'subminidrivers' that need to do extra initialization
* right after minidriver have initialized hardware. */
int (*early_init)(struct usbnet *dev);
/* called by minidriver when receiving indication */
void (*indication)(struct usbnet *dev, void *ind, int indlen);
/* for new devices, use the descriptor-reading code instead */
int in; /* rx endpoint */
int out; /* tx endpoint */
unsigned long data; /* Misc driver specific data */
};
/* Minidrivers are just drivers using the "usbnet" core as a powerful
* network-specific subroutine library ... that happens to do pretty
* much everything except custom framing and chip-specific stuff.
*/
extern int usbnet_probe(struct usb_interface *, const struct usb_device_id *);
extern int usbnet_suspend(struct usb_interface *, pm_message_t);
extern int usbnet_resume(struct usb_interface *);
extern void usbnet_disconnect(struct usb_interface *);
/* Drivers that reuse some of the standard USB CDC infrastructure
* (notably, using multiple interfaces according to the CDC
* union descriptor) get some helper code.
*/
struct cdc_state {
struct usb_cdc_header_desc *header;
struct usb_cdc_union_desc *u;
struct usb_cdc_ether_desc *ether;
struct usb_interface *control;
struct usb_interface *data;
};
extern int usbnet_generic_cdc_bind(struct usbnet *, struct usb_interface *);
extern int usbnet_cdc_bind(struct usbnet *, struct usb_interface *);
extern void usbnet_cdc_unbind(struct usbnet *, struct usb_interface *);
extern void usbnet_cdc_status(struct usbnet *, struct urb *);
/* CDC and RNDIS support the same host-chosen packet filters for IN transfers */
#define DEFAULT_FILTER (USB_CDC_PACKET_TYPE_BROADCAST \
|USB_CDC_PACKET_TYPE_ALL_MULTICAST \
|USB_CDC_PACKET_TYPE_PROMISCUOUS \
|USB_CDC_PACKET_TYPE_DIRECTED)
/* we record the state for each of our queued skbs */
enum skb_state {
illegal = 0,
tx_start, tx_done,
rx_start, rx_done, rx_cleanup,
unlink_start
};
struct skb_data { /* skb->cb is one of these */
struct urb *urb;
struct usbnet *dev;
enum skb_state state;
size_t length;
};
extern int usbnet_open(struct net_device *net);
extern int usbnet_stop(struct net_device *net);
extern netdev_tx_t usbnet_start_xmit(struct sk_buff *skb,
struct net_device *net);
extern void usbnet_tx_timeout(struct net_device *net);
extern int usbnet_change_mtu(struct net_device *net, int new_mtu);
extern int usbnet_get_endpoints(struct usbnet *, struct usb_interface *);
extern int usbnet_get_ethernet_addr(struct usbnet *, int);
extern void usbnet_defer_kevent(struct usbnet *, int);
extern void usbnet_skb_return(struct usbnet *, struct sk_buff *);
extern void usbnet_unlink_rx_urbs(struct usbnet *);
extern void usbnet_pause_rx(struct usbnet *);
extern void usbnet_resume_rx(struct usbnet *);
extern void usbnet_purge_paused_rxq(struct usbnet *);
extern int usbnet_get_settings(struct net_device *net,
struct ethtool_cmd *cmd);
extern int usbnet_set_settings(struct net_device *net,
struct ethtool_cmd *cmd);
extern u32 usbnet_get_link(struct net_device *net);
extern u32 usbnet_get_msglevel(struct net_device *);
extern void usbnet_set_msglevel(struct net_device *, u32);
extern void usbnet_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
extern int usbnet_nway_reset(struct net_device *net);
#endif /* __LINUX_USB_USBNET_H */
external/compat-wireless/include/linux/wireless.h
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external/compat-wireless/include/linux/wl12xx.h
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/*
* This file is part of wl12xx
*
* Copyright (C) 2009 Nokia Corporation
*
* Contact: Luciano Coelho <luciano.coelho@nokia.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef _LINUX_WL12XX_H
#define _LINUX_WL12XX_H
/* Reference clock values */
enum {
WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */
WL12XX_REFCLOCK_26 = 1, /* 26 MHz */
WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */
WL12XX_REFCLOCK_52 = 3, /* 52 MHz */
WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
};
/* TCXO clock values */
enum {
WL12XX_TCXOCLOCK_19_2 = 0, /* 19.2MHz */
WL12XX_TCXOCLOCK_26 = 1, /* 26 MHz */
WL12XX_TCXOCLOCK_38_4 = 2, /* 38.4MHz */
WL12XX_TCXOCLOCK_52 = 3, /* 52 MHz */
WL12XX_TCXOCLOCK_16_368 = 4, /* 16.368 MHz */
WL12XX_TCXOCLOCK_32_736 = 5, /* 32.736 MHz */
WL12XX_TCXOCLOCK_16_8 = 6, /* 16.8 MHz */
WL12XX_TCXOCLOCK_33_6 = 7, /* 33.6 MHz */
};
struct wl12xx_platform_data {
void (*set_power)(bool enable);
/* SDIO only: IRQ number if WLAN_IRQ line is used, 0 for SDIO IRQs */
int irq;
bool use_eeprom;
int board_ref_clock;
int board_tcxo_clock;
unsigned long platform_quirks;
bool pwr_in_suspend;
struct wl1271_if_operations *ops;
};
/* Platform does not support level trigger interrupts */
#define WL12XX_PLATFORM_QUIRK_EDGE_IRQ BIT(0)
#ifdef CONFIG_WL12XX_PLATFORM_DATA
int wl12xx_set_platform_data(const struct wl12xx_platform_data *data);
#else
static inline
int wl12xx_set_platform_data(const struct wl12xx_platform_data *data)
{
return -ENOSYS;
}
#endif
struct wl12xx_platform_data *wl12xx_get_platform_data(void);
#endif