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2024-09-09 08:52:07 +00:00
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bootable/bootloader/lk/dev/pmic/pm8921/include/dev/pm8921.h
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/*
* Copyright (c) 2011-2012, Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of Linux Foundation, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __DEV_PM8921_H
#define __DEV_PM8921_H
#include <sys/types.h>
#include <dev/pm8921_leds.h>
enum {
lvs_start = 1,
lvs_1 = lvs_start,
lvs_2,
lvs_3,
lvs_4,
lvs_5,
lvs_6,
lvs_7,
lvs_end = lvs_7,
};
enum {
mpp_start = 1,
mpp_1 = mpp_start,
mpp_2,
mpp_3,
mpp_4,
mpp_5,
mpp_6,
mpp_7,
mpp_8,
mpp_9,
mpp_10,
mpp_11,
mpp_12,
mpp_end = mpp_12,
};
typedef enum {
BAT_VOL_2_8 = 0,
BAT_VOL_2_9,
BAT_VOL_3_0,
BAT_VOL_3_1,
BAT_VOL_3_2,
BAT_VOL_3_3,
BAT_VOL_3_4,
BAT_VOL_3_5,
BAT_VOL_3_6,
BAT_VOL_3_7,
BAT_VOL_3_8,
BAT_VOL_3_9,
BAT_VOL_4_0,
BAT_VOL_4_1,
BAT_VOL_4_2,
BAT_VOL_4_3,
} bat_vol_t;
#define PM_GPIO_DIR_OUT 0x01
#define PM_GPIO_DIR_IN 0x02
#define PM_GPIO_DIR_BOTH (PM_GPIO_DIR_OUT | PM_GPIO_DIR_IN)
/* output_buffer */
#define PM_GPIO_OUT_BUF_OPEN_DRAIN 1
#define PM_GPIO_OUT_BUF_CMOS 0
#define PM_GPIO_PULL_UP_30 0
#define PM_GPIO_PULL_UP_1_5 1
#define PM_GPIO_PULL_UP_31_5 2
/* 1.5uA + 30uA boost */
#define PM_GPIO_PULL_UP_1_5_30 3
#define PM_GPIO_PULL_DN 4
#define PM_GPIO_PULL_NO 5
#define PM_GPIO_STRENGTH_NO 0
#define PM_GPIO_STRENGTH_HIGH 1
#define PM_GPIO_STRENGTH_MED 2
#define PM_GPIO_STRENGTH_LOW 3
#define PM_GPIO_FUNC_NORMAL 0
#define PM_GPIO_FUNC_PAIRED 1
#define PM_GPIO_FUNC_1 2
#define PM_GPIO_FUNC_2 3
/* LDO define values */
#define LDO_P_MASK (1 << 7)
#define LDO_2 (2)
#define LDO_8 (8 | LDO_P_MASK)
#define LDO_11 (11 | LDO_P_MASK)
#define LDO_23 (23 | LDO_P_MASK)
enum
{
LDO_VOLTAGE_1_2V = 0,
LDO_VOLTAGE_1_8V = 1,
LDO_VOLTAGE_3_0V = 2,
LDO_VOLTAGE_ENTRIES
};
#define PM_GPIO(_x) ((_x) - 1)
#define PM_IRQ_BLOCK(_x) (_x)
#define PM_IRQ_BLOCK_GPIO_START PM_IRQ_BLOCK(24)
#define PM_GPIO_BLOCK_ID(gpio) (PM_IRQ_BLOCK_GPIO_START + (gpio)/8)
#define PM_GPIO_ID_TO_BIT_MASK(gpio) (1 << ((gpio)%8))
#define PM_PWRKEY_BLOCK_ID 6
#define PM_PWRKEY_PRESS_BIT (1 << 3)
typedef int (*pm8921_read_func)(uint8_t *data, uint32_t length, uint32_t addr);
typedef int (*pm8921_write_func)(uint8_t *data, uint32_t length, uint32_t addr);
typedef struct
{
uint32_t initialized;
pm8921_read_func read;
pm8921_write_func write;
} pm8921_dev_t;
struct pm8921_gpio {
int direction;
int output_buffer;
int output_value;
int pull;
int vin_sel;
int out_strength;
int function;
int inv_int_pol;
int disable_pin;
};
struct pm89xx_vreg {
const char *name;
uint8_t type;
uint16_t test_reg;
uint16_t ctrl_reg;
};
void pm8921_init(pm8921_dev_t *);
int pm8921_gpio_config(int gpio, struct pm8921_gpio *param);
void pm8921_boot_done(void);
int pm8921_ldo_set_voltage(uint32_t ldo_id, uint32_t voltage);
int pm8921_config_reset_pwr_off(unsigned reset);
int pm8921_gpio_get(uint8_t gpio, uint8_t *status);
int pm8921_pwrkey_status(uint8_t *status);
int pm8921_config_led_current(enum pm8921_leds led_num,
uint8_t current,
enum led_mode sink,
int enable);
int pm8921_config_drv_keypad(unsigned int drv_flash_sel,
unsigned int flash_logic,
unsigned int flash_ensel);
int pm8921_low_voltage_switch_enable(uint8_t lvs_id);
int pm8921_mpp_set_digital_output(uint8_t mpp_id);
int pm8921_rtc_alarm_disable(void);
int pm89xx_bat_alarm_set(bat_vol_t, bat_vol_t);
int pm89xx_bat_alarm_status(uint8_t *, uint8_t *);
int pm89xx_vbus_status(void);
int pm89xx_ldo_set_voltage(const char * , uint32_t);
#endif
bootable/bootloader/lk/dev/pmic/pm8921/include/dev/pm8921_leds.h
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/*
* * Copyright (c) 2011, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of The Linux Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __PMIC_LED_H
#define __PMIC_LED_H
/* LED CNTL register */
#define LED_CNTL_BASE 0x131
#define PM8921_LED_CNTL_REG(n) (LED_CNTL_BASE + n)
#define LED_DRV0_CNTL PM8921_LED_CNTL_REG(0)
#define LED_DRV1_CNTL PM8921_LED_CNTL_REG(1)
#define LED_DRV2_CNTL PM8921_LED_CNTL_REG(2)
/* LED CNTL setting */
/* Current settings:
* [00000, 10100]: Iout = x * 2 mA
* [10101, 11111]: invalid settings
*/
#define LED_CURRENT_SET(x) ((x) << 3)
#define LED_SIGNAL_SELECT(x) ((x) << 0)
#define PM8921_DRV_KEYPAD_CNTL_REG 0x48
/* Keypad DRV CNTL Settings */
#define DRV_FLASH_SEL(x) ((x) << 4)
#define FLASH_LOGIC_SEL(x) ((x) << 2)
#define FLASH_ENSEL(x) ((x) << 0)
#define MAX_LC_LED_BRIGHTNESS 20
#define MAX_FLASH_BRIGHTNESS 15
#define MAX_KB_LED_BRIGHTNESS 15
/*
* led ids
* @PM8921_ID_LED_0 - First low current led
* @PM8921_ID_LED_1 - Second low current led
* @PM8921_ID_LED_2 - Third low current led
*/
enum pm8921_leds {
PM8921_ID_LED_0,
PM8921_ID_LED_1,
PM8921_ID_LED_2,
};
enum led_mode{
MANUAL,
PWM1,
PWM2,
PWM3,
DBUS1,
DBUS2,
DBUS3,
DBUS4,
};
enum kp_backlight_mode{
MANUAL_MODE,
DBUS1_MODE,
DBUS2_MODE,
LPG_MODE,
};
enum kp_backlight_flash_logic{
FLASH_ON_WITH_DTEST_HIGH,
FLASH_ON_WITH_DTEST_LOW,
};
#endif
bootable/bootloader/lk/dev/pmic/pm8921/include/dev/pm8921_pwm.h
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/*
* * Copyright (c) 2011, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of The Linux Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __PMIC_PWM_H
#define __PMIC_PWM_H
/* PMIC 8921 LPG defines */
#define PM8921_LPG_CTL_BASE (0x13C)
#define PM8921_LPG_CTL(n) (PM8921_LPG_CTL_BASE + (n))
#define PM8921_LPG_BANK_SEL (0x143)
#define PM8921_LPG_BANK_ENABLE (0x144)
#define USEC_PER_SEC 1000000L
#define NSEC_PER_SEC 1000000000L
#define NSEC_PER_USEC 1000
#define PWM_FREQ_HZ 300
#define PWM_LEVEL 15
#define NUM_CLOCKS 3
#define NUM_PRE_DIVIDE 4
#define NUM_LPG_CTL_REGS 7
#define PRE_DIVIDE_0 2
#define PRE_DIVIDE_1 3
#define PRE_DIVIDE_2 5
#define PRE_DIVIDE_3 6
#define PRE_DIVIDE_MIN PRE_DIVIDE_0
#define PRE_DIVIDE_MAX PRE_DIVIDE_3
#define PM_PWM_M_MIN 0
#define PM_PWM_M_MAX 7
#define NSEC_1000HZ (NSEC_PER_SEC / 1000)
#define NSEC_32768HZ (NSEC_PER_SEC / 32768)
#define NSEC_19P2MHZ (NSEC_PER_SEC / 19200000)
#define CLK_PERIOD_MIN NSEC_19P2MHZ
#define CLK_PERIOD_MAX NSEC_1000HZ
#define MIN_MPT ((PRE_DIVIDE_MIN * CLK_PERIOD_MIN) << PM_PWM_M_MIN)
#define MAX_MPT ((PRE_DIVIDE_MAX * CLK_PERIOD_MAX) << PM_PWM_M_MAX)
/* The MAX value is computation limit. Hardware limit is 393 seconds. */
#define PM_PWM_PERIOD_MAX (274 * USEC_PER_SEC)
/* The MIN value is hardware limit. */
#define PM_PWM_PERIOD_MIN 7 /* micro seconds */
#define PWM_PERIOD_USEC (USEC_PER_SEC / PWM_FREQ_HZ)
#define PWM_DUTY_LEVEL (PWM_PERIOD_USEC / PWM_LEVEL)
/* Control 0 */
#define PM_PWM_1KHZ_COUNT_MASK 0xF0
#define PM_PWM_1KHZ_COUNT_SHIFT 4
#define PM_PWM_1KHZ_COUNT_MAX 15
#define PM_PWM_OUTPUT_EN 0x08
#define PM_PWM_PWM_EN 0x04
#define PM_PWM_RAMP_GEN_EN 0x02
#define PM_PWM_RAMP_START 0x01
#define PM_PWM_PWM_START (PM_PWM_OUTPUT_EN | PM_PWM_PWM_EN)
#define PM_PWM_RAMP_GEN_START (PM_PWM_RAMP_GEN_EN | PM_PWM_RAMP_START)
/* Control 1 */
#define PM_PWM_REVERSE_EN 0x80
#define PM_PWM_BYPASS_LUT 0x40
#define PM_PWM_HIGH_INDEX_MASK 0x3F
/* Control 2 */
#define PM_PWM_LOOP_EN 0x80
#define PM_PWM_RAMP_UP 0x40
#define PM_PWM_LOW_INDEX_MASK 0x3F
/* Control 3 */
#define PM_PWM_VALUE_BIT7_0 0xFF
#define PM_PWM_VALUE_BIT5_0 0x3F
/* Control 4 */
#define PM_PWM_VALUE_BIT8 0x80
#define PM_PWM_CLK_SEL_MASK 0x60
#define PM_PWM_CLK_SEL_SHIFT 5
#define PM_PWM_CLK_SEL_NO 0
#define PM_PWM_CLK_SEL_1KHZ 1
#define PM_PWM_CLK_SEL_32KHZ 2
#define PM_PWM_CLK_SEL_19P2MHZ 3
#define PM_PWM_PREDIVIDE_MASK 0x18
#define PM_PWM_PREDIVIDE_SHIFT 3
#define PM_PWM_PREDIVIDE_2 0
#define PM_PWM_PREDIVIDE_3 1
#define PM_PWM_PREDIVIDE_5 2
#define PM_PWM_PREDIVIDE_6 3
#define PM_PWM_M_MASK 0x07
#define PM_PWM_M_MIN 0
#define PM_PWM_M_MAX 7
/* Control 5 */
#define PM_PWM_PAUSE_COUNT_HI_MASK 0xFC
#define PM_PWM_PAUSE_COUNT_HI_SHIFT 2
#define PM_PWM_PAUSE_ENABLE_HIGH 0x02
#define PM_PWM_SIZE_9_BIT 0x01
/* Control 6 */
#define PM_PWM_PAUSE_COUNT_LO_MASK 0xFC
#define PM_PWM_PAUSE_COUNT_LO_SHIFT 2
#define PM_PWM_PAUSE_ENABLE_LOW 0x02
#define PM_PWM_RESERVED 0x01
#define PM_PWM_PAUSE_COUNT_MAX 56 /* < 2^6 = 64*/
struct pm8921_pwm_config {
uint8_t pwm_size; /* round up to 6 or 9 for 6/9-bit PWM SIZE */
uint8_t clk;
uint8_t pre_div;
uint8_t pre_div_exp;
uint8_t pwm_value;
uint8_t bypass_lut;
uint8_t pwm_ctl[NUM_LPG_CTL_REGS];
};
/* External PWM functions */
int pm8921_pwm_enable(uint8_t pwm_id, pm8921_dev_t *dev);
int pm8921_pwm_config(uint8_t pwm_id,
uint32_t duty_us,
uint32_t period_us,
pm8921_dev_t *dev);
#endif
bootable/bootloader/lk/dev/pmic/pm8921/pm8921.c
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/*
* Copyright (c) 2011-2013, Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of Linux Foundation, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <assert.h>
#include <string.h>
#include <sys/types.h>
#include <err.h>
#include <dev/pm8921.h>
#include <platform/timer.h>
#include "pm8921_hw.h"
static pm8921_dev_t *dev;
static uint8_t ldo_n_voltage_mult[LDO_VOLTAGE_ENTRIES] = {
18, /* 1.2V */
0,
0,
};
static uint8_t ldo_p_voltage_mult[LDO_VOLTAGE_ENTRIES] = {
0,
6, /* 1.8V */
30, /* 3.0V */
};
/* Intialize the pmic driver */
void pm8921_init(pm8921_dev_t *pmic)
{
ASSERT(pmic);
ASSERT(pmic->read);
ASSERT(pmic->write);
dev = pmic;
dev->initialized = 1;
}
static int pm8921_masked_write(uint16_t addr,
uint8_t mask, uint8_t val)
{
int rc;
uint8_t reg;
rc = dev->read(&reg, 1, addr);
if (rc)
{
return rc;
}
reg &= ~mask;
reg |= val & mask;
rc = dev->write(&reg, 1, addr);
return rc;
}
/* Set the BOOT_DONE flag */
void pm8921_boot_done(void)
{
uint8_t val;
ASSERT(dev);
ASSERT(dev->initialized);
dev->read(&val, 1, PBL_ACCESS_2);
val |= PBL_ACCESS_2_ENUM_TIMER_STOP;
/* TODO: Remove next line when h/w is rewired for battery simulation.*/
val |= (0x7 << 2);
dev->write(&val, 1, PBL_ACCESS_2);
dev->read(&val, 1, SYS_CONFIG_2);
val |= (SYS_CONFIG_2_BOOT_DONE | SYS_CONFIG_2_ADAPTIVE_BOOT_DISABLE);
dev->write(&val, 1, SYS_CONFIG_2);
}
/* Configure PMIC GPIO */
int pm8921_gpio_config(int gpio, struct pm8921_gpio *param)
{
int ret;
uint8_t bank[6];
uint8_t output_buf_config;
uint8_t output_value;
static uint8_t dir_map[] = {
PM_GPIO_MODE_OFF,
PM_GPIO_MODE_OUTPUT,
PM_GPIO_MODE_INPUT,
PM_GPIO_MODE_BOTH,
};
if (param == NULL) {
dprintf (CRITICAL, "pm8291_gpio struct not defined\n");
return -1;
}
/* Select banks and configure the gpio */
bank[0] = PM_GPIO_WRITE |
((param->vin_sel << PM_GPIO_VIN_SHIFT) &
PM_GPIO_VIN_MASK) |
PM_GPIO_MODE_ENABLE;
/* bank1 */
if ((param->direction & PM_GPIO_DIR_OUT) && param->output_buffer)
output_buf_config = PM_GPIO_OUT_BUFFER_OPEN_DRAIN;
else
output_buf_config = 0;
if ((param->direction & PM_GPIO_DIR_OUT) && param->output_value)
output_value = 1;
else
output_value = 0;
bank[1] = PM_GPIO_WRITE |
((1 << PM_GPIO_BANK_SHIFT) & PM_GPIO_BANK_MASK) |
((dir_map[param->direction] << PM_GPIO_MODE_SHIFT)
& PM_GPIO_MODE_MASK) |
output_buf_config |
output_value;
bank[2] = PM_GPIO_WRITE |
((2 << PM_GPIO_BANK_SHIFT) & PM_GPIO_BANK_MASK) |
((param->pull << PM_GPIO_PULL_SHIFT) &
PM_GPIO_PULL_MASK);
bank[3] = PM_GPIO_WRITE |
((3 << PM_GPIO_BANK_SHIFT) & PM_GPIO_BANK_MASK) |
((param->out_strength << PM_GPIO_OUT_STRENGTH_SHIFT) &
PM_GPIO_OUT_STRENGTH_MASK) |
(param->disable_pin ? PM_GPIO_PIN_DISABLE : PM_GPIO_PIN_ENABLE);
bank[4] = PM_GPIO_WRITE |
((4 << PM_GPIO_BANK_SHIFT) & PM_GPIO_BANK_MASK) |
((param->function << PM_GPIO_FUNC_SHIFT) &
PM_GPIO_FUNC_MASK);
bank[5] = PM_GPIO_WRITE |
((5 << PM_GPIO_BANK_SHIFT) & PM_GPIO_BANK_MASK) |
(param->inv_int_pol ? 0 : PM_GPIO_NON_INT_POL_INV);
ret = dev->write(bank, 6, GPIO_CNTL(gpio));
if (ret) {
dprintf(CRITICAL, "Failed to write to PM8921 ret=%d.\n", ret);
return -1;
}
return 0;
}
/* Reads the value of the irq status for the requested block */
int pm8921_irq_get_block_status(uint8_t block, uint8_t *status)
{
int ret = 0;
/* Select the irq block to be read */
ret = dev->write(&block, 1, IRQ_BLOCK_SEL_USR_ADDR);
if(!ret)
{
/* Read the real time irq status value for the block */
ret = dev->read(status, 1, IRQ_STATUS_RT_USR_ADDR);
}
return ret;
}
/* Reads the status of requested gpio */
int pm8921_gpio_get(uint8_t gpio, uint8_t *status)
{
int ret = 0;
uint8_t block_status;
ret = pm8921_irq_get_block_status(PM_GPIO_BLOCK_ID(gpio), &block_status);
if(!ret)
{
if(block_status & PM_GPIO_ID_TO_BIT_MASK(gpio))
*status = 1;
else
*status = 0;
}
return ret;
}
int pm8921_pwrkey_status(uint8_t *is_pwrkey_pressed)
{
int ret = 0;
uint8_t block_status;
ret = pm8921_irq_get_block_status(PM_PWRKEY_BLOCK_ID, &block_status);
if (!ret)
{
if(block_status & PM_PWRKEY_PRESS_BIT)
*is_pwrkey_pressed = 1;
else
*is_pwrkey_pressed = 0;
}
return ret;
}
int pm8921_ldo_set_voltage(uint32_t ldo_id, uint32_t voltage)
{
uint8_t mult;
uint8_t val = 0;
uint32_t ldo_number = (ldo_id & ~LDO_P_MASK);
int32_t ret = 0;
/* Find the voltage multiplying factor */
if(ldo_id & LDO_P_MASK)
mult = ldo_p_voltage_mult[voltage];
else
mult = ldo_n_voltage_mult[voltage];
/* Program the TEST reg */
if (ldo_id & LDO_P_MASK){
/* Bank 2, only for p ldo, use 1.25V reference */
val = 0x0;
val |= ( 1 << PM8921_LDO_TEST_REG_RW );
val |= ( 2 << PM8921_LDO_TEST_REG_BANK_SEL);
ret = dev->write(&val, 1, PM8921_LDO_TEST_REG(ldo_number));
if (ret) {
dprintf(CRITICAL, "Failed to write to PM8921 LDO Test Reg ret=%d.\n", ret);
return -1;
}
/* Bank 4, only for p ldo, disable output range ext, normal capacitance */
val = 0x0;
val |= ( 1 << PM8921_LDO_TEST_REG_RW );
val |= ( 4 << PM8921_LDO_TEST_REG_BANK_SEL);
ret = dev->write(&val, 1, PM8921_LDO_TEST_REG(ldo_number));
if (ret) {
dprintf(CRITICAL, "Failed to write to PM8921 LDO Test Reg ret=%d.\n", ret);
return -1;
}
}
/* Program the CTRL reg */
val = 0x0;
val |= ( 1 << PM8921_LDO_CTRL_REG_ENABLE);
val |= ( 1 << PM8921_LDO_CTRL_REG_PULL_DOWN);
val |= ( 0 << PM8921_LDO_CTRL_REG_POWER_MODE);
val |= ( mult << PM8921_LDO_CTRL_REG_VOLTAGE);
ret = dev->write(&val, 1, PM8921_LDO_CTRL_REG(ldo_number));
if (ret) {
dprintf(CRITICAL, "Failed to write to PM8921 LDO Ctrl Reg ret=%d.\n", ret);
return -1;
}
return 0;
}
/*
* Configure PMIC for reset and power off.
* reset = 1: Configure reset.
* reset = 0: Configure power off.
*/
int pm8921_config_reset_pwr_off(unsigned reset)
{
int rc;
/* Enable SMPL(Short Momentary Power Loss) if resetting is desired. */
rc = pm8921_masked_write(PM8921_SLEEP_CTRL_REG,
SLEEP_CTRL_SMPL_EN_MASK,
(reset ? SLEEP_CTRL_SMPL_EN_RESET : SLEEP_CTRL_SMPL_EN_PWR_OFF));
if (rc)
{
goto read_write_err;
}
/*
* Select action to perform (reset or shutdown) when PS_HOLD goes low.
* Also ensure that KPD, CBL0, and CBL1 pull ups are enabled and that
* USB charging is enabled.
*/
rc = pm8921_masked_write(PM8921_PON_CTRL_1_REG,
PON_CTRL_1_PULL_UP_MASK | PON_CTRL_1_USB_PWR_EN
| PON_CTRL_1_WD_EN_MASK,
PON_CTRL_1_PULL_UP_MASK | PON_CTRL_1_USB_PWR_EN
| (reset ? PON_CTRL_1_WD_EN_RESET : PON_CTRL_1_WD_EN_PWR_OFF));
if (rc)
{
goto read_write_err;
}
read_write_err:
return rc;
}
/* A wrapper function to configure PMIC PWM
* pwm_id : Channel number to configure
* duty_us : duty cycle for output waveform in micro seconds
* period_us : period for output waveform in micro seconds
*/
int pm8921_set_pwm_config(uint8_t pwm_id, uint32_t duty_us, uint32_t period_us)
{
int rc;
rc = pm8921_pwm_config(pwm_id, duty_us, period_us, dev);
return rc;
}
/* A wrapper function to enable PMIC PWM
* pwm_id : Channel number to enable
*/
int pm8921_pwm_channel_enable(uint8_t pwm_id)
{
int rc;
rc = pm8921_pwm_enable(pwm_id, dev);
return rc;
}
/* Configure LED's for current sinks
* enable = 1: Configure external signal detection
* for the sink with the current level
* enable = 0: Turn off external signal detection
*
* Values for sink are defined as follows:
* 0 = MANUAL, turn on LED when curent [00000, 10100]
* 1 = PWM1
* 2 = PWM2
* 3 = PWM3
* 4 = DBUS1
* 5 = DBUS2
* 6 = DBUS3
* 7 = DBUS4
*
* Current settings are calculated as per the equation:
* [00000, 10100]: Iout = current * 2 mA
* [10101, 11111]: invalid settings
*/
int pm8921_config_led_current(enum pm8921_leds led_num,
uint8_t current,
enum led_mode sink,
int enable)
{
uint8_t val;
int ret;
/* Program the CTRL reg */
val = 0x0;
if (enable != 0)
{
if (current > 0x15)
{
dprintf(CRITICAL, "Invalid current settings for PM8921 LED Ctrl Reg \
current=%d.\n", current);
return -1;
}
if (sink > 0x7)
{
dprintf(CRITICAL, "Invalid signal selection for PM8921 LED Ctrl Reg \
sink=%d.\n", sink);
return -1;
}
val |= LED_CURRENT_SET(current);
val |= LED_SIGNAL_SELECT(sink);
}
ret = dev->write(&val, 1, PM8921_LED_CNTL_REG(led_num));
if (ret)
dprintf(CRITICAL, "Failed to write to PM8921 LED Ctrl Reg ret=%d.\n", ret);
return ret;
}
/* Configure DRV_KEYPAD
*drv_flash_sel:
* 0000 = off
* Iout = drv_flash_sel * 20 mA (300 mA driver)
* Iout = drv_flash_sel * 40 mA (600 mA driver)
*
* flash_logic = 0 : flash is on when DTEST is high
* flash_logic = 0 : flash is off when DTEST is high
*
* flash_ensel = 0 : manual mode, turn on flash when drv_flash_sel > 0
* flash_ensel = 1 : DBUS1
* flash_ensel = 2 : DBUS2
* flash_ensel = 3 : enable flash from LPG
*/
int pm8921_config_drv_keypad(unsigned int drv_flash_sel, unsigned int flash_logic, unsigned int flash_ensel)
{
uint8_t val;
int ret;
/* Program the CTRL reg */
val = 0x0;
if (drv_flash_sel != 0)
{
if (drv_flash_sel > 0x0F)
{
dprintf(CRITICAL, "Invalid current settings for PM8921 \
KEYPAD_DRV Ctrl Reg drv_flash_sel=%d.\n", drv_flash_sel);
return -1;
}
if (flash_logic > 1)
{
dprintf(CRITICAL, "Invalid signal selection for PM8921 \
KEYPAD_DRV Ctrl Reg flash_logic=%d.\n", flash_logic);
return -1;
}
if (flash_ensel > 3)
{
dprintf(CRITICAL, "Invalid signal selection for PM8921 \
KEYPAD_DRV Ctrl Reg flash_ensel=%d.\n", flash_ensel);
return -1;
}
val |= DRV_FLASH_SEL(drv_flash_sel);
val |= FLASH_LOGIC_SEL(flash_logic);
val |= FLASH_ENSEL(flash_ensel);
}
ret = dev->write(&val, 1, PM8921_DRV_KEYPAD_CNTL_REG);
if (ret)
dprintf(CRITICAL, "Failed to write to PM8921 KEYPAD_DRV Ctrl Reg ret=%d.\n", ret);
return ret;
}
int pm8921_low_voltage_switch_enable(uint8_t lvs_id)
{
int ret = NO_ERROR;
uint8_t val;
if (lvs_id < lvs_start || lvs_id > lvs_end) {
dprintf(CRITICAL, "Requested unsupported LVS.\n");
return ERROR;
}
if (lvs_id == lvs_2) {
dprintf(CRITICAL, "No support for LVS2 yet!\n");
return ERROR;
}
/* Read LVS_TEST Reg first*/
ret = dev->read(&val, 1, PM8921_LVS_TEST_REG(lvs_id));
if (ret) {
dprintf(CRITICAL, "Failed to read LVS_TEST Reg ret=%d.\n", ret);
return ret;
}
/* Check if switch is already ON */
val = val & PM8921_LVS_100_TEST_VOUT_OK;
if (val)
return ret;
/* Turn on switch in normal mode */
val = 0;
val |= PM8921_LVS_100_CTRL_SW_EN; /* Enable Switch */
val |= PM8921_LVS_100_CTRL_SLEEP_B_IGNORE; /* Ignore sleep mode pin */
ret = dev->write(&val, 1, PM8921_LVS_CTRL_REG(lvs_id));
if (ret)
dprintf(CRITICAL, "Failed to write LVS_CTRL Reg ret=%d.\n", ret);
return ret;
}
int pm8921_mpp_set_digital_output(uint8_t mpp_id)
{
int ret = NO_ERROR;
uint8_t val;
if (mpp_id < mpp_start || mpp_id > mpp_end) {
dprintf(CRITICAL, "Requested unsupported MPP.\n");
return ERROR;
}
val = 0;
/* Configure in digital output mode */
val |= PM8921_MPP_CTRL_DIGITAL_OUTPUT;
val |= PM8921_MPP_CTRL_VIO_1; /* Set input voltage to 1.8V */
val |= PM8921_MPP_CTRL_OUTPUT_HIGH; /* Set mpp to high */
ret = dev->write(&val, 1, PM8921_MPP_CTRL_REG(mpp_id));
if (ret) {
dprintf(CRITICAL, "Failed to write MPP_CTRL Reg ret=%d.\n",
ret);
}
return ret;
}
int pm8921_HDMI_Switch(void)
{
int ret = NO_ERROR;
uint8_t val;
/* Value for HDMI MVS 5V Switch */
val = 0x068;
/* Turn on MVS 5V HDMI switch */
ret = dev->write(&val, 1, PM8921_MVS_5V_HDMI_SWITCH);
if (ret) {
dprintf(CRITICAL,
"Failed to turn ON MVS 5V hdmi switch ret=%d.\n", ret);
}
return ret;
}
int pm8921_rtc_alarm_disable(void)
{
int rc;
uint8_t reg;
rc = dev->read(&reg, 1, PM8921_RTC_CTRL);
if (rc) {
dprintf(CRITICAL,"Failed to read RTC_CTRL reg = %d\n",rc);
return rc;
}
reg = (reg & ~PM8921_RTC_ALARM_ENABLE);
rc = dev->write(&reg, 1, PM8921_RTC_CTRL);
if (rc) {
dprintf(CRITICAL,"Failed to write RTC_CTRL reg = %d\n",rc);
return rc;
}
return rc;
}
/*
* Set battery alarm with low & high threshold values
*/
int pm89xx_bat_alarm_set(bat_vol_t up_thresh_vol, bat_vol_t low_thresh_vol)
{
int rc;
uint8_t reg = 0;
if ((up_thresh_vol > BAT_VOL_4_3) || (low_thresh_vol > BAT_VOL_4_3)) {
dprintf(CRITICAL, "Input voltage not in permissible range\n");
return 1;
}
/*
* Write upper & lower threshold values
*/
reg = (up_thresh_vol << PM89XX_BAT_UP_THRESH_VOL) | low_thresh_vol;
rc = dev->write(&reg, 1, PM89XX_BAT_ALRM_THRESH);
if (rc) {
dprintf(CRITICAL, "Failed to set BAT_THRESH reg = %d\n", rc);
return rc;
}
/* Read Alarm control to use the existing hysteresis values */
rc = dev->read(&reg, 1, PM89XX_BAT_ALRM_CTRL);
if (rc) {
dprintf(CRITICAL, "Failed to read BAT_ALARM reg = %d\n", rc);
return rc;
}
/* Enable battery alarm */
reg |= PM89XX_BAT_ALRM_ENABLE;
rc = dev->write(&reg, 1, PM89XX_BAT_ALRM_CTRL);
if (rc) {
dprintf(CRITICAL, "Failed to enable BAT_ALARM reg = %d\n", rc);
return rc;
}
/* Wait for the comparator o/p to settle */
mdelay(10);
return rc;
}
/*
* API to return status of battery
* if the vbatt is below upper threshold return 0
* if the vbatt is below lower threshold return 1
*/
int pm89xx_bat_alarm_status(uint8_t *high_status, uint8_t *low_status)
{
int rc = 0;
uint8_t reg = 0;
/* Read the battery status */
rc = dev->read(&reg, 1, PM89XX_BAT_ALRM_CTRL);
if (rc) {
dprintf(CRITICAL, "Failed to read BAT_ALARM reg = %d\n", rc);
return rc;
}
/* Return the status if battery alarm is enabled */
if (reg & PM89XX_BAT_ALRM_ENABLE) {
*high_status = (reg & PM89XX_BAT_UPR_STATUS);
*low_status = (reg & PM89XX_BAT_LWR_STATUS);
} else {
dprintf(CRITICAL, "Battery alarm is not enabled\n");
return 1;
}
return rc;
}
/*
* Return 1 if VBUS is connected, 0 otherwise
*/
int pm89xx_vbus_status(void)
{
int rc;
uint8_t reg = 0;
rc = dev->read(&reg, 1, PM89XX_USB_OVP_CTRL);
if (rc) {
dprintf(CRITICAL, "Failed to read USB OVP CTRL = %d\n", rc);
return rc;
}
reg &= PM89XX_VBUS_INPUT_STATUS;
return reg;
}
static struct pm89xx_vreg *ldo_get(const char *ldo_name)
{
uint8_t i;
struct pm89xx_vreg *ldo = NULL;
for (i = 0; i < ARRAY_SIZE(ldo_data); i++) {
ldo = &ldo_data[i];
if (!strncmp(ldo->name, ldo_name, strlen(ldo_name)))
break;
}
return ldo;
}
/*
* API takes LDO name & voltage as input
* Input voltage is taken in mVs
* PLDO voltage ranging from 1500mV to 3000mV
* NLDO voltage ranging from 750mV to 1525mV
*/
int pm89xx_ldo_set_voltage(const char *ldo_name, uint32_t voltage)
{
uint8_t mult;
uint8_t val = 0;
int32_t ret = 0;
struct pm89xx_vreg *ldo;
/* Find the LDO info from table */
ldo = ldo_get(ldo_name);
if (!ldo) {
dprintf(CRITICAL, "Requested LDO is not supported : \
%s\n", ldo_name);
return -1;
}
/* Find the voltage multiplying factor */
if (ldo->type == PLDO_TYPE) {
if (voltage < PLDO_MV_VMIN)
voltage = PLDO_MV_VMIN;
else if (voltage > PLDO_MV_VMAX)
voltage = PLDO_MV_VMAX;
mult = (voltage - PLDO_MV_VMIN) / PLDO_MV_VSTEP;
} else {
if (voltage < NLDO_MV_VMIN)
voltage = NLDO_MV_VMIN;
else if (voltage > NLDO_MV_VMAX)
voltage = NLDO_MV_VMAX;
mult = (voltage - NLDO_MV_VMIN) / NLDO_MV_VSTEP;
}
/* Program the TEST reg */
if (ldo->type == PLDO_TYPE) {
/* Bank 2, only for p ldo, use 1.25V reference */
val = 0x0;
val |= (1 << PM8921_LDO_TEST_REG_RW);
val |= (2 << PM8921_LDO_TEST_REG_BANK_SEL);
ret = dev->write(&val, 1, ldo->test_reg);
if (ret) {
dprintf(CRITICAL, "Failed to write to PM8921 LDO Test \
Reg ret=%d.\n", ret);
return -1;
}
/*
* Bank 4, only for p ldo, disable output range ext,
* normal capacitance
*/
val = 0x0;
val |= (1 << PM8921_LDO_TEST_REG_RW);
val |= (4 << PM8921_LDO_TEST_REG_BANK_SEL);
ret = dev->write(&val, 1, ldo->test_reg);
if (ret) {
dprintf(CRITICAL, "Failed to write to PM8921 LDO Test \
Reg ret=%d.\n", ret);
return -1;
}
}
/* Program the CTRL reg */
val = 0x0;
val |= (1 << PM8921_LDO_CTRL_REG_ENABLE);
val |= (1 << PM8921_LDO_CTRL_REG_PULL_DOWN);
val |= (0 << PM8921_LDO_CTRL_REG_POWER_MODE);
val |= (mult << PM8921_LDO_CTRL_REG_VOLTAGE);
ret = dev->write(&val, 1, ldo->ctrl_reg);
if (ret) {
dprintf(CRITICAL, "Failed to write to PM8921 LDO Ctrl Reg \
ret=%d.\n", ret);
return -1;
}
return 0;
}
bootable/bootloader/lk/dev/pmic/pm8921/pm8921_hw.h
+175
View File
@@ -0,0 +1,175 @@
/*
* Copyright (c) 2011-2012, Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of Linux Foundation, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <bits.h>
#define PBL_ACCESS_2 0x005
#define PBL_ACCESS_2_ENUM_TIMER_STOP (1 << 1)
#define SYS_CONFIG_2 0x007
#define SYS_CONFIG_2_BOOT_DONE (1 << 6)
#define SYS_CONFIG_2_ADAPTIVE_BOOT_DISABLE (1 << 7)
#define PM8921_LDO_REG_BASE 0x0AE
#define PM8921_LDO_CTRL_REG(id) (PM8921_LDO_REG_BASE + (2 * (id-1)))
#define PM8921_LDO_TEST_REG(id) (PM8921_LDO_CTRL_REG(id) + 1)
/* Bit offsets LDO CTRL register */
#define PM8921_LDO_CTRL_REG_ENABLE 7
#define PM8921_LDO_CTRL_REG_PULL_DOWN 6
#define PM8921_LDO_CTRL_REG_POWER_MODE 5
#define PM8921_LDO_CTRL_REG_VOLTAGE 0
/* Bit offsets LDO Test register */
#define PM8921_LDO_TEST_REG_BANK_SEL 4
#define PM8921_LDO_TEST_REG_RW 7
#define PM8921_LDO_TEST_REG_BANK2_RANGE_SEL 2
#define PM8921_LDO_TEST_REG_BANK2_FINE_STEP 1
#define PM8921_LDO_TEST_REG_BANK4_RANGE_EXT 0
#define GPIO_CNTL_BASE 0x150
#define GPIO_CNTL(n) (GPIO_CNTL_BASE + n)
/* GPIO Bank register programming */
#define PM_GPIO_BANK_MASK 0x70
#define PM_GPIO_BANK_SHIFT 4
#define PM_GPIO_WRITE 0x80
/* Bank 0 */
#define PM_GPIO_VIN_MASK 0x0E
#define PM_GPIO_VIN_SHIFT 1
#define PM_GPIO_MODE_ENABLE 0x01
/* Bank 1 */
#define PM_GPIO_MODE_MASK 0x0C
#define PM_GPIO_MODE_SHIFT 2
#define PM_GPIO_OUT_BUFFER_OPEN_DRAIN 0x02
#define PM_GPIO_OUT_INVERT 0x01
#define PM_GPIO_MODE_OFF 3
#define PM_GPIO_MODE_OUTPUT 2
#define PM_GPIO_MODE_INPUT 0
#define PM_GPIO_MODE_BOTH 1
/* Bank 2 */
#define PM_GPIO_PULL_MASK 0x0E
#define PM_GPIO_PULL_SHIFT 1
/* Bank 3 */
#define PM_GPIO_OUT_STRENGTH_MASK 0x0C
#define PM_GPIO_OUT_STRENGTH_SHIFT 2
#define PM_GPIO_PIN_ENABLE 0x00
#define PM_GPIO_PIN_DISABLE 0x01
/* Bank 4 */
#define PM_GPIO_FUNC_MASK 0x0E
#define PM_GPIO_FUNC_SHIFT 1
/* Bank 5 */
#define PM_GPIO_NON_INT_POL_INV 0x08
/* PON CTRL 1 register */
#define PM8921_PON_CTRL_1_REG 0x01C
#define PON_CTRL_1_PULL_UP_MASK 0xE0
#define PON_CTRL_1_USB_PWR_EN 0x10
#define PON_CTRL_1_WD_EN_MASK 0x08
#define PON_CTRL_1_WD_EN_RESET 0x08
#define PON_CTRL_1_WD_EN_PWR_OFF 0x00
/* SLEEP CTRL register */
#define PM8921_SLEEP_CTRL_REG 0x10A
#define SLEEP_CTRL_SMPL_EN_MASK 0x04
#define SLEEP_CTRL_SMPL_EN_RESET 0x04
#define SLEEP_CTRL_SMPL_EN_PWR_OFF 0x00
#define IRQ_BLOCK_SEL_USR_ADDR 0x1C0
#define IRQ_STATUS_RT_USR_ADDR 0x1C3
#define PM8921_LVS_REG_BASE 0x060
#define PM8921_LVS_CTRL_REG(id) (PM8921_LVS_REG_BASE + (2 * (id-1)))
#define PM8921_LVS_TEST_REG(id) (PM8921_LVS_CTRL_REG(id) + 1)
#define PM8921_RTC_CTRL 0x11D
#define PM8921_RTC_ALARM_ENABLE (1 << 1)
#define PM8921_LVS_100_CTRL_SW_EN (1 << 7)
#define PM8921_LVS_100_CTRL_SLEEP_B_IGNORE (1 << 4)
#define PM8921_LVS_100_TEST_VOUT_OK (1 << 6)
#define PM8921_MPP_REG_BASE 0x050
#define PM8921_MPP_CTRL_REG(id) (PM8921_MPP_REG_BASE + (id-1))
#define PM8921_MPP_CTRL_DIGITAL_OUTPUT (1 << 5)
#define PM8921_MPP_CTRL_VIO_1 (1 << 2)
#define PM8921_MPP_CTRL_OUTPUT_HIGH (1 << 0)
#define PM89XX_BAT_UP_THRESH_VOL 4
#define PM89XX_BAT_ALRM_THRESH 0x23
#define PM89XX_BAT_ALRM_CTRL 0x24
#define PM89XX_USB_OVP_CTRL 0x21C
#define PM89XX_BAT_ALRM_ENABLE BIT(7)
#define PM89XX_BAT_UPR_STATUS BIT(1)
#define PM89XX_BAT_LWR_STATUS BIT(0)
#define PM89XX_VBUS_INPUT_STATUS BIT(0)
/* voltages are specified in mV */
#define PLDO_MV_VMIN 1500
#define PLDO_MV_VMAX 3000
#define PLDO_MV_VSTEP 50
#define NLDO_MV_VMIN 750
#define NLDO_MV_VMAX 1525
#define NLDO_MV_VSTEP 25
#define PLDO_TYPE 0
#define NLDO_TYPE 1
#define PM8921_MVS_5V_HDMI_SWITCH 0x70
#define LDO(_name, _type, _test_reg, _ctrl_reg) \
{\
.name = _name,\
.type = _type,\
.test_reg = _test_reg,\
.ctrl_reg = _ctrl_reg, \
}
struct pm89xx_vreg ldo_data[] = {
LDO("LDO30", PLDO_TYPE, 0x0A3, 0x0A4),
LDO("LDO31", PLDO_TYPE, 0x0A5, 0x0A6),
LDO("LDO32", PLDO_TYPE, 0x0A7, 0x0A8),
LDO("LDO33", PLDO_TYPE, 0x0C6, 0x0C7),
LDO("LDO34", PLDO_TYPE, 0x0D2, 0x0D3),
LDO("LDO35", PLDO_TYPE, 0x0D4, 0x0D5),
LDO("LDO36", PLDO_TYPE, 0x0A9, 0x0AA),
};
bootable/bootloader/lk/dev/pmic/pm8921/pm8921_pwm.c
+327
View File
@@ -0,0 +1,327 @@
/*
* * Copyright (c) 2011, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of The Linux Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <debug.h>
#include <dev/pm8921.h>
#include <dev/pm8921_pwm.h>
static char *clks[NUM_CLOCKS] = {
"1K", "32768", "19.2M"
};
static unsigned pre_div[NUM_PRE_DIVIDE] = {
PRE_DIVIDE_0, PRE_DIVIDE_1, PRE_DIVIDE_2, PRE_DIVIDE_3
};
static unsigned int pt_t[NUM_PRE_DIVIDE][NUM_CLOCKS] = {
{ PRE_DIVIDE_0 * NSEC_1000HZ,
PRE_DIVIDE_0 * NSEC_32768HZ,
PRE_DIVIDE_0 * NSEC_19P2MHZ,
},
{ PRE_DIVIDE_1 * NSEC_1000HZ,
PRE_DIVIDE_1 * NSEC_32768HZ,
PRE_DIVIDE_1 * NSEC_19P2MHZ,
},
{ PRE_DIVIDE_2 * NSEC_1000HZ,
PRE_DIVIDE_2 * NSEC_32768HZ,
PRE_DIVIDE_2 * NSEC_19P2MHZ,
},
{ PRE_DIVIDE_2 * NSEC_1000HZ,
PRE_DIVIDE_2 * NSEC_32768HZ,
PRE_DIVIDE_2 * NSEC_19P2MHZ,
},
};
static uint16_t duty_msec[PM_PWM_1KHZ_COUNT_MAX + 1] = {
0, 1, 2, 3, 4, 6, 8, 16, 18, 24, 32, 36, 64, 128, 256, 512
};
static uint16_t pause_count[PM_PWM_PAUSE_COUNT_MAX + 1] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
23, 28, 31, 42, 47, 56, 63, 83, 94, 111, 125, 167, 188, 222, 250, 333,
375, 500, 667, 750, 800, 900, 1000, 1100,
1200, 1300, 1400, 1500, 1600, 1800, 2000, 2500,
3000, 3500, 4000, 4500, 5000, 5500, 6000, 6500,
7000
};
/* Function to get the PWM size, divider, clock for the given period */
static void pm8921_pwm_calc_period(uint32_t period_us,
struct pm8921_pwm_config *pwm_conf)
{
int n, m, clk, div;
int best_m, best_div, best_clk;
int last_err, cur_err, better_err, better_m;
uint32_t tmp_p, last_p, min_err, period_n;
/* PWM Period / N : handle underflow or overflow */
if (period_us < (PM_PWM_PERIOD_MAX / NSEC_PER_USEC))
period_n = (period_us * NSEC_PER_USEC) >> 6;
else
period_n = (period_us >> 6) * NSEC_PER_USEC;
if (period_n >= MAX_MPT)
{
n = 9;
period_n >>= 3;
}
else
n = 6;
min_err = MAX_MPT;
best_m = 0;
best_clk = 0;
best_div = 0;
for (clk = 0; clk < NUM_CLOCKS; clk++)
{
for (div = 0; div < NUM_PRE_DIVIDE; div++)
{
tmp_p = period_n;
last_p = tmp_p;
for (m = 0; m <= PM_PWM_M_MAX; m++)
{
if (tmp_p <= pt_t[div][clk])
{
/* Found local best */
if (!m)
{
better_err = pt_t[div][clk] - tmp_p;
better_m = m;
}
else
{
last_err = last_p - pt_t[div][clk];
cur_err = pt_t[div][clk] - tmp_p;
if (cur_err < last_err)
{
better_err = cur_err;
better_m = m;
}
else
{
better_err = last_err;
better_m = m - 1;
}
}
if (better_err < min_err)
{
min_err = better_err;
best_m = better_m;
best_clk = clk;
best_div = div;
}
break;
}
else
{
last_p = tmp_p;
tmp_p >>= 1;
}
}
}
}
pwm_conf->pwm_size = n;
pwm_conf->clk = best_clk;
pwm_conf->pre_div = best_div;
pwm_conf->pre_div_exp = best_m;
}
/* Function to configure PWM control registers with clock, divider values */
static int pm8921_pwm_configure(uint8_t pwm_id,
struct pm8921_pwm_config *pwm_conf,
pm8921_dev_t *dev)
{
int i, len, rc = -1;
uint8_t reg;
reg = (pwm_conf->pwm_size > 6) ? PM_PWM_SIZE_9_BIT : 0;
pwm_conf->pwm_ctl[5] = reg;
reg = ((pwm_conf->clk + 1) << PM_PWM_CLK_SEL_SHIFT)
& PM_PWM_CLK_SEL_MASK;
reg |= (pwm_conf->pre_div << PM_PWM_PREDIVIDE_SHIFT)
& PM_PWM_PREDIVIDE_MASK;
reg |= pwm_conf->pre_div_exp & PM_PWM_M_MASK;
pwm_conf->pwm_ctl[4] = reg;
/* Just to let know we bypass LUT */
if (pwm_conf->bypass_lut)
{
/* CTL0 is set in pwm_enable() */
pwm_conf->pwm_ctl[0] &= PM_PWM_PWM_START;
pwm_conf->pwm_ctl[1] = PM_PWM_BYPASS_LUT;
pwm_conf->pwm_ctl[2] = 0;
if (pwm_conf->pwm_size > 6)
{
pwm_conf->pwm_ctl[3] = pwm_conf->pwm_value
& PM_PWM_VALUE_BIT7_0;
pwm_conf->pwm_ctl[4] |= (pwm_conf->pwm_value >> 1)
& PM_PWM_VALUE_BIT8;
}
else
{
pwm_conf->pwm_ctl[3] = pwm_conf->pwm_value
& PM_PWM_VALUE_BIT5_0;
}
len = 6;
}
else
{
/* Right now, we are not using LUT */
goto bail_out;
}
/* Selecting the bank */
rc = dev->write(&pwm_id, 1, PM8921_LPG_BANK_SEL);
if (rc)
goto bail_out;
for (i = 0; i < len; i++)
{
rc = dev->write(&pwm_conf->pwm_ctl[i], 1, PM8921_LPG_CTL(i));
if (rc)
{
dprintf(CRITICAL, "pm8921_write() failed in \
pwm_configure %d\n", rc);
break;
}
}
bail_out:
if (rc)
dprintf(CRITICAL, "Error in pm8921_pwm_configure()\n");
return rc;
}
/* Top level function for configuring PWM
* Always called from the main pm8921.c file
*/
int pm8921_pwm_config(uint8_t pwm_id,
uint32_t duty_us,
uint32_t period_us,
pm8921_dev_t *dev)
{
struct pm8921_pwm_config pwm_conf;
uint32_t max_pwm_value, tmp;
int rc = -1;
if ((duty_us > period_us) || (period_us > PM_PWM_PERIOD_MAX) ||
(period_us < PM_PWM_PERIOD_MIN))
{
dprintf(CRITICAL, "Error in duty cycle and period\n");
return -1;
}
pm8921_pwm_calc_period(period_us, &pwm_conf);
/* Figure out pwm_value with overflow handling */
if (period_us > (1 << pwm_conf.pwm_size))
{
tmp = period_us;
tmp >>= pwm_conf.pwm_size;
pwm_conf.pwm_value = duty_us / tmp;
}
else
{
tmp = duty_us;
tmp <<= pwm_conf.pwm_size;
pwm_conf.pwm_value = tmp / period_us;
}
max_pwm_value = (1 << pwm_conf.pwm_size) - 1;
if (pwm_conf.pwm_value > max_pwm_value)
pwm_conf.pwm_value = max_pwm_value;
/* Bypassing LUT */
pwm_conf.bypass_lut = 1;
dprintf(SPEW, "duty/period=%u/%u usec: pwm_value=%d (of %d)\n",
duty_us, period_us, pwm_conf.pwm_value,
1 << pwm_conf.pwm_size);
rc = pm8921_pwm_configure(pwm_id, &pwm_conf, dev);
if (rc)
dprintf(CRITICAL, "Error in pwm_config()\n");
return rc;
}
/* Top level function to enable PWM with specified id
* Always called from the main pm8921.c file
*/
int pm8921_pwm_enable(uint8_t pwm_id, pm8921_dev_t *dev)
{
int rc = -1;
uint8_t reg;
/* Read it before enabling other bank */
rc = dev->read(&reg, 1, PM8921_LPG_BANK_ENABLE);
if (rc)
goto bail_out;
reg |= (1 << pwm_id);
rc = dev->write(&reg, 1, PM8921_LPG_BANK_ENABLE);
if (rc)
goto bail_out;
/* Selecting the bank */
rc = dev->write(&pwm_id, 1, PM8921_LPG_BANK_SEL);
if (rc)
goto bail_out;
/* Read it before setting PWM start */
rc = dev->read(&reg, 1, PM8921_LPG_CTL(0));
if (rc)
goto bail_out;
reg |= PM_PWM_PWM_START;
reg &= ~PM_PWM_RAMP_GEN_START;
rc = dev->write(&reg, 1, PM8921_LPG_CTL(0));
bail_out:
if (rc)
dprintf(CRITICAL, "Error in pwm_enable()\n");
return rc;
}
bootable/bootloader/lk/dev/pmic/pm8921/rules.mk
+8
View File
@@ -0,0 +1,8 @@
LOCAL_DIR := $(GET_LOCAL_DIR)
INCLUDES += -I$(LOCAL_DIR)/include
OBJS += \
$(LOCAL_DIR)/pm8921.o \
$(LOCAL_DIR)/pm8921_pwm.o \