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2024-09-09 08:59:52 +00:00
parent f75098198c
commit 46ba6f09ec
1372 changed files with 1231198 additions and 1184 deletions
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144
wlan/8192es/DriverSrcPkg/Driver/rtl8192cd_92es/data_88e/PHY_REG_PG_88E.txt Executable file
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//=========================
// PHY_related MAC register by channel, Wilson 091016
// Related from willis 090406 PHY_REG_PG.txt for 92S
//=========================
//Offset talbe_0 for for EEPROM_0x79[bit0~2]= 0 , Table_0 (20/40MHz, all channel)
// For Ant A
0xe00 0xffffffff 0x0a0c0c0c // base on 0x30 // for 18M,12M,09M,06M
0xe04 0xffffffff 0x02040608 // base on 0x30 // for 54M,48M,36M,24M
0xe08 0x0000ff00 0x00 // base on 0x30 // for CCK 1M
0x86c 0xffffff00 0x000000 // base on 0x30 // for CCK 11M, 5.5M, 2M use 17 dB
0xe10 0xffffffff 0x0a0c0d0e // base on 0x30 // for MCS=03,02,01,00
0xe14 0xffffffff 0x02040608 // base on 0x30 // for MCS=07,06,05,04
0xe18 0xffffffff 0x0a0c0d0e // base on 0x30 // for MCS=11,10,09,08
0xe1c 0xffffffff 0x02040608 // base on 0x30 // for MCS=15,14,13,12
// For Ant B
0x830 0xffffffff 0x0a0c0c0c // base on 0x32 // for 18M,12M,09M,06M
0x834 0xffffffff 0x02040608 // base on 0x32 // for 54M,48M,36M,24M
0x838 0xffffff00 0x000000 // base on 0x34 // for CCK 5.5M, 2M, 1M use 17dB
0x86c 0x000000ff 0x00 // base on 0x34 // for CCK 11M
0x83c 0xffffffff 0x0a0c0d0e // base on 0x32 // for MCS=03,02,01,00
0x848 0xffffffff 0x02040608 // base on 0x32 // for MCS=07,06,05,04
0x84c 0xffffffff 0x0a0c0d0e // base on 0x32 // for MCS=11,10,09,08
0x868 0xffffffff 0x02040608 // base on 0x32 // for MCS=15,14,13,12
//=========================
//Offset talbe_1 for EEPROM_0x79[bit0~2]= 1 Ch01-Ch03, Table _1 (20MHz, ch1~ch03)
// For Ant A
0xe00 0xffffffff 0x00000000 // base on 0x30 // for 18M,12M,09M,06M
0xe04 0xffffffff 0x00000000 // base on 0x30 // for 54M,48M,36M,24M
0xe08 0x0000ff00 0x00 // base on 0x30 // for CCK 1M
0x86c 0xffffff00 0x000000 // base on 0x30 // for CCK 11M, 5.5M, 2M use 17 dB
0xe10 0xffffffff 0x00000000 // base on 0x30 // for MCS=03,02,01,00
0xe14 0xffffffff 0x00000000 // base on 0x30 // for MCS=07,06,05,04
0xe18 0xffffffff 0x00000000 // base on 0x30 // for MCS=11,10,09,08
0xe1c 0xffffffff 0x00000000 // base on 0x30 // for MCS=15,14,13,12
// For Ant B
0x830 0xffffffff 0x00000000 // base on 0x32 // for 18M,12M,09M,06M
0x834 0xffffffff 0x00000000 // base on 0x32 // for 54M,48M,36M,24M
0x838 0xffffff00 0x000000 // base on 0x34 // for CCK 5.5M, 2M, 1M use 17dB
0x86c 0x000000ff 0x00 // base on 0x34 // for CCK 11M
0x83c 0xffffffff 0x00000000 // base on 0x32 // for MCS=03,02,01,00
0x848 0xffffffff 0x00000000 // base on 0x32 // for MCS=07,06,05,04
0x84c 0xffffffff 0x00000000 // base on 0x32 // for MCS=11,10,09,08
0x868 0xffffffff 0x00000000 // base on 0x32 // for MCS=15,14,13,12
//=========================
//Offset talbe_2 for Mode EEPROM_0x79[bit0~2]= 1 Ch04-Ch09, Table _2 (20MHz, ch4~ch09)
// For Ant A
0xe00 0xffffffff 0x04040404 // base on 0x30 // for 18M,12M,09M,06M
0xe04 0xffffffff 0x00020204 // base on 0x30 // for 54M,48M,36M,24M
0xe08 0x0000ff00 0x00 // base on 0x30 // for CCK 1M
0x86c 0xffffff00 0x000000 // base on 0x30 // for CCK 11M, 5.5M, 2M use 17 dB
0xe10 0xffffffff 0x06060606 // base on 0x30 // for MCS=03,02,01,00
0xe14 0xffffffff 0x00020406 // base on 0x30 // for MCS=07,06,05,04
0xe18 0xffffffff 0x00000000 // base on 0x30 // for MCS=11,10,09,08
0xe1c 0xffffffff 0x00000000 // base on 0x30 // for MCS=15,14,13,12
// For Ant B
0x830 0xffffffff 0x04040404 // base on 0x32 // for 18M,12M,09M,06M
0x834 0xffffffff 0x00020204 // base on 0x32 // for 54M,48M,36M,24M
0x838 0xffffff00 0x000000 // base on 0x34 // for CCK 5.5M, 2M, 1M use 17dB
0x86c 0x000000ff 0x00 // base on 0x34 // for CCK 11M
0x83c 0xffffffff 0x06060606 // base on 0x32 // for MCS=03,02,01,00
0x848 0xffffffff 0x00020406 // base on 0x32 // for MCS=07,06,05,04
0x84c 0xffffffff 0x00000000 // base on 0x32 // for MCS=11,10,09,08
0x868 0xffffffff 0x00000000 // base on 0x32 // for MCS=15,14,13,12 //for MCS=15,14,13,12
//=========================
//Offset talbe_3 for Mode EEPROM_0x79[bit0~2]= 1 Ch10-Ch14, Table _3 (20MHz, ch10~ch14)
// For Ant A
0xe00 0xffffffff 0x00000000 // base on 0x30 // for 18M,12M,09M,06M
0xe04 0xffffffff 0x00000000 // base on 0x30 // for 54M,48M,36M,24M
0xe08 0x0000ff00 0x00 // base on 0x30 // for CCK 1M
0x86c 0xffffff00 0x000000 // base on 0x30 // for CCK 11M, 5.5M, 2M use 17 dB
0xe10 0xffffffff 0x00000000 // base on 0x30 // for MCS=03,02,01,00
0xe14 0xffffffff 0x00000000 // base on 0x30 // for MCS=07,06,05,04
0xe18 0xffffffff 0x00000000 // base on 0x30 // for MCS=11,10,09,08
0xe1c 0xffffffff 0x00000000 // base on 0x30 // for MCS=15,14,13,12
// For Ant B
0x830 0xffffffff 0x00000000 // base on 0x32 // for 18M,12M,09M,06M
0x834 0xffffffff 0x00000000 // base on 0x32 // for 54M,48M,36M,24M
0x838 0xffffff00 0x000000 // base on 0x34 // for CCK 5.5M, 2M, 1M use 17dB
0x86c 0x000000ff 0x00 // base on 0x34 // for CCK 11M
0x83c 0xffffffff 0x00000000 // base on 0x32 // for MCS=03,02,01,00
0x848 0xffffffff 0x00000000 // base on 0x32 // for MCS=07,06,05,04
0x84c 0xffffffff 0x00000000 // base on 0x32 // for MCS=11,10,09,08
0x868 0xffffffff 0x00000000 // base on 0x32 // for MCS=15,14,13,12
//=========================
// Offset table _4 for EERPOM_0x79[bit0~2]= 1 Ch01-Ch03, Table _4 (40MHz, ch1~ch03)
// For Ant_A
0xe00 0xffffffff 0x00000000 // base on 0x2a // for 18M,12M,09M,06M
0xe04 0xffffffff 0x00000000 // base on 0x2a // for 54M,48M,36M,24M
0xe08 0x0000ff00 0x00 // base on 0x2a // for CCK 1M
0x86c 0xffffff00 0x000000 // base on 0x2a // for CCK 11M, 5.5M, 2M
0xe10 0xffffffff 0x00000000 // base on 0x2a // for MCS=03,02,01,00
0xe14 0xffffffff 0x00000000 // base on 0x2a // for MCS=07,06,05,04
0xe18 0xffffffff 0x00000000 // base on 0x2a // for MCS=11,10,09,08
0xe1c 0xffffffff 0x00000000 // base on 0x2a // for MCS=15,14,13,12
// For Ant_B
0x830 0xffffffff 0x00000000 // base on 0x2a // for 18M,12M,09M,06M
0x834 0xffffffff 0x00000000 // base on 0x2a // for 54M,48M,36M,24M
0x838 0xffffff00 0x000000 // base on 0x2a // for CCK 5.5M, 2M, 1M
0x86c 0x000000ff 0x00 // base on 0x2a // for CCK 11M
0x83c 0xffffffff 0x00000000 // base on 0x2a // for MCS=03,02,01,00
0x848 0xffffffff 0x00000000 // base on 0x2a // for MCS=07,06,05,04
0x84c 0xffffffff 0x00000000 // base on 0x2a // for MCS=11,10,09,08
0x868 0xffffffff 0x00000000 // base on 0x2a // for MCS=15,14,13,12
//=========================
// Offset table _5 for EEPROM_0x79[bit0~2]= 1 Ch04-Ch09, Table _5 (40MHz, ch4~ch09)
// For Ant_A
0xe00 0xffffffff 0x04040404 // base on 0x2a // for 18M,12M,09M,06M
0xe04 0xffffffff 0x00020204 // base on 0x2a // for 54M,48M,36M,24M
0xe08 0x0000ff00 0x00 // base on 0x2a // for CCK 1M
0x86c 0xffffff00 0x000000 // base on 0x2a // for CCK 11M, 5.5M, 2M
0xe10 0xffffffff 0x00000000 // base on 0x2a // for MCS=03,02,01,00
0xe14 0xffffffff 0x00000000 // base on 0x2a // for MCS=07,06,05,04
0xe18 0xffffffff 0x00000000 // base on 0x2a // for MCS=11,10,09,08
0xe1c 0xffffffff 0x00000000 // base on 0x2a // for MCS=15,14,13,12
// For Ant_B
0x830 0xffffffff 0x04040404 // base on 0x2a // for 18M,12M,09M,06M
0x834 0xffffffff 0x00020204 // base on 0x2a // for 54M,48M,36M,24M
0x838 0xffffff00 0x000000 // base on 0x2a // for CCK 5.5M, 2M, 1M
0x86c 0x000000ff 0x00 // base on 0x2a // for CCK 11M
0x83c 0xffffffff 0x00000000 // base on 0x2a // for MCS=03,02,01,00
0x848 0xffffffff 0x00000000 // base on 0x2a // for MCS=07,06,05,04
0x84c 0xffffffff 0x00000000 // base on 0x2a // for MCS=11,10,09,08
0x868 0xffffffff 0x00000000 // base on 0x2a // for MCS=15,14,13,12
//=========================
// Offset table _6 for EEPROM_0x79[bit0~2]= 1 Ch10-Ch14, Table _6 (40MHz, ch10~ch14)
// For Ant_A
0xe00 0xffffffff 0x00000000 // base on 0x2a // for 18M,12M,09M,06M
0xe04 0xffffffff 0x00000000 // base on 0x2a // for 54M,48M,36M,24M
0xe08 0x0000ff00 0x00 // base on 0x2a // for CCK 1M
0x86c 0xffffff00 0x000000 // base on 0x2a // for CCK 11M, 5.5M, 2M
0xe10 0xffffffff 0x00000000 // base on 0x2a // for MCS=03,02,01,00
0xe14 0xffffffff 0x00000000 // base on 0x2a // for MCS=07,06,05,04
0xe18 0xffffffff 0x00000000 // base on 0x2a // for MCS=11,10,09,08
0xe1c 0xffffffff 0x00000000 // base on 0x2a // for MCS=15,14,13,12
// For Ant_B
0x830 0xffffffff 0x00000000 // base on 0x2a // for 18M,12M,09M,06M
0x834 0xffffffff 0x00000000 // base on 0x2a // for 54M,48M,36M,24M
0x838 0xffffff00 0x000000 // base on 0x2a // for CCK 5.5M, 2M, 1M
0x86c 0x000000ff 0x00 // base on 0x2a // for CCK 11M
0x83c 0xffffffff 0x00000000 // base on 0x2a // for MCS=03,02,01,00
0x848 0xffffffff 0x00000000 // base on 0x2a // for MCS=07,06,05,04
0x84c 0xffffffff 0x00000000 // base on 0x2a // for MCS=11,10,09,08
0x868 0xffffffff 0x00000000 // base on 0x2a // for MCS=15,14,13,12
0xff //end of file

21
wlan/8192es/DriverSrcPkg/Driver/rtl8192cd_92es/data_88e/PHY_REG_PG_88E_new.txt Executable file
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//RL6286_MAC_PHY_Parameter_v024_20130125
#Exact
0xe00 21 21 22 22 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
0xe04 15 16 18 19 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
0xe08 0 0 20 0 // TXAGC codeword (H-byte->L-byte)={NA NA 1M NA}
0x86c 17 18 19 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M NA}
0xe10 20 21 22 22 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
0xe14 14 15 16 18 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
0xe18 19 20 21 21 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
0xe1c 13 14 15 17 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
0x830 21 21 22 22 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
0x834 15 16 18 19 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
0x838 18 19 20 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M NA}
0x86c 0 0 0 17 // TXAGC codeword (H-byte->L-byte)={NA NA NA NA 11M}
0x83c 20 21 22 22 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
0x848 14 15 16 18 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
0x84c 19 20 21 21 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
0x868 13 14 15 17 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
0xffff 0xffff

326
wlan/8192es/DriverSrcPkg/Driver/rtl8192cd_92es/data_88e/TXPWR_LMT_88E_new.txt Executable file
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// Tx Power Limit Table
// Format:
//
// Note: The order of the tables MUST match the definition in WLAN driver.
//
// Power Limit Table Parameter Definition
// Band: 2.4G/5G
// Bandwidth: 20/40/80/160 MHZ
// RF Path: 1/2/3/4 Transmit RF
// Rate Section: CCK/OFDM/HT/VHT
// Regulation: FCC/ETSI/MKK
//
// Description:
// 1. IF in 1T test
// 2. power is real dBm.
// 3. // is for comment.
//
// NA is non-release channle.
//
//
//Table 1: ===========================================
//
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
## START
## #3# FCC ETSI MKK
CH01 18 16 16
CH02 18 16 16
CH03 18 16 16
CH04 18 16 16
CH05 18 16 16
CH06 18 16 16
CH07 18 16 16
CH08 18 16 16
CH09 18 16 16
CH10 18 16 16
CH11 18 16 16
CH12 NA 16 16
CH13 NA 16 16
CH14 NA NA 16
## END
//
//Table 2: ===========================================
//
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
## START
## #3# FCC ETSI MKK
CH01 16 16 16
CH02 17 16 16
CH03 17 16 16
CH04 17 16 16
CH05 17 16 16
CH06 17 16 16
CH07 17 16 16
CH08 17 16 16
CH09 17 16 16
CH10 17 16 16
CH11 16 16 16
CH12 NA 16 16
CH13 NA 16 16
CH14 NA NA NA
## END
//
//Table 3: ===========================================
//
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
## START
## #3# FCC ETSI MKK
CH01 16 16 16
CH02 17 16 16
CH03 17 16 16
CH04 17 16 16
CH05 17 16 16
CH06 17 16 16
CH07 17 16 16
CH08 17 16 16
CH09 17 16 16
CH10 17 16 16
CH11 16 16 16
CH12 NA 16 16
CH13 NA 16 16
CH14 NA NA NA
## END
//
//Table 4: ===========================================
//
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
## START
## #3# FCC ETSI MKK
CH01 15 16 16
CH02 16 16 16
CH03 16 16 16
CH04 16 16 16
CH05 16 16 16
CH06 16 16 16
CH07 16 16 16
CH08 16 16 16
CH09 16 16 16
CH10 16 16 16
CH11 15 16 16
CH12 NA 16 16
CH13 NA 16 16
CH14 NA NA NA
## END
//
//Table 5: ===========================================
//
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
## START
## #3# FCC ETSI MKK
CH01 NA NA NA
CH02 NA NA NA
CH03 16 16 16
CH04 17 16 16
CH05 17 16 16
CH06 17 16 16
CH07 17 16 16
CH08 17 16 16
CH09 17 16 16
CH10 17 16 16
CH11 16 16 16
CH12 NA 16 16
CH13 NA 16 16
CH14 NA NA NA
## END
//
//Table 6: ===========================================
//
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
## START
## #3# FCC ETSI MKK
CH01 NA NA NA
CH02 NA NA NA
CH03 15 15 15
CH04 17 15 15
CH05 17 15 15
CH06 17 15 15
CH07 17 15 15
CH08 17 15 15
CH09 17 15 15
CH10 17 15 15
CH11 15 15 15
CH12 NA 16 16
CH13 NA 16 16
CH14 NA NA NA
## END
//
//Table 7: ===========================================
//
## 5G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
## START
## #3# FCC ETSI MKK
//5G Band 1
CH36 15 16 16
CH40 15 16 16
CH44 15 16 16
CH48 15 16 16
//5G Band 2
CH52 18 16 16
CH56 17 16 16
CH60 16 16 16
CH64 14 16 16
//5G Band 3
CH100 15 16 16
CH114 15 16 16
CH108 16 16 16
CH112 17 16 16
CH116 17 16 16
CH120 18 16 16
CH124 17 16 16
CH128 16 16 16
CH132 15 16 16
CH136 15 16 16
CH140 14 16 16
//5G Band 4
CH149 18 16 NA
CH153 18 16 NA
CH157 18 16 NA
CH161 18 16 NA
CH165 18 16 NA
## END
//
//Table 8: ======================================
//
## 5G, 20M, 1T, HT, //(MCS0~MCS7)
## START
## #3# FCC ETSI MKK
//5G Band 1
CH36 15 16 16
CH40 15 16 16
CH44 15 16 16
CH48 15 16 16
//5G Band 2
CH52 18 16 16
CH56 17 16 16
CH60 16 16 16
CH64 14 16 16
//5G Band 3
CH100 15 16 16
CH114 15 16 16
CH108 16 16 16
CH112 17 16 16
CH116 17 16 16
CH120 18 16 16
CH124 17 16 16
CH128 16 16 16
CH132 15 16 16
CH136 15 16 16
CH140 14 16 16
//5G Band 4
CH149 18 16 NA
CH153 18 16 NA
CH157 18 16 NA
CH161 18 16 NA
CH165 18 16 NA
## END
//
//Table 9: ===========================================
//
## 5G, 20M, 2T, HT, //(MCS8~MCS15)
## START
## #3# FCC ETSI MKK
//5G Band 1
CH36 14 15 15
CH40 14 15 15
CH44 14 15 15
CH48 14 15 15
//5G Band 2
CH52 17 15 15
CH56 16 15 15
CH60 15 15 15
CH64 13 15 15
//5G Band 3
CH100 14 15 15
CH114 14 15 15
CH108 15 15 15
CH112 16 15 15
CH116 16 15 15
CH120 17 15 15
CH124 16 15 15
CH128 15 15 15
CH132 14 15 15
CH136 14 15 15
CH140 13 15 15
//5G Band 4
CH149 17 15 NA
CH153 17 15 NA
CH157 17 15 NA
CH161 17 15 NA
CH165 17 15 NA
## END
//
//Table 10: ===========================================
//
## 5G, 40M, 1T, HT, //(MCS0~MCS7)
## START
## #3# FCC ETSI MKK
//5G Band 1
CH38 15 16 16
CH46 15 16 16
//5G Band 2
CH54 16 16 16
CH62 16 16 16
//5G Band 3
CH102 14 16 16
CH110 16 16 16
CH118 18 16 16
CH126 17 16 16
CH134 16 16 16
//5G Band 4
CH151 18 16 NA
CH159 18 16 NA
## END
//
//Table 11: ===========================================
//
## 5G;, 40M, 2T, HT, //(MCS8~MCS15)
## START
## #3# FCC ETSI MKK
//5G Band 1
CH38 14 15 15
CH46 14 15 15
//5G Band 2
CH54 15 15 15
CH62 15 15 15
//5G Band 3
CH102 13 15 15
CH110 15 15 15
CH118 17 15 15
CH126 16 15 15
CH134 15 15 15
//5G Band 4
CH151 17 15 NA
CH159 17 15 NA
## END
//
//Table 12: ===========================================
//
## 5G, 80M, 1T, VHT, //(MCS0~MCS9)
## START
## #3# FCC ETSI MKK
//5G Band 1
CH42 15 16 16
//5G Band 2
CH58 14 16 16
//5G Band 3
CH106 15 16 16
CH122 17 16 16
//5G Band 4
CH155 18 16 NA
## END
//
//Table 13: ===========================================
//
## 5G, 80M, 2T, VHT, //(MCS0~MCS9)
## START
## #3# FCC ETSI MKK
//5G Band 1
CH42 14 15 15
//5G Band 2
CH58 13 15 15
//5G Band 3
CH106 14 15 15
CH122 16 15 15
//5G Band 4
CH155 17 15 NA
## END