M7350v7_en_gpl
This commit is contained in:
T
114
wlan/8192es/DriverSrcPkg/Driver/rtl8192cd_92es/WlanHAL/Config/HalCfg.h_8192EE
Executable file
114
wlan/8192es/DriverSrcPkg/Driver/rtl8192cd_92es/WlanHAL/Config/HalCfg.h_8192EE
Executable file
@ -0,0 +1,114 @@
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||||
#ifndef __HALCFG_H__
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#define __HALCFG_H__
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||||
/*++
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||||
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
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||||
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||||
Module Name:
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||||
HalComDef.h
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||||
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||||
Abstract:
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||||
Defined HAL Mapping Type
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||||
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||||
Major Change History:
|
||||
When Who What
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||||
---------- --------------- -------------------------------
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||||
2012-03-23 Filen Create.
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||||
--*/
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||||
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||||
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||||
//1 Configuration below are decided by Driver
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//3 Driver provide some header files in order to eliminate warning message
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#include "../rtl8881a/8881a.h"
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//3 Mapping Basic Type
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#define VOID void
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||||
#define PVOID void *
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||||
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//typedef unsigned char BOOLEAN,*PBOOLEAN;
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||||
//typedef unsigned char UCHAR, *PUCHAR;
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||||
//typedef unsigned short USHORT, *PUSHORT;
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typedef short SHORT;
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||||
//typedef unsigned int ULONG, *PULONG;
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typedef long LONG;
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||||
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typedef long long LONGLONG;
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//typedef unsigned int UINT;
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typedef unsigned long long ULONGLONG;
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typedef unsigned long long LARGE_INTEGER;
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typedef unsigned char u1Byte,*pu1Byte;
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typedef unsigned short u2Byte,*pu2Byte;
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typedef unsigned int u4Byte,*pu4Byte;
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typedef unsigned long long u8Byte,*pu8Byte;
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typedef signed char s1Byte,*ps1Byte;
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typedef signed short s2Byte,*ps2Byte;
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typedef signed int s4Byte,*ps4Byte;
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typedef signed long long s8Byte,*ps8Byte;
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typedef unsigned long long ULONG64,*PULONG64;
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//typedef unsigned char UINT8;
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//typedef unsigned short UINT16;
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//typedef unsigned int UINT32;
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//typedef signed int INT32;
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//typedef signed char INT8;
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//typedef signed int INT;
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typedef const unsigned char cu8;
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typedef __signed char s8;
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//typedef unsigned char u8;
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typedef __signed short s16;
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//typedef unsigned short u16;
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typedef __signed int s32;
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//typedef unsigned int u32;
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typedef __signed__ long s64;
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//typedef unsigned long u64;
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//3 Mapping IO
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#define HAL_PADAPTER PRTL8192CD_PRIV
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#define HAL_RTL_R8(reg) \
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(RTL_R8_F(Adapter, reg))
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#define HAL_RTL_R16(reg) \
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(RTL_R16_F(Adapter, reg))
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#define HAL_RTL_R32(reg) \
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(RTL_R32_F(Adapter, reg))
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#define HAL_RTL_W8(reg, val8) \
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do { \
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RTL_W8_F(Adapter, reg, val8); \
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} while (0)
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#define HAL_RTL_W16(reg, val16) \
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do { \
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RTL_W16_F(Adapter, reg, val16); \
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} while (0)
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#define HAL_RTL_W32(reg, val32) \
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do { \
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RTL_W32_F(Adapter, reg, val32) ; \
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} while (0)
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//3 Mapping Linker Section
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#define __HAL_MIPS16__
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#define __HAL_FAST__
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#define __HAL_MIDIUM__
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#define __HAL_LOW__
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//3 Mapping Critical Section Protection Method
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//3 Mapping Debug
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#define HALprintf printk
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#endif //#ifndef __HALCFG_H__
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114
wlan/8192es/DriverSrcPkg/Driver/rtl8192cd_92es/WlanHAL/Config/HalCfg.h_8881A
Executable file
114
wlan/8192es/DriverSrcPkg/Driver/rtl8192cd_92es/WlanHAL/Config/HalCfg.h_8881A
Executable file
@ -0,0 +1,114 @@
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||||
#ifndef __HALCFG_H__
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||||
#define __HALCFG_H__
|
||||
/*++
|
||||
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
|
||||
|
||||
Module Name:
|
||||
HalComDef.h
|
||||
|
||||
Abstract:
|
||||
Defined HAL Mapping Type
|
||||
|
||||
Major Change History:
|
||||
When Who What
|
||||
---------- --------------- -------------------------------
|
||||
2012-03-23 Filen Create.
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||||
--*/
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||||
|
||||
|
||||
//1 Configuration below are decided by Driver
|
||||
|
||||
//3 Driver provide some header files in order to eliminate warning message
|
||||
#include "../rtl8881a/8881a.h"
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||||
|
||||
//3 Mapping Basic Type
|
||||
#define VOID void
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||||
#define PVOID void *
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||||
|
||||
//typedef unsigned char BOOLEAN,*PBOOLEAN;
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||||
//typedef unsigned char UCHAR, *PUCHAR;
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||||
//typedef unsigned short USHORT, *PUSHORT;
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||||
typedef short SHORT;
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||||
//typedef unsigned int ULONG, *PULONG;
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||||
typedef long LONG;
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||||
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||||
typedef long long LONGLONG;
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||||
//typedef unsigned int UINT;
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||||
typedef unsigned long long ULONGLONG;
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||||
typedef unsigned long long LARGE_INTEGER;
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||||
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typedef unsigned char u1Byte,*pu1Byte;
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||||
typedef unsigned short u2Byte,*pu2Byte;
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||||
typedef unsigned int u4Byte,*pu4Byte;
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||||
typedef unsigned long long u8Byte,*pu8Byte;
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||||
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||||
typedef signed char s1Byte,*ps1Byte;
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typedef signed short s2Byte,*ps2Byte;
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||||
typedef signed int s4Byte,*ps4Byte;
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||||
typedef signed long long s8Byte,*ps8Byte;
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typedef unsigned long long ULONG64,*PULONG64;
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||||
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||||
//typedef unsigned char UINT8;
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||||
//typedef unsigned short UINT16;
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||||
//typedef unsigned int UINT32;
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||||
//typedef signed int INT32;
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||||
//typedef signed char INT8;
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||||
//typedef signed int INT;
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||||
|
||||
typedef const unsigned char cu8;
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||||
|
||||
typedef __signed char s8;
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||||
//typedef unsigned char u8;
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||||
|
||||
typedef __signed short s16;
|
||||
//typedef unsigned short u16;
|
||||
|
||||
typedef __signed int s32;
|
||||
//typedef unsigned int u32;
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||||
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||||
typedef __signed__ long s64;
|
||||
//typedef unsigned long u64;
|
||||
|
||||
|
||||
//3 Mapping IO
|
||||
#define HAL_PADAPTER PRTL8192CD_PRIV
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||||
#define HAL_RTL_R8(reg) \
|
||||
(RTL_R8_F(Adapter, reg))
|
||||
|
||||
#define HAL_RTL_R16(reg) \
|
||||
(RTL_R16_F(Adapter, reg))
|
||||
|
||||
#define HAL_RTL_R32(reg) \
|
||||
(RTL_R32_F(Adapter, reg))
|
||||
|
||||
#define HAL_RTL_W8(reg, val8) \
|
||||
do { \
|
||||
RTL_W8_F(Adapter, reg, val8); \
|
||||
} while (0)
|
||||
|
||||
#define HAL_RTL_W16(reg, val16) \
|
||||
do { \
|
||||
RTL_W16_F(Adapter, reg, val16); \
|
||||
} while (0)
|
||||
|
||||
#define HAL_RTL_W32(reg, val32) \
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||||
do { \
|
||||
RTL_W32_F(Adapter, reg, val32) ; \
|
||||
} while (0)
|
||||
|
||||
|
||||
//3 Mapping Linker Section
|
||||
#define __HAL_MIPS16__
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||||
#define __HAL_FAST__
|
||||
#define __HAL_MIDIUM__
|
||||
#define __HAL_LOW__
|
||||
|
||||
|
||||
//3 Mapping Critical Section Protection Method
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||||
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||||
|
||||
//3 Mapping Debug
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||||
#define HALprintf printk
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||||
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||||
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||||
#endif //#ifndef __HALCFG_H__
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@ -0,0 +1,131 @@
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||||
//// AGC_TABLE 1 for CG
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||||
0xc78 0xfb000001 //-110
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||||
0xc78 0xfb010001
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||||
0xc78 0xfb020001
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||||
0xc78 0xfb030001
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||||
0xc78 0xfb040001
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||||
0xc78 0xfb050001 //-100
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||||
0xc78 0xfb060001
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||||
0xc78 0xfb070001
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||||
0xc78 0xfb080001
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||||
0xc78 0xfa090001
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||||
0xc78 0xf90A0001 //-90
|
||||
0xc78 0xf80B0001
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||||
0xc78 0xf70C0001
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||||
0xc78 0xf60D0001
|
||||
0xc78 0xf50E0001
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||||
0xc78 0xf40F0001 //-80
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||||
0xc78 0xf3100001
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||||
0xc78 0xf2110001
|
||||
0xc78 0xf1120001
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||||
0xc78 0xf0130001
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||||
0xc78 0xef140001 //-70
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||||
0xc78 0xee150001
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0xc78 0xed160001
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||||
0xc78 0xeb170001
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||||
0xc78 0xea180001
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0xc78 0xe9190001 //-60
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||||
0xc78 0xe81A0001
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||||
0xc78 0xe71B0001
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0xc78 0xe61C0001
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0xc78 0xe51D0001
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0xc78 0xe41E0001 //-50
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0xc78 0xe31F0001
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||||
0xc78 0xe2200001
|
||||
0xc78 0xc5210001
|
||||
0xc78 0xc4220001
|
||||
0xc78 0xc3230001 //-40
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||||
0xc78 0x04240001
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||||
0xc78 0x03250001
|
||||
0xc78 0x02260001
|
||||
0xc78 0xa6270001
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||||
0xc78 0xa5280001 //-30
|
||||
0xc78 0xa4290001
|
||||
0xc78 0x852A0001
|
||||
0xc78 0x842B0001
|
||||
0xc78 0x832C0001
|
||||
0xc78 0x822D0001 //-20
|
||||
0xc78 0x242E0001
|
||||
0xc78 0x232F0001
|
||||
0xc78 0x22300001
|
||||
0xc78 0x66310001
|
||||
0xc78 0x65320001 //-10
|
||||
0xc78 0x64330001
|
||||
0xc78 0x63340001
|
||||
0xc78 0x62350001
|
||||
0xc78 0x61360001
|
||||
0xc78 0x46370001 //0
|
||||
0xc78 0x45380001
|
||||
0xc78 0x44390001
|
||||
0xc78 0x433A0001
|
||||
0xc78 0x423B0001
|
||||
0xc78 0x413C0001 //10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001 //16
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfb400001 //-110
|
||||
0xc78 0xfb410001
|
||||
0xc78 0xfb420001
|
||||
0xc78 0xfb430001
|
||||
0xc78 0xfb440001
|
||||
0xc78 0xfb450001 //-100
|
||||
0xc78 0xfa460001
|
||||
0xc78 0xf9470001
|
||||
0xc78 0xf8480001
|
||||
0xc78 0xf7490001
|
||||
0xc78 0xf64a0001 //-90
|
||||
0xc78 0xf54b0001
|
||||
0xc78 0xf44c0001
|
||||
0xc78 0xf34d0001
|
||||
0xc78 0xf24e0001
|
||||
0xc78 0xf14f0001 //-80
|
||||
0xc78 0xf0500001
|
||||
0xc78 0xef510001
|
||||
0xc78 0xee520001
|
||||
0xc78 0xed530001
|
||||
0xc78 0xec540001 //-70
|
||||
0xc78 0xeb550001
|
||||
0xc78 0xea560001
|
||||
0xc78 0xe9570001
|
||||
0xc78 0xe8580001
|
||||
0xc78 0xe7590001 //-60
|
||||
0xc78 0xe65a0001
|
||||
0xc78 0xe55b0001
|
||||
0xc78 0xe45c0001
|
||||
0xc78 0xe35d0001
|
||||
0xc78 0xe25e0001 //-50
|
||||
0xc78 0xe15f0001
|
||||
0xc78 0x8a600001
|
||||
0xc78 0x89610001
|
||||
0xc78 0x88620001
|
||||
0xc78 0x87630001 //-40
|
||||
0xc78 0x86640001
|
||||
0xc78 0x85650001
|
||||
0xc78 0x84660001
|
||||
0xc78 0x83670001
|
||||
0xc78 0x82680001 //-30
|
||||
0xc78 0x6b690001
|
||||
0xc78 0x6a6a0001
|
||||
0xc78 0x696b0001
|
||||
0xc78 0x686c0001
|
||||
0xc78 0x676d0001 //-20
|
||||
0xc78 0x666e0001
|
||||
0xc78 0x656f0001
|
||||
0xc78 0x64700001
|
||||
0xc78 0x63710001
|
||||
0xc78 0x62720001 //-10
|
||||
0xc78 0x61730001
|
||||
0xc78 0x46740001
|
||||
0xc78 0x45750001
|
||||
0xc78 0x44760001
|
||||
0xc78 0x43770001 //0
|
||||
0xc78 0x42780001
|
||||
0xc78 0x41790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,133 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v029_MP_20140219 / LTE blocking
|
||||
0xc78 0xfb000001 //-110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfb020001
|
||||
0xc78 0xfb030001
|
||||
0xc78 0xfb040001
|
||||
0xc78 0xfb050001 //-100
|
||||
0xc78 0xfb060001
|
||||
0xc78 0xfb070001
|
||||
0xc78 0xfa080001
|
||||
0xc78 0xf9090001
|
||||
0xc78 0xf80A0001 //-90
|
||||
0xc78 0xf70B0001
|
||||
0xc78 0xf60C0001
|
||||
0xc78 0xf50D0001
|
||||
0xc78 0xf40E0001
|
||||
0xc78 0xf30F0001 //-80
|
||||
0xc78 0xf2100001
|
||||
0xc78 0xf1110001
|
||||
0xc78 0xf0120001
|
||||
0xc78 0xef130001
|
||||
0xc78 0xee140001 //-70
|
||||
0xc78 0xed150001
|
||||
0xc78 0xec160001
|
||||
0xc78 0xeb170001
|
||||
0xc78 0xea180001
|
||||
0xc78 0xe9190001 //-60
|
||||
0xc78 0xc81A0001
|
||||
0xc78 0xc71B0001
|
||||
0xc78 0xc61C0001
|
||||
0xc78 0x071D0001
|
||||
0xc78 0x061E0001 //-50
|
||||
0xc78 0x051F0001
|
||||
0xc78 0x04200001
|
||||
0xc78 0x03210001
|
||||
0xc78 0xaa220001
|
||||
0xc78 0xa9230001 //-40
|
||||
0xc78 0xa8240001
|
||||
0xc78 0xa7250001
|
||||
0xc78 0xa6260001
|
||||
0xc78 0x85270001
|
||||
0xc78 0x84280001 //-30
|
||||
0xc78 0x83290001
|
||||
0xc78 0x252A0001
|
||||
0xc78 0x242B0001
|
||||
0xc78 0x232C0001
|
||||
0xc78 0x222D0001 //-20
|
||||
0xc78 0x672E0001
|
||||
0xc78 0x662F0001
|
||||
0xc78 0x65300001
|
||||
0xc78 0x64310001
|
||||
0xc78 0x63320001 //-10
|
||||
0xc78 0x62330001
|
||||
0xc78 0x61340001
|
||||
0xc78 0x45350001
|
||||
0xc78 0x44360001
|
||||
0xc78 0x43370001 //0
|
||||
0xc78 0x42380001
|
||||
0xc78 0x41390001
|
||||
0xc78 0x403A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 //10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001 //16
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfb400001 //-110
|
||||
0xc78 0xfb410001
|
||||
0xc78 0xfb420001
|
||||
0xc78 0xfb430001
|
||||
0xc78 0xfb440001
|
||||
0xc78 0xfb450001 //-100
|
||||
0xc78 0xfa460001
|
||||
0xc78 0xf9470001
|
||||
0xc78 0xf8480001
|
||||
0xc78 0xf7490001
|
||||
0xc78 0xf64a0001 //-90
|
||||
0xc78 0xf54b0001
|
||||
0xc78 0xf44c0001
|
||||
0xc78 0xf34d0001
|
||||
0xc78 0xf24e0001
|
||||
0xc78 0xf14f0001 //-80
|
||||
0xc78 0xf0500001
|
||||
0xc78 0xef510001
|
||||
0xc78 0xee520001
|
||||
0xc78 0xed530001
|
||||
0xc78 0xec540001 //-70
|
||||
0xc78 0xeb550001
|
||||
0xc78 0xea560001
|
||||
0xc78 0xe9570001
|
||||
0xc78 0xe8580001
|
||||
0xc78 0xe7590001 //-60
|
||||
0xc78 0xe65a0001
|
||||
0xc78 0xe55b0001
|
||||
0xc78 0xe45c0001
|
||||
0xc78 0xe35d0001
|
||||
0xc78 0xe25e0001 //-50
|
||||
0xc78 0xe15f0001
|
||||
0xc78 0x8a600001
|
||||
0xc78 0x89610001
|
||||
0xc78 0x88620001
|
||||
0xc78 0x87630001 //-40
|
||||
0xc78 0x86640001
|
||||
0xc78 0x85650001
|
||||
0xc78 0x84660001
|
||||
0xc78 0x83670001
|
||||
0xc78 0x82680001 //-30
|
||||
0xc78 0x6b690001
|
||||
0xc78 0x6a6a0001
|
||||
0xc78 0x696b0001
|
||||
0xc78 0x686c0001
|
||||
0xc78 0x676d0001 //-20
|
||||
0xc78 0x666e0001
|
||||
0xc78 0x656f0001
|
||||
0xc78 0x64700001
|
||||
0xc78 0x63710001
|
||||
0xc78 0x62720001 //-10
|
||||
0xc78 0x61730001
|
||||
0xc78 0x49740001
|
||||
0xc78 0x48750001
|
||||
0xc78 0x47760001
|
||||
0xc78 0x46770001 //0
|
||||
0xc78 0x45780001
|
||||
0xc78 0x44790001
|
||||
0xc78 0x437a0001
|
||||
0xc78 0x427b0001
|
||||
0xc78 0x417c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040022
|
||||
0xc50 0x00040020
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,133 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v023_MP_20130910
|
||||
0xc78 0xff400001 // -110
|
||||
0xc78 0xff410001
|
||||
0xc78 0xff420001
|
||||
0xc78 0xfe430001
|
||||
0xc78 0xfd440001
|
||||
0xc78 0xfc450001 // -100
|
||||
0xc78 0xfb460001
|
||||
0xc78 0xfa470001
|
||||
0xc78 0xf9480001
|
||||
0xc78 0xf8490001
|
||||
0xc78 0xf74a0001 // -90
|
||||
0xc78 0xf64b0001
|
||||
0xc78 0xf54c0001
|
||||
0xc78 0xf44d0001
|
||||
0xc78 0xf34e0001
|
||||
0xc78 0xf24f0001 // -80
|
||||
0xc78 0xf1500001
|
||||
0xc78 0xf0510001
|
||||
0xc78 0xef520001
|
||||
0xc78 0xee530001
|
||||
0xc78 0xed540001 // -70
|
||||
0xc78 0xec550001
|
||||
0xc78 0xeb560001
|
||||
0xc78 0xea570001
|
||||
0xc78 0xe9580001
|
||||
0xc78 0xe8590001 // -60
|
||||
0xc78 0xe75a0001
|
||||
0xc78 0xe65b0001
|
||||
0xc78 0xe55c0001
|
||||
0xc78 0xe45d0001
|
||||
0xc78 0xe35e0001 // -50
|
||||
0xc78 0x885f0001
|
||||
0xc78 0x87600001
|
||||
0xc78 0x86610001
|
||||
0xc78 0xaa620001
|
||||
0xc78 0xa9630001 // -40
|
||||
0xc78 0xa8640001
|
||||
0xc78 0xa7650001
|
||||
0xc78 0xa6660001
|
||||
0xc78 0x67670001
|
||||
0xc78 0x66680001 //-30
|
||||
0xc78 0x65690001
|
||||
0xc78 0x646a0001
|
||||
0xc78 0x636b0001
|
||||
0xc78 0x4b6c0001
|
||||
0xc78 0x4a6d0001 // -20
|
||||
0xc78 0x496e0001
|
||||
0xc78 0x486f0001
|
||||
0xc78 0x47700001
|
||||
0xc78 0x46710001
|
||||
0xc78 0x45720001 // -10
|
||||
0xc78 0x44730001
|
||||
0xc78 0x43740001
|
||||
0xc78 0x42750001
|
||||
0xc78 0x41760001
|
||||
0xc78 0x40770001 // 0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 // 10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xff400001 //-110
|
||||
0xc78 0xff410001
|
||||
0xc78 0xff420001
|
||||
0xc78 0xfe430001
|
||||
0xc78 0xfd440001
|
||||
0xc78 0xfc450001 //-100
|
||||
0xc78 0xfb460001
|
||||
0xc78 0xfa470001
|
||||
0xc78 0xf9480001
|
||||
0xc78 0xf8490001
|
||||
0xc78 0xf74a0001 //-90
|
||||
0xc78 0xf64b0001
|
||||
0xc78 0xf54c0001
|
||||
0xc78 0xf44d0001
|
||||
0xc78 0xf34e0001
|
||||
0xc78 0xf24f0001 //-80
|
||||
0xc78 0xf1500001
|
||||
0xc78 0xf0510001
|
||||
0xc78 0xef520001
|
||||
0xc78 0xee530001
|
||||
0xc78 0xed540001 //-70
|
||||
0xc78 0xec550001
|
||||
0xc78 0xeb560001
|
||||
0xc78 0xea570001
|
||||
0xc78 0xe9580001
|
||||
0xc78 0xe8590001 //-60
|
||||
0xc78 0xe75a0001
|
||||
0xc78 0xe65b0001
|
||||
0xc78 0xe55c0001
|
||||
0xc78 0xe45d0001
|
||||
0xc78 0xe35e0001 //-50
|
||||
0xc78 0x885f0001
|
||||
0xc78 0x87600001
|
||||
0xc78 0x86610001
|
||||
0xc78 0xaa620001
|
||||
0xc78 0xa9630001 //-40
|
||||
0xc78 0xa8640001
|
||||
0xc78 0xa7650001
|
||||
0xc78 0xa6660001
|
||||
0xc78 0x67670001
|
||||
0xc78 0x66680001 //-30
|
||||
0xc78 0x65690001
|
||||
0xc78 0x646a0001
|
||||
0xc78 0x636b0001
|
||||
0xc78 0x4b6c0001
|
||||
0xc78 0x4a6d0001 //-20
|
||||
0xc78 0x496e0001
|
||||
0xc78 0x486f0001
|
||||
0xc78 0x47700001
|
||||
0xc78 0x46710001
|
||||
0xc78 0x45720001 //-10
|
||||
0xc78 0x44730001
|
||||
0xc78 0x43740001
|
||||
0xc78 0x42750001
|
||||
0xc78 0x41760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040222
|
||||
0xc50 0x00040220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,133 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v023_MP_20130910
|
||||
0xc78 0xff000001 // -110
|
||||
0xc78 0xff010001
|
||||
0xc78 0xff020001
|
||||
0xc78 0xff030001
|
||||
0xc78 0xff040001
|
||||
0xc78 0xfe050001 // -100
|
||||
0xc78 0xfd060001
|
||||
0xc78 0xfc070001
|
||||
0xc78 0xfb080001
|
||||
0xc78 0xfa090001
|
||||
0xc78 0xf90A0001 // -90
|
||||
0xc78 0xf80B0001
|
||||
0xc78 0xf70C0001
|
||||
0xc78 0xf60D0001
|
||||
0xc78 0xf50E0001
|
||||
0xc78 0xf40F0001 // -80
|
||||
0xc78 0xf3100001
|
||||
0xc78 0xf2110001
|
||||
0xc78 0xf1120001
|
||||
0xc78 0xf0130001
|
||||
0xc78 0xef140001 // -70
|
||||
0xc78 0xee150001
|
||||
0xc78 0xed160001
|
||||
0xc78 0xec170001
|
||||
0xc78 0xeb180001
|
||||
0xc78 0xea190001 // -60
|
||||
0xc78 0xe91A0001
|
||||
0xc78 0xe81B0001
|
||||
0xc78 0xe71C0001
|
||||
0xc78 0xe61D0001
|
||||
0xc78 0xe51E0001 // -50
|
||||
0xc78 0x891F0001
|
||||
0xc78 0x88200001
|
||||
0xc78 0x87210001
|
||||
0xc78 0x86220001
|
||||
0xc78 0xa9230001 // -40
|
||||
0xc78 0xa8240001
|
||||
0xc78 0x6a250001
|
||||
0xc78 0x69260001
|
||||
0xc78 0x68270001
|
||||
0xc78 0x67280001 //-30
|
||||
0xc78 0x66290001
|
||||
0xc78 0x652A0001
|
||||
0xc78 0x642B0001
|
||||
0xc78 0x4a2C0001
|
||||
0xc78 0x492D0001 // -20
|
||||
0xc78 0x482E0001
|
||||
0xc78 0x472F0001
|
||||
0xc78 0x46300001
|
||||
0xc78 0x45310001
|
||||
0xc78 0x44320001 // -10
|
||||
0xc78 0x43330001
|
||||
0xc78 0x42340001
|
||||
0xc78 0x41350001
|
||||
0xc78 0x40360001
|
||||
0xc78 0x40370001 // 0
|
||||
0xc78 0x40380001
|
||||
0xc78 0x40390001
|
||||
0xc78 0x403A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xff400001 //-110
|
||||
0xc78 0xff410001
|
||||
0xc78 0xff420001
|
||||
0xc78 0xff430001
|
||||
0xc78 0xff440001
|
||||
0xc78 0xfe450001 //-100
|
||||
0xc78 0xfd460001
|
||||
0xc78 0xfc470001
|
||||
0xc78 0xfb480001
|
||||
0xc78 0xfa490001
|
||||
0xc78 0xf94a0001 //-90
|
||||
0xc78 0xf84b0001
|
||||
0xc78 0xf74c0001
|
||||
0xc78 0xf64d0001
|
||||
0xc78 0xf54e0001
|
||||
0xc78 0xf44f0001 //-80
|
||||
0xc78 0xf3500001
|
||||
0xc78 0xf2510001
|
||||
0xc78 0xf1520001
|
||||
0xc78 0xf0530001
|
||||
0xc78 0xef540001 //-70
|
||||
0xc78 0xee550001
|
||||
0xc78 0xed560001
|
||||
0xc78 0xec570001
|
||||
0xc78 0xeb580001
|
||||
0xc78 0xea590001 //-60
|
||||
0xc78 0xe95a0001
|
||||
0xc78 0xe85b0001
|
||||
0xc78 0xe75c0001
|
||||
0xc78 0xe65d0001
|
||||
0xc78 0xe55e0001 //-50
|
||||
0xc78 0x895f0001
|
||||
0xc78 0x88600001
|
||||
0xc78 0x87610001
|
||||
0xc78 0x86620001
|
||||
0xc78 0xa9630001 //-40
|
||||
0xc78 0xa8640001
|
||||
0xc78 0x6a650001
|
||||
0xc78 0x69660001
|
||||
0xc78 0x68670001
|
||||
0xc78 0x67680001 //-30
|
||||
0xc78 0x66690001
|
||||
0xc78 0x656a0001
|
||||
0xc78 0x646b0001
|
||||
0xc78 0x4a6c0001
|
||||
0xc78 0x496d0001 //-20
|
||||
0xc78 0x486e0001
|
||||
0xc78 0x476f0001
|
||||
0xc78 0x46700001
|
||||
0xc78 0x45710001
|
||||
0xc78 0x44720001 //-10
|
||||
0xc78 0x43730001
|
||||
0xc78 0x42740001
|
||||
0xc78 0x41750001
|
||||
0xc78 0x40760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040222
|
||||
0xc50 0x00040220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,133 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v023_MP_20130910
|
||||
0xc78 0xfb000001 // -110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfb020001
|
||||
0xc78 0xfb030001
|
||||
0xc78 0xfb040001
|
||||
0xc78 0xfb050001 // -100
|
||||
0xc78 0xfb060001
|
||||
0xc78 0xfb070001
|
||||
0xc78 0xfa080001
|
||||
0xc78 0xf9090001
|
||||
0xc78 0xf80A0001 // -90
|
||||
0xc78 0xf70B0001
|
||||
0xc78 0xf60C0001
|
||||
0xc78 0xf50D0001
|
||||
0xc78 0xf40E0001
|
||||
0xc78 0xf30F0001 // -80
|
||||
0xc78 0xf2100001
|
||||
0xc78 0xf1110001
|
||||
0xc78 0xf0120001
|
||||
0xc78 0xef130001
|
||||
0xc78 0xee140001 // -70
|
||||
0xc78 0xed150001
|
||||
0xc78 0xec160001
|
||||
0xc78 0xeb170001
|
||||
0xc78 0xea180001
|
||||
0xc78 0xe9190001 // -60
|
||||
0xc78 0xe81A0001
|
||||
0xc78 0xe71B0001
|
||||
0xc78 0xe61C0001
|
||||
0xc78 0xe51D0001
|
||||
0xc78 0xe41E0001 // -50
|
||||
0xc78 0xe31F0001
|
||||
0xc78 0xe2200001
|
||||
0xc78 0xe1210001
|
||||
0xc78 0x8a220001
|
||||
0xc78 0x89230001 // -40
|
||||
0xc78 0x88240001
|
||||
0xc78 0x87250001
|
||||
0xc78 0x86260001
|
||||
0xc78 0x85270001
|
||||
0xc78 0x84280001 //-30
|
||||
0xc78 0x83290001
|
||||
0xc78 0x822A0001
|
||||
0xc78 0x6a2B0001
|
||||
0xc78 0x692C0001
|
||||
0xc78 0x682D0001 // -20
|
||||
0xc78 0x672E0001
|
||||
0xc78 0x662F0001
|
||||
0xc78 0x65300001
|
||||
0xc78 0x64310001
|
||||
0xc78 0x63320001 // -10
|
||||
0xc78 0x62330001
|
||||
0xc78 0x61340001
|
||||
0xc78 0x60350001
|
||||
0xc78 0x47360001
|
||||
0xc78 0x46370001 // 0
|
||||
0xc78 0x45380001
|
||||
0xc78 0x44390001
|
||||
0xc78 0x433A0001
|
||||
0xc78 0x423B0001
|
||||
0xc78 0x413C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfb400001 //-110
|
||||
0xc78 0xfb410001
|
||||
0xc78 0xfb420001
|
||||
0xc78 0xfb430001
|
||||
0xc78 0xfb440001
|
||||
0xc78 0xfb450001 //-100
|
||||
0xc78 0xfb460001
|
||||
0xc78 0xfb470001
|
||||
0xc78 0xfa480001
|
||||
0xc78 0xf9490001
|
||||
0xc78 0xf84a0001 //-90
|
||||
0xc78 0xf74b0001
|
||||
0xc78 0xf64c0001
|
||||
0xc78 0xf54d0001
|
||||
0xc78 0xf44e0001
|
||||
0xc78 0xf34f0001 //-80
|
||||
0xc78 0xf2500001
|
||||
0xc78 0xf1510001
|
||||
0xc78 0xf0520001
|
||||
0xc78 0xef530001
|
||||
0xc78 0xee540001 //-70
|
||||
0xc78 0xed550001
|
||||
0xc78 0xec560001
|
||||
0xc78 0xeb570001
|
||||
0xc78 0xea580001
|
||||
0xc78 0xe9590001 //-60
|
||||
0xc78 0xe85a0001
|
||||
0xc78 0xe75b0001
|
||||
0xc78 0xe65c0001
|
||||
0xc78 0xe55d0001
|
||||
0xc78 0xe45e0001 //-50
|
||||
0xc78 0xe35f0001
|
||||
0xc78 0xe2600001
|
||||
0xc78 0xe1610001
|
||||
0xc78 0x8a620001
|
||||
0xc78 0x89630001 //-40
|
||||
0xc78 0x88640001
|
||||
0xc78 0x87650001
|
||||
0xc78 0x86660001
|
||||
0xc78 0x85670001
|
||||
0xc78 0x84680001 //-30
|
||||
0xc78 0x83690001
|
||||
0xc78 0x826a0001
|
||||
0xc78 0x6a6b0001
|
||||
0xc78 0x696c0001
|
||||
0xc78 0x686d0001 //-20
|
||||
0xc78 0x676e0001
|
||||
0xc78 0x666f0001
|
||||
0xc78 0x65700001
|
||||
0xc78 0x64710001
|
||||
0xc78 0x63720001 //-10
|
||||
0xc78 0x62730001
|
||||
0xc78 0x61740001
|
||||
0xc78 0x60750001
|
||||
0xc78 0x47760001
|
||||
0xc78 0x46770001 //0
|
||||
0xc78 0x45780001
|
||||
0xc78 0x44790001
|
||||
0xc78 0x437a0001
|
||||
0xc78 0x427b0001
|
||||
0xc78 0x417c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040222
|
||||
0xc50 0x00040220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,133 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v023_MP_20130910
|
||||
0xc78 0xfb000001 // -110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfb020001
|
||||
0xc78 0xfb030001
|
||||
0xc78 0xfb040001
|
||||
0xc78 0xfb050001 // -100
|
||||
0xc78 0xfb060001
|
||||
0xc78 0xfb070001
|
||||
0xc78 0xfa080001
|
||||
0xc78 0xf9090001
|
||||
0xc78 0xf80A0001 // -90
|
||||
0xc78 0xf70B0001
|
||||
0xc78 0xf60C0001
|
||||
0xc78 0xf50D0001
|
||||
0xc78 0xf40E0001
|
||||
0xc78 0xf30F0001 // -80
|
||||
0xc78 0xf2100001
|
||||
0xc78 0xf1110001
|
||||
0xc78 0xf0120001
|
||||
0xc78 0xef130001
|
||||
0xc78 0xee140001 // -70
|
||||
0xc78 0xed150001
|
||||
0xc78 0xec160001
|
||||
0xc78 0xeb170001
|
||||
0xc78 0xea180001
|
||||
0xc78 0xe9190001 // -60
|
||||
0xc78 0xe81A0001
|
||||
0xc78 0xe71B0001
|
||||
0xc78 0xe61C0001
|
||||
0xc78 0xe51D0001
|
||||
0xc78 0xe41E0001 // -50
|
||||
0xc78 0xe31F0001
|
||||
0xc78 0xe2200001
|
||||
0xc78 0xe1210001
|
||||
0xc78 0x8a220001
|
||||
0xc78 0x89230001 // -40
|
||||
0xc78 0x88240001
|
||||
0xc78 0x87250001
|
||||
0xc78 0x86260001
|
||||
0xc78 0x85270001
|
||||
0xc78 0x84280001 //-30
|
||||
0xc78 0x83290001
|
||||
0xc78 0x822A0001
|
||||
0xc78 0x6a2B0001
|
||||
0xc78 0x692C0001
|
||||
0xc78 0x682D0001 // -20
|
||||
0xc78 0x672E0001
|
||||
0xc78 0x662F0001
|
||||
0xc78 0x65300001
|
||||
0xc78 0x64310001
|
||||
0xc78 0x63320001 // -10
|
||||
0xc78 0x62330001
|
||||
0xc78 0x61340001
|
||||
0xc78 0x60350001
|
||||
0xc78 0x47360001
|
||||
0xc78 0x46370001 // 0
|
||||
0xc78 0x45380001
|
||||
0xc78 0x44390001
|
||||
0xc78 0x433A0001
|
||||
0xc78 0x423B0001
|
||||
0xc78 0x413C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfb400001 //-110
|
||||
0xc78 0xfb410001
|
||||
0xc78 0xfb420001
|
||||
0xc78 0xfb430001
|
||||
0xc78 0xfb440001
|
||||
0xc78 0xfb450001 //-100
|
||||
0xc78 0xfb460001
|
||||
0xc78 0xfb470001
|
||||
0xc78 0xfa480001
|
||||
0xc78 0xf9490001
|
||||
0xc78 0xf84a0001 //-90
|
||||
0xc78 0xf74b0001
|
||||
0xc78 0xf64c0001
|
||||
0xc78 0xf54d0001
|
||||
0xc78 0xf44e0001
|
||||
0xc78 0xf34f0001 //-80
|
||||
0xc78 0xf2500001
|
||||
0xc78 0xf1510001
|
||||
0xc78 0xf0520001
|
||||
0xc78 0xef530001
|
||||
0xc78 0xee540001 //-70
|
||||
0xc78 0xed550001
|
||||
0xc78 0xec560001
|
||||
0xc78 0xeb570001
|
||||
0xc78 0xea580001
|
||||
0xc78 0xe9590001 //-60
|
||||
0xc78 0xe85a0001
|
||||
0xc78 0xe75b0001
|
||||
0xc78 0xe65c0001
|
||||
0xc78 0xe55d0001
|
||||
0xc78 0xe45e0001 //-50
|
||||
0xc78 0xe35f0001
|
||||
0xc78 0xe2600001
|
||||
0xc78 0xe1610001
|
||||
0xc78 0x8a620001
|
||||
0xc78 0x89630001 //-40
|
||||
0xc78 0x88640001
|
||||
0xc78 0x87650001
|
||||
0xc78 0x86660001
|
||||
0xc78 0x85670001
|
||||
0xc78 0x84680001 //-30
|
||||
0xc78 0x83690001
|
||||
0xc78 0x826a0001
|
||||
0xc78 0x6a6b0001
|
||||
0xc78 0x696c0001
|
||||
0xc78 0x686d0001 //-20
|
||||
0xc78 0x676e0001
|
||||
0xc78 0x666f0001
|
||||
0xc78 0x65700001
|
||||
0xc78 0x64710001
|
||||
0xc78 0x63720001 //-10
|
||||
0xc78 0x62730001
|
||||
0xc78 0x61740001
|
||||
0xc78 0x60750001
|
||||
0xc78 0x47760001
|
||||
0xc78 0x46770001 //0
|
||||
0xc78 0x45780001
|
||||
0xc78 0x44790001
|
||||
0xc78 0x437a0001
|
||||
0xc78 0x427b0001
|
||||
0xc78 0x417c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040222
|
||||
0xc50 0x00040220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,133 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v023_MP_20130910
|
||||
0xc78 0xff000001 // -110
|
||||
0xc78 0xff010001
|
||||
0xc78 0xff020001
|
||||
0xc78 0xff030001
|
||||
0xc78 0xff040001
|
||||
0xc78 0xfe050001 // -100
|
||||
0xc78 0xfd060001
|
||||
0xc78 0xfc070001
|
||||
0xc78 0xfb080001
|
||||
0xc78 0xfa090001
|
||||
0xc78 0xf90A0001 // -90
|
||||
0xc78 0xf80B0001
|
||||
0xc78 0xf70C0001
|
||||
0xc78 0xf60D0001
|
||||
0xc78 0xf50E0001
|
||||
0xc78 0xf40F0001 // -80
|
||||
0xc78 0xf3100001
|
||||
0xc78 0xf2110001
|
||||
0xc78 0xf1120001
|
||||
0xc78 0xf0130001
|
||||
0xc78 0xef140001 // -70
|
||||
0xc78 0xee150001
|
||||
0xc78 0xed160001
|
||||
0xc78 0xec170001
|
||||
0xc78 0xeb180001
|
||||
0xc78 0xea190001 // -60
|
||||
0xc78 0xe91A0001
|
||||
0xc78 0xe81B0001
|
||||
0xc78 0xe71C0001
|
||||
0xc78 0xe61D0001
|
||||
0xc78 0xe51E0001 // -50
|
||||
0xc78 0x891F0001
|
||||
0xc78 0x88200001
|
||||
0xc78 0x87210001
|
||||
0xc78 0x86220001
|
||||
0xc78 0xa9230001 // -40
|
||||
0xc78 0xa8240001
|
||||
0xc78 0x6a250001
|
||||
0xc78 0x69260001
|
||||
0xc78 0x68270001
|
||||
0xc78 0x67280001 //-30
|
||||
0xc78 0x66290001
|
||||
0xc78 0x652A0001
|
||||
0xc78 0x642B0001
|
||||
0xc78 0x4a2C0001
|
||||
0xc78 0x492D0001 // -20
|
||||
0xc78 0x482E0001
|
||||
0xc78 0x472F0001
|
||||
0xc78 0x46300001
|
||||
0xc78 0x45310001
|
||||
0xc78 0x44320001 // -10
|
||||
0xc78 0x43330001
|
||||
0xc78 0x42340001
|
||||
0xc78 0x41350001
|
||||
0xc78 0x40360001
|
||||
0xc78 0x40370001 // 0
|
||||
0xc78 0x40380001
|
||||
0xc78 0x40390001
|
||||
0xc78 0x403A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xff400001 //-110
|
||||
0xc78 0xff410001
|
||||
0xc78 0xff420001
|
||||
0xc78 0xff430001
|
||||
0xc78 0xff440001
|
||||
0xc78 0xfe450001 //-100
|
||||
0xc78 0xfd460001
|
||||
0xc78 0xfc470001
|
||||
0xc78 0xfb480001
|
||||
0xc78 0xfa490001
|
||||
0xc78 0xf94a0001 //-90
|
||||
0xc78 0xf84b0001
|
||||
0xc78 0xf74c0001
|
||||
0xc78 0xf64d0001
|
||||
0xc78 0xf54e0001
|
||||
0xc78 0xf44f0001 //-80
|
||||
0xc78 0xf3500001
|
||||
0xc78 0xf2510001
|
||||
0xc78 0xf1520001
|
||||
0xc78 0xf0530001
|
||||
0xc78 0xef540001 //-70
|
||||
0xc78 0xee550001
|
||||
0xc78 0xed560001
|
||||
0xc78 0xec570001
|
||||
0xc78 0xeb580001
|
||||
0xc78 0xea590001 //-60
|
||||
0xc78 0xe95a0001
|
||||
0xc78 0xe85b0001
|
||||
0xc78 0xe75c0001
|
||||
0xc78 0xe65d0001
|
||||
0xc78 0xe55e0001 //-50
|
||||
0xc78 0x895f0001
|
||||
0xc78 0x88600001
|
||||
0xc78 0x87610001
|
||||
0xc78 0x86620001
|
||||
0xc78 0xa9630001 //-40
|
||||
0xc78 0xa8640001
|
||||
0xc78 0x6a650001
|
||||
0xc78 0x69660001
|
||||
0xc78 0x68670001
|
||||
0xc78 0x67680001 //-30
|
||||
0xc78 0x66690001
|
||||
0xc78 0x656a0001
|
||||
0xc78 0x646b0001
|
||||
0xc78 0x4a6c0001
|
||||
0xc78 0x496d0001 //-20
|
||||
0xc78 0x486e0001
|
||||
0xc78 0x476f0001
|
||||
0xc78 0x46700001
|
||||
0xc78 0x45710001
|
||||
0xc78 0x44720001 //-10
|
||||
0xc78 0x43730001
|
||||
0xc78 0x42740001
|
||||
0xc78 0x41750001
|
||||
0xc78 0x40760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040222
|
||||
0xc50 0x00040220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,133 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v043_MP_20141229
|
||||
0xc78 0xfb000001 //-110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfb020001
|
||||
0xc78 0xfb030001
|
||||
0xc78 0xfb040001
|
||||
0xc78 0xfb050001 //-100
|
||||
0xc78 0xfb060001
|
||||
0xc78 0xfa070001
|
||||
0xc78 0xf9080001
|
||||
0xc78 0xf8090001
|
||||
0xc78 0xf70A0001 //-90
|
||||
0xc78 0xf60B0001
|
||||
0xc78 0xf50C0001
|
||||
0xc78 0xf40D0001
|
||||
0xc78 0xf30E0001
|
||||
0xc78 0xf20F0001 //-80
|
||||
0xc78 0xf1100001
|
||||
0xc78 0xf0110001
|
||||
0xc78 0xef120001
|
||||
0xc78 0xee130001
|
||||
0xc78 0xed140001 //-70
|
||||
0xc78 0xec150001
|
||||
0xc78 0xeb160001
|
||||
0xc78 0xea170001
|
||||
0xc78 0xcd180001
|
||||
0xc78 0xcc190001 //-60
|
||||
0xc78 0xcb1A0001
|
||||
0xc78 0xca1B0001
|
||||
0xc78 0xc91C0001
|
||||
0xc78 0xc81D0001
|
||||
0xc78 0x071E0001 //-50
|
||||
0xc78 0x061F0001
|
||||
0xc78 0x05200001
|
||||
0xc78 0x04210001
|
||||
0xc78 0x03220001
|
||||
0xc78 0xaa230001 //-40
|
||||
0xc78 0xa9240001
|
||||
0xc78 0xa8250001
|
||||
0xc78 0xa7260001
|
||||
0xc78 0xa6270001
|
||||
0xc78 0x85280001 //-30
|
||||
0xc78 0x84290001
|
||||
0xc78 0x832A0001
|
||||
0xc78 0x252B0001
|
||||
0xc78 0x242C0001
|
||||
0xc78 0x232D0001 //-20
|
||||
0xc78 0x222E0001
|
||||
0xc78 0x672F0001
|
||||
0xc78 0x66300001
|
||||
0xc78 0x65310001
|
||||
0xc78 0x64320001 //-10
|
||||
0xc78 0x63330001
|
||||
0xc78 0x62340001
|
||||
0xc78 0x61350001
|
||||
0xc78 0x45360001
|
||||
0xc78 0x44370001 //0
|
||||
0xc78 0x43380001
|
||||
0xc78 0x42390001
|
||||
0xc78 0x413A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 //10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001 //16
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfb400001 //-110
|
||||
0xc78 0xfb410001
|
||||
0xc78 0xfb420001
|
||||
0xc78 0xfb430001
|
||||
0xc78 0xfb440001
|
||||
0xc78 0xfb450001 //-100
|
||||
0xc78 0xfb460001
|
||||
0xc78 0xfa470001
|
||||
0xc78 0xf9480001
|
||||
0xc78 0xf8490001
|
||||
0xc78 0xf74a0001 //-90
|
||||
0xc78 0xf64b0001
|
||||
0xc78 0xf54c0001
|
||||
0xc78 0xf44d0001
|
||||
0xc78 0xf34e0001
|
||||
0xc78 0xf24f0001 //-80
|
||||
0xc78 0xf1500001
|
||||
0xc78 0xf0510001
|
||||
0xc78 0xef520001
|
||||
0xc78 0xee530001
|
||||
0xc78 0xed540001 //-70
|
||||
0xc78 0xec550001
|
||||
0xc78 0xeb560001
|
||||
0xc78 0xea570001
|
||||
0xc78 0xe9580001
|
||||
0xc78 0xe8590001 //-60
|
||||
0xc78 0xe75a0001
|
||||
0xc78 0xe65b0001
|
||||
0xc78 0xe55c0001
|
||||
0xc78 0xe45d0001
|
||||
0xc78 0xe35e0001 //-50
|
||||
0xc78 0xe25f0001
|
||||
0xc78 0xe1600001
|
||||
0xc78 0x8a610001
|
||||
0xc78 0x89620001
|
||||
0xc78 0x88630001 //-40
|
||||
0xc78 0x87640001
|
||||
0xc78 0x86650001
|
||||
0xc78 0x85660001
|
||||
0xc78 0x84670001
|
||||
0xc78 0x83680001 //-30
|
||||
0xc78 0x82690001
|
||||
0xc78 0x6b6a0001
|
||||
0xc78 0x6a6b0001
|
||||
0xc78 0x696c0001
|
||||
0xc78 0x686d0001 //-20
|
||||
0xc78 0x676e0001
|
||||
0xc78 0x666f0001
|
||||
0xc78 0x65700001
|
||||
0xc78 0x64710001
|
||||
0xc78 0x63720001 //-10
|
||||
0xc78 0x62730001
|
||||
0xc78 0x61740001
|
||||
0xc78 0x49750001
|
||||
0xc78 0x48760001
|
||||
0xc78 0x47770001 //0
|
||||
0xc78 0x46780001
|
||||
0xc78 0x45790001
|
||||
0xc78 0x447a0001
|
||||
0xc78 0x437b0001
|
||||
0xc78 0x427c0001 //10
|
||||
0xc78 0x417d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040020
|
||||
0xc58 0x00000020
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,133 @@
|
||||
//rtl8192e version = 58
|
||||
0xc78 0xfb000001 // -110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfa020001
|
||||
0xc78 0xf9030001
|
||||
0xc78 0xf8040001
|
||||
0xc78 0xf7050001 // -100
|
||||
0xc78 0xf6060001
|
||||
0xc78 0xf5070001
|
||||
0xc78 0xf4080001
|
||||
0xc78 0xf3090001
|
||||
0xc78 0xf20A0001 // -90
|
||||
0xc78 0xf10B0001
|
||||
0xc78 0xf00C0001
|
||||
0xc78 0xef0D0001
|
||||
0xc78 0xee0E0001
|
||||
0xc78 0xed0F0001 // -80
|
||||
0xc78 0xec100001
|
||||
0xc78 0xeb110001
|
||||
0xc78 0xea120001
|
||||
0xc78 0xe9130001
|
||||
0xc78 0xe8140001 // -70
|
||||
0xc78 0xe7150001
|
||||
0xc78 0xe6160001
|
||||
0xc78 0xe5170001
|
||||
0xc78 0xe4180001
|
||||
0xc78 0xe3190001 // -60
|
||||
0xc78 0xe21A0001
|
||||
0xc78 0xe11B0001
|
||||
0xc78 0x8a1C0001
|
||||
0xc78 0x891D0001
|
||||
0xc78 0x881E0001 // -50
|
||||
0xc78 0x871F0001
|
||||
0xc78 0x86200001
|
||||
0xc78 0x85210001
|
||||
0xc78 0x84220001
|
||||
0xc78 0x83230001 // -40
|
||||
0xc78 0x82240001
|
||||
0xc78 0x6a250001
|
||||
0xc78 0x69260001
|
||||
0xc78 0x68270001
|
||||
0xc78 0x67280001 //-30
|
||||
0xc78 0x66290001
|
||||
0xc78 0x652A0001
|
||||
0xc78 0x642B0001
|
||||
0xc78 0x632C0001
|
||||
0xc78 0x622D0001 // -20
|
||||
0xc78 0x612E0001
|
||||
0xc78 0x602F0001
|
||||
0xc78 0x47300001
|
||||
0xc78 0x46310001
|
||||
0xc78 0x45320001 // -10
|
||||
0xc78 0x44330001
|
||||
0xc78 0x43340001
|
||||
0xc78 0x42350001
|
||||
0xc78 0x41360001
|
||||
0xc78 0x40370001 // 0
|
||||
0xc78 0x40380001
|
||||
0xc78 0x40390001
|
||||
0xc78 0x403A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfe400001 //-110
|
||||
0xc78 0xfd410001
|
||||
0xc78 0xfc420001
|
||||
0xc78 0xfb430001
|
||||
0xc78 0xfa440001
|
||||
0xc78 0xf9450001 //-100
|
||||
0xc78 0xf8460001
|
||||
0xc78 0xf7470001
|
||||
0xc78 0xf6480001
|
||||
0xc78 0xf5490001
|
||||
0xc78 0xf44a0001 //-90
|
||||
0xc78 0xf34b0001
|
||||
0xc78 0xf24c0001
|
||||
0xc78 0xf14d0001
|
||||
0xc78 0xf04e0001
|
||||
0xc78 0xef4f0001 //-80
|
||||
0xc78 0xee500001
|
||||
0xc78 0xed510001
|
||||
0xc78 0xec520001
|
||||
0xc78 0xeb530001
|
||||
0xc78 0xea540001 //-70
|
||||
0xc78 0xe9550001
|
||||
0xc78 0xe8560001
|
||||
0xc78 0xe7570001
|
||||
0xc78 0xe6580001
|
||||
0xc78 0xe5590001 //-60
|
||||
0xc78 0xe45a0001
|
||||
0xc78 0xe35b0001
|
||||
0xc78 0x885c0001
|
||||
0xc78 0x875d0001
|
||||
0xc78 0xaa5e0001 //-50
|
||||
0xc78 0xa95f0001
|
||||
0xc78 0xa8600001
|
||||
0xc78 0xa7610001
|
||||
0xc78 0xa6620001
|
||||
0xc78 0xa5630001 //-40
|
||||
0xc78 0x66640001
|
||||
0xc78 0x65650001
|
||||
0xc78 0x64660001
|
||||
0xc78 0x63670001
|
||||
0xc78 0x62680001 //-30
|
||||
0xc78 0x49690001
|
||||
0xc78 0x486a0001
|
||||
0xc78 0x476b0001
|
||||
0xc78 0x466c0001
|
||||
0xc78 0x456d0001 //-20
|
||||
0xc78 0x446e0001
|
||||
0xc78 0x436f0001
|
||||
0xc78 0x42700001
|
||||
0xc78 0x41710001
|
||||
0xc78 0x40720001 //-10
|
||||
0xc78 0x40730001
|
||||
0xc78 0x40740001
|
||||
0xc78 0x40750001
|
||||
0xc78 0x40760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040220
|
||||
0xc58 0x00000220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,115 @@
|
||||
//rtl8192e version = 58
|
||||
//0x16 0x36 // SWR by Hillo
|
||||
//0x28 0x83
|
||||
//0x2C 0x96
|
||||
//0x2D 0x05
|
||||
//0x2E 0x82
|
||||
//0x2F 0xF0
|
||||
//0x64 0x00
|
||||
//0x65 0x01 // TRSWP=1 ANTSEL2=0 for WLAN
|
||||
//0x78 0x2A
|
||||
//0x79 0x00
|
||||
//0x7C 0xC3
|
||||
0x11 0xEB
|
||||
0x12 0x07
|
||||
0x14 0x75
|
||||
0x303 0xA7
|
||||
0x421 0x0F
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x00
|
||||
0x432 0x00
|
||||
0x433 0x01
|
||||
0x434 0x04
|
||||
0x435 0x05
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x07
|
||||
0x43f 0x08
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x10
|
||||
0x445 0x00
|
||||
0x446 0x00
|
||||
0x447 0x00
|
||||
0x448 0x00
|
||||
0x449 0xf0
|
||||
0x44a 0x0f
|
||||
0x44b 0x3e
|
||||
0x44c 0x10
|
||||
0x44d 0x00
|
||||
0x44e 0x00
|
||||
0x44f 0x00
|
||||
0x450 0x00
|
||||
0x451 0xf0
|
||||
0x452 0x0f
|
||||
0x453 0x00
|
||||
0x456 0x5e
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12
|
||||
0x541 0x64
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55c 0x50
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x2a
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x638 0x50
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40 //ACK timeout
|
||||
0x642 0x40 //EIFS
|
||||
0x643 0x00
|
||||
0x652 0x2B
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//rtl8192e version = 58
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390004
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390004
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x806c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d047c8 // A01[7] ant div disable
|
||||
0xa04 0x81ff800c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e30120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x1a1b0000
|
||||
0xa24 0x090e1317
|
||||
0xa28 0x00000204
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fff80
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x21807531
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x2112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013269 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x40000100
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x40000100
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000048
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,36 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8192E_MAC_PHY_Parameter_v024_MP_20130927
|
||||
#[v1][Exact]#
|
||||
#[2.4G][A]#
|
||||
[1Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[2Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[1Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[2Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[1Tx] 0xe00 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0xe00 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0xe04 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0xe04 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0xe10 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0xe10 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0xe14 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe14 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe18 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0xe1C 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
#[2.4G][B]#
|
||||
[1Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[2Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[1Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[2Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[1Tx] 0x830 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0x830 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0x834 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0x834 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0x83c 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0x83c 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0x848 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x848 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x84c 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0x868 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,127 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB_filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918): RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x83 0x00000
|
||||
0xB0 0xFF9F1
|
||||
0xB1 0x55418
|
||||
0xB2 0x8CC00 //VCO current
|
||||
0xB4 0x43083 //KVCO
|
||||
0xB5 0x08166 //5G LO buffier increase current
|
||||
0xB6 0x0803E // SDM neg edge
|
||||
0xB7 0x1C69f //LPF
|
||||
0xB8 0x0407F //LPF Defalt:080FF reduce R3 (121005) RDC Lily
|
||||
0xB9 0x90001 //Defalt:80001 CV curve offset +1 for 25C (121005) RDC Lily
|
||||
0xBA 0x40001 //0x40000 : SDM 3 change 2 order for in-band noise floor check 40M spur for CH7?
|
||||
0xBB 0x00400
|
||||
0xBC 0x00078
|
||||
0xBD 0xB3333
|
||||
0xBE 0x33340
|
||||
0xBF 0x00000
|
||||
0xC0 0x05999
|
||||
0xC1 0x09999
|
||||
0xC2 0x02400
|
||||
0xC3 0x00009
|
||||
0xC4 0x40C91
|
||||
0xC5 0x99999
|
||||
0xC6 0x000A3
|
||||
0xC7 0x88820
|
||||
0xC8 0x76C06
|
||||
0xC9 0x00000
|
||||
0xCA 0x80000
|
||||
0x1C 0x00000
|
||||
//0xB6 0x0803E
|
||||
//0xB2 0x8CC00 //VCO current
|
||||
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E45E
|
||||
0x53 0x00071 // [1:0] for Tx EVM shrink
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8 // a8=ba
|
||||
0x35 0x001e2 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01C24
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving (92EE)
|
||||
0x34 0xadd7
|
||||
0x34 0x9dd4
|
||||
0x34 0x8dd1
|
||||
0x34 0x7dce
|
||||
0x34 0x6dcb
|
||||
0x34 0x5dc8 //0x5cea
|
||||
0x34 0x4dc5 //0x4ce7
|
||||
0x34 0x34cc //0x34e7
|
||||
0x34 0x244f //0x246a
|
||||
0x34 0x144c //0x1467
|
||||
0x34 0x0014 //0x0068
|
||||
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 //54fb0
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
|
||||
0xffe
|
||||
//LC calibration start
|
||||
//0xb1 0x55400
|
||||
0x18 0x0fc07 //LC calibration
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
|
||||
//0xb1 0x55418
|
||||
//LC calibration end
|
||||
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,93 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918):RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x7F 0x00082 // for C cut
|
||||
0x81 0x3F000 // for C cut
|
||||
0x83 0x00000
|
||||
0x1C 0x00000
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E42e
|
||||
0x53 0x00071
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8
|
||||
0x35 0x001e0 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01Ca8
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving(92EE)
|
||||
0x34 0xadd7
|
||||
0x34 0x9dd4
|
||||
0x34 0x8dd1
|
||||
0x34 0x7dce
|
||||
0x34 0x6dcb
|
||||
0x34 0x5dc8 //0x5cea
|
||||
0x34 0x4dc5 //0x4ce7
|
||||
0x34 0x34cc //0x34e7
|
||||
0x34 0x244f //0x246a
|
||||
0x34 0x144c //0x1467
|
||||
0x34 0x0014 //0x0068
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // Update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 // 0x54fb0 update by Gary 120921
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
0x00 0x10159 //standby mode
|
||||
//0x18 0x0f407 //LC calibration only @ path A
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 17 14 16
|
||||
CH02 17 14 16
|
||||
CH03 17 14 16
|
||||
CH04 17 14 16
|
||||
CH05 17 14 16
|
||||
CH06 17 14 16
|
||||
CH07 17 14 16
|
||||
CH08 17 14 16
|
||||
CH09 17 14 16
|
||||
CH10 17 14 16
|
||||
CH11 17 14 16
|
||||
CH12 NA 14 16
|
||||
CH13 NA 14 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 11 13
|
||||
CH02 13 11 13
|
||||
CH03 13 11 13
|
||||
CH04 13 11 13
|
||||
CH05 13 11 13
|
||||
CH06 13 11 13
|
||||
CH07 13 11 13
|
||||
CH08 13 11 13
|
||||
CH09 13 11 13
|
||||
CH10 13 11 13
|
||||
CH11 13 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 17 13 14
|
||||
CH04 17 13 14
|
||||
CH05 17 13 14
|
||||
CH06 17 13 14
|
||||
CH07 17 13 14
|
||||
CH08 17 13 14
|
||||
CH09 15 13 14
|
||||
CH10 15 13 14
|
||||
CH11 15 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 14 13 13
|
||||
CH10 14 13 13
|
||||
CH11 14 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 16 16 15
|
||||
CH07 16 16 15
|
||||
CH08 16 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 15 13 13
|
||||
CH07 15 13 13
|
||||
CH08 15 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 16 16
|
||||
CH02 15 16 16
|
||||
CH03 15 16 16
|
||||
CH04 15 16 16
|
||||
CH05 15 16 16
|
||||
CH06 15 16 16
|
||||
CH07 15 16 16
|
||||
CH08 15 16 16
|
||||
CH09 14 16 16
|
||||
CH10 14 16 16
|
||||
CH11 14 16 16
|
||||
CH12 NA 16 16
|
||||
CH13 NA 16 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 12 11 13
|
||||
CH02 12 11 13
|
||||
CH03 12 11 13
|
||||
CH04 12 11 13
|
||||
CH05 12 11 13
|
||||
CH06 12 11 13
|
||||
CH07 12 11 13
|
||||
CH08 12 11 13
|
||||
CH09 11 11 13
|
||||
CH10 11 11 13
|
||||
CH11 11 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 14 13 14
|
||||
CH04 14 13 14
|
||||
CH05 14 13 14
|
||||
CH06 14 13 14
|
||||
CH07 14 13 14
|
||||
CH08 14 13 14
|
||||
CH09 14 13 14
|
||||
CH10 14 13 14
|
||||
CH11 14 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 15 16 15
|
||||
CH07 15 16 15
|
||||
CH08 15 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,27 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8723B_MP_Parameter_v2_20130307
|
||||
//RTL8723BE_20130304
|
||||
//RTL8192EE_20130426_OnSite
|
||||
//=======================================================================================================================================//
|
||||
// [0][1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29] //
|
||||
//=======================================================================================================================================//
|
||||
[2G][A][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_P
|
||||
[2G][A][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_N
|
||||
[2G][B][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_P
|
||||
[2G][B][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_N
|
||||
[2G][A][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GA_P
|
||||
[2G][A][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GA_N
|
||||
[2G][B][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GB_P
|
||||
[2G][B][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GB_N
|
||||
[5G][A][+][ALL][0] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} //5GLA_P
|
||||
[5G][A][-][ALL][0] = {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLA_N
|
||||
[5G][B][+][ALL][0] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20} //5GLB_P
|
||||
[5G][B][-][ALL][0] = {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLB_N
|
||||
[5G][A][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GMA_P
|
||||
[5G][A][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16} //5GMA_N
|
||||
[5G][B][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20} //5GMB_P
|
||||
[5G][B][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GMB_N
|
||||
[5G][A][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHA_P
|
||||
[5G][A][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16} //5GHA_N
|
||||
[5G][B][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHB_P
|
||||
[5G][B][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GHB_N
|
||||
@ -0,0 +1,133 @@
|
||||
//rtl8192e version = 58
|
||||
0xc78 0xfb000001 // -110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfb020001
|
||||
0xc78 0xfb030001
|
||||
0xc78 0xfa040001
|
||||
0xc78 0xf9050001 // -100
|
||||
0xc78 0xf8060001
|
||||
0xc78 0xf7070001
|
||||
0xc78 0xf6080001
|
||||
0xc78 0xf5090001
|
||||
0xc78 0xf40A0001 // -90
|
||||
0xc78 0xf30B0001
|
||||
0xc78 0xf20C0001
|
||||
0xc78 0xf10D0001
|
||||
0xc78 0xf00E0001
|
||||
0xc78 0xef0F0001 // -80
|
||||
0xc78 0xee100001
|
||||
0xc78 0xed110001
|
||||
0xc78 0xec120001
|
||||
0xc78 0xeb130001
|
||||
0xc78 0xea140001 // -70
|
||||
0xc78 0xe9150001
|
||||
0xc78 0xe8160001
|
||||
0xc78 0xe7170001
|
||||
0xc78 0xe6180001
|
||||
0xc78 0xe5190001 // -60
|
||||
0xc78 0xe41A0001
|
||||
0xc78 0xe31B0001
|
||||
0xc78 0xe21C0001
|
||||
0xc78 0xe11D0001
|
||||
0xc78 0x8a1E0001 // -50
|
||||
0xc78 0x891F0001
|
||||
0xc78 0x88200001
|
||||
0xc78 0x87210001
|
||||
0xc78 0x86220001
|
||||
0xc78 0x85230001 // -40
|
||||
0xc78 0x84240001
|
||||
0xc78 0x83250001
|
||||
0xc78 0x82260001
|
||||
0xc78 0x6a270001
|
||||
0xc78 0x69280001 //-30
|
||||
0xc78 0x68290001
|
||||
0xc78 0x672A0001
|
||||
0xc78 0x662B0001
|
||||
0xc78 0x652C0001
|
||||
0xc78 0x642D0001 // -20
|
||||
0xc78 0x632E0001
|
||||
0xc78 0x622F0001
|
||||
0xc78 0x61300001
|
||||
0xc78 0x60310001
|
||||
0xc78 0x47320001 // -10
|
||||
0xc78 0x46330001
|
||||
0xc78 0x45340001
|
||||
0xc78 0x44350001
|
||||
0xc78 0x43360001
|
||||
0xc78 0x42370001 // 0
|
||||
0xc78 0x41380001
|
||||
0xc78 0x40390001
|
||||
0xc78 0x403A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfe400001 //-110
|
||||
0xc78 0xfe410001
|
||||
0xc78 0xfe420001
|
||||
0xc78 0xfd430001
|
||||
0xc78 0xfc440001
|
||||
0xc78 0xfb450001 //-100
|
||||
0xc78 0xfa460001
|
||||
0xc78 0xf9470001
|
||||
0xc78 0xf8480001
|
||||
0xc78 0xf7490001
|
||||
0xc78 0xf64a0001 //-90
|
||||
0xc78 0xf54b0001
|
||||
0xc78 0xf44c0001
|
||||
0xc78 0xf34d0001
|
||||
0xc78 0xf24e0001
|
||||
0xc78 0xf14f0001 //-80
|
||||
0xc78 0xf0500001
|
||||
0xc78 0xef510001
|
||||
0xc78 0xee520001
|
||||
0xc78 0xed530001
|
||||
0xc78 0xec540001 //-70
|
||||
0xc78 0xeb550001
|
||||
0xc78 0xea560001
|
||||
0xc78 0xe9570001
|
||||
0xc78 0xe8580001
|
||||
0xc78 0xe7590001 //-60
|
||||
0xc78 0xe65a0001
|
||||
0xc78 0xe55b0001
|
||||
0xc78 0xe45c0001
|
||||
0xc78 0xe35d0001
|
||||
0xc78 0x885e0001 //-50
|
||||
0xc78 0x875f0001
|
||||
0xc78 0xaa600001
|
||||
0xc78 0xa9610001
|
||||
0xc78 0xa8620001
|
||||
0xc78 0xa7630001 //-40
|
||||
0xc78 0xa6640001
|
||||
0xc78 0xa5650001
|
||||
0xc78 0x66660001
|
||||
0xc78 0x65670001
|
||||
0xc78 0x64680001 //-30
|
||||
0xc78 0x63690001
|
||||
0xc78 0x626a0001
|
||||
0xc78 0x496b0001
|
||||
0xc78 0x486c0001
|
||||
0xc78 0x476d0001 //-20
|
||||
0xc78 0x466e0001
|
||||
0xc78 0x456f0001
|
||||
0xc78 0x44700001
|
||||
0xc78 0x43710001
|
||||
0xc78 0x42720001 //-10
|
||||
0xc78 0x41730001
|
||||
0xc78 0x40740001
|
||||
0xc78 0x40750001
|
||||
0xc78 0x40760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040220
|
||||
0xc58 0x00000220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,115 @@
|
||||
//rtl8192e version = 58
|
||||
//0x16 0x36 // SWR by Hillo
|
||||
//0x28 0x83
|
||||
//0x2C 0x96
|
||||
//0x2D 0x05
|
||||
//0x2E 0x82
|
||||
//0x2F 0xF0
|
||||
//0x64 0x00
|
||||
//0x65 0x01 // TRSWP=1 ANTSEL2=0 for WLAN
|
||||
//0x78 0x2A
|
||||
//0x79 0x00
|
||||
//0x7C 0xC3
|
||||
0x11 0xEB
|
||||
0x12 0x07
|
||||
0x14 0x75
|
||||
0x303 0xA7
|
||||
0x421 0x0F
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x00
|
||||
0x432 0x00
|
||||
0x433 0x01
|
||||
0x434 0x04
|
||||
0x435 0x05
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x07
|
||||
0x43f 0x08
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x10
|
||||
0x445 0x00
|
||||
0x446 0x00
|
||||
0x447 0x00
|
||||
0x448 0x00
|
||||
0x449 0xf0
|
||||
0x44a 0x0f
|
||||
0x44b 0x3e
|
||||
0x44c 0x10
|
||||
0x44d 0x00
|
||||
0x44e 0x00
|
||||
0x44f 0x00
|
||||
0x450 0x00
|
||||
0x451 0xf0
|
||||
0x452 0x0f
|
||||
0x453 0x00
|
||||
0x456 0x5e
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12
|
||||
0x541 0x64
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55c 0x50
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x2a
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x638 0x50
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40 //ACK timeout
|
||||
0x642 0x40 //EIFS
|
||||
0x643 0x00
|
||||
0x652 0x2B
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//rtl8192e version = 58
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390004
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390004
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x806c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d047c8 // A01[7] ant div disable
|
||||
0xa04 0x81ff800c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e30120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x1a1b0000
|
||||
0xa24 0x090e1317
|
||||
0xa28 0x00000204
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fff80
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x21807531
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x2112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013269 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x40000100
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x40000100
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000048
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,36 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8192E_MAC_PHY_Parameter_v024_MP_20130927
|
||||
#[v1][Exact]#
|
||||
#[2.4G][A]#
|
||||
[1Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[2Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[1Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[2Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[1Tx] 0xe00 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0xe00 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0xe04 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0xe04 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0xe10 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0xe10 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0xe14 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe14 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe18 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0xe1C 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
#[2.4G][B]#
|
||||
[1Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[2Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[1Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[2Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[1Tx] 0x830 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0x830 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0x834 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0x834 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0x83c 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0x83c 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0x848 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x848 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x84c 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0x868 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,127 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB_filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918): RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x83 0x00000
|
||||
0xB0 0xFF9F1
|
||||
0xB1 0x55418
|
||||
0xB2 0x8CC00 //VCO current
|
||||
0xB4 0x43083 //KVCO
|
||||
0xB5 0x08166 //5G LO buffier increase current
|
||||
0xB6 0x0803E // SDM neg edge
|
||||
0xB7 0x1C69f //LPF
|
||||
0xB8 0x0407F //LPF Defalt:080FF reduce R3 (121005) RDC Lily
|
||||
0xB9 0x90001 //Defalt:80001 CV curve offset +1 for 25C (121005) RDC Lily
|
||||
0xBA 0x40001 //0x40000 : SDM 3 change 2 order for in-band noise floor check 40M spur for CH7?
|
||||
0xBB 0x00400
|
||||
0xBC 0x00078
|
||||
0xBD 0xB3333
|
||||
0xBE 0x33340
|
||||
0xBF 0x00000
|
||||
0xC0 0x05999
|
||||
0xC1 0x09999
|
||||
0xC2 0x02400
|
||||
0xC3 0x00009
|
||||
0xC4 0x40C91
|
||||
0xC5 0x99999
|
||||
0xC6 0x000A3
|
||||
0xC7 0x88820
|
||||
0xC8 0x76C06
|
||||
0xC9 0x00000
|
||||
0xCA 0x80000
|
||||
0x1C 0x00000
|
||||
//0xB6 0x0803E
|
||||
//0xB2 0x8CC00 //VCO current
|
||||
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E45E
|
||||
0x53 0x00071 // [1:0] for Tx EVM shrink
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8 // a8=ba
|
||||
0x35 0x001e2 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01C24
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving (92EE)
|
||||
0x34 0xadd7
|
||||
0x34 0x9dd4
|
||||
0x34 0x8dd1
|
||||
0x34 0x7dce
|
||||
0x34 0x6dcb
|
||||
0x34 0x5dc8 //0x5cea
|
||||
0x34 0x4dc5 //0x4ce7
|
||||
0x34 0x34cc //0x34e7
|
||||
0x34 0x244f //0x246a
|
||||
0x34 0x144c //0x1467
|
||||
0x34 0x0014 //0x0068
|
||||
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 //54fb0
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
|
||||
0xffe
|
||||
//LC calibration start
|
||||
//0xb1 0x55400
|
||||
0x18 0x0fc07 //LC calibration
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
|
||||
//0xb1 0x55418
|
||||
//LC calibration end
|
||||
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,93 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918):RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x7F 0x00082 // for C cut
|
||||
0x81 0x3F000 // for C cut
|
||||
0x83 0x00000
|
||||
0x1C 0x00000
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E42e
|
||||
0x53 0x00071
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8
|
||||
0x35 0x001e0 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01Ca8
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving(92EE)
|
||||
0x34 0xadd7
|
||||
0x34 0x9dd4
|
||||
0x34 0x8dd1
|
||||
0x34 0x7dce
|
||||
0x34 0x6dcb
|
||||
0x34 0x5dc8 //0x5cea
|
||||
0x34 0x4dc5 //0x4ce7
|
||||
0x34 0x34cc //0x34e7
|
||||
0x34 0x244f //0x246a
|
||||
0x34 0x144c //0x1467
|
||||
0x34 0x0014 //0x0068
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // Update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 // 0x54fb0 update by Gary 120921
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
0x00 0x10159 //standby mode
|
||||
//0x18 0x0f407 //LC calibration only @ path A
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 17 14 16
|
||||
CH02 17 14 16
|
||||
CH03 17 14 16
|
||||
CH04 17 14 16
|
||||
CH05 17 14 16
|
||||
CH06 17 14 16
|
||||
CH07 17 14 16
|
||||
CH08 17 14 16
|
||||
CH09 17 14 16
|
||||
CH10 17 14 16
|
||||
CH11 17 14 16
|
||||
CH12 NA 14 16
|
||||
CH13 NA 14 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 11 13
|
||||
CH02 13 11 13
|
||||
CH03 13 11 13
|
||||
CH04 13 11 13
|
||||
CH05 13 11 13
|
||||
CH06 13 11 13
|
||||
CH07 13 11 13
|
||||
CH08 13 11 13
|
||||
CH09 13 11 13
|
||||
CH10 13 11 13
|
||||
CH11 13 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 17 13 14
|
||||
CH04 17 13 14
|
||||
CH05 17 13 14
|
||||
CH06 17 13 14
|
||||
CH07 17 13 14
|
||||
CH08 17 13 14
|
||||
CH09 15 13 14
|
||||
CH10 15 13 14
|
||||
CH11 15 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 14 13 13
|
||||
CH10 14 13 13
|
||||
CH11 14 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 16 16 15
|
||||
CH07 16 16 15
|
||||
CH08 16 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 15 13 13
|
||||
CH07 15 13 13
|
||||
CH08 15 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 16 16
|
||||
CH02 15 16 16
|
||||
CH03 15 16 16
|
||||
CH04 15 16 16
|
||||
CH05 15 16 16
|
||||
CH06 15 16 16
|
||||
CH07 15 16 16
|
||||
CH08 15 16 16
|
||||
CH09 14 16 16
|
||||
CH10 14 16 16
|
||||
CH11 14 16 16
|
||||
CH12 NA 16 16
|
||||
CH13 NA 16 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 12 11 13
|
||||
CH02 12 11 13
|
||||
CH03 12 11 13
|
||||
CH04 12 11 13
|
||||
CH05 12 11 13
|
||||
CH06 12 11 13
|
||||
CH07 12 11 13
|
||||
CH08 12 11 13
|
||||
CH09 11 11 13
|
||||
CH10 11 11 13
|
||||
CH11 11 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 14 13 14
|
||||
CH04 14 13 14
|
||||
CH05 14 13 14
|
||||
CH06 14 13 14
|
||||
CH07 14 13 14
|
||||
CH08 14 13 14
|
||||
CH09 14 13 14
|
||||
CH10 14 13 14
|
||||
CH11 14 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 15 16 15
|
||||
CH07 15 16 15
|
||||
CH08 15 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,27 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8723B_MP_Parameter_v2_20130307
|
||||
//RTL8723BE_20130304
|
||||
//RTL8192EE_20130426_OnSite
|
||||
//=======================================================================================================================================//
|
||||
// [0][1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29] //
|
||||
//=======================================================================================================================================//
|
||||
[2G][A][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_P
|
||||
[2G][A][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_N
|
||||
[2G][B][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_P
|
||||
[2G][B][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_N
|
||||
[2G][A][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GA_P
|
||||
[2G][A][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GA_N
|
||||
[2G][B][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GB_P
|
||||
[2G][B][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GB_N
|
||||
[5G][A][+][ALL][0] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} //5GLA_P
|
||||
[5G][A][-][ALL][0] = {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLA_N
|
||||
[5G][B][+][ALL][0] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20} //5GLB_P
|
||||
[5G][B][-][ALL][0] = {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLB_N
|
||||
[5G][A][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GMA_P
|
||||
[5G][A][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16} //5GMA_N
|
||||
[5G][B][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20} //5GMB_P
|
||||
[5G][B][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GMB_N
|
||||
[5G][A][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHA_P
|
||||
[5G][A][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16} //5GHA_N
|
||||
[5G][B][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHB_P
|
||||
[5G][B][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GHB_N
|
||||
@ -0,0 +1,133 @@
|
||||
//rtl8192e version = 58
|
||||
0xc78 0xfb000001 // -110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfb020001
|
||||
0xc78 0xfb030001
|
||||
0xc78 0xfb040001
|
||||
0xc78 0xfa050001 // -100
|
||||
0xc78 0xf9060001
|
||||
0xc78 0xf8070001
|
||||
0xc78 0xf7080001
|
||||
0xc78 0xf6090001
|
||||
0xc78 0xf50A0001 // -90
|
||||
0xc78 0xf40B0001
|
||||
0xc78 0xf30C0001
|
||||
0xc78 0xf20D0001
|
||||
0xc78 0xf10E0001
|
||||
0xc78 0xf00F0001 // -80
|
||||
0xc78 0xef100001
|
||||
0xc78 0xee110001
|
||||
0xc78 0xed120001
|
||||
0xc78 0xec130001
|
||||
0xc78 0xeb140001 // -70
|
||||
0xc78 0xea150001
|
||||
0xc78 0xe9160001
|
||||
0xc78 0xe8170001
|
||||
0xc78 0xe7180001
|
||||
0xc78 0xe6190001 // -60
|
||||
0xc78 0xe51A0001
|
||||
0xc78 0xe41B0001
|
||||
0xc78 0xe31C0001
|
||||
0xc78 0xe21D0001
|
||||
0xc78 0xe11E0001 // -50
|
||||
0xc78 0x8a1F0001
|
||||
0xc78 0x89200001
|
||||
0xc78 0x88210001
|
||||
0xc78 0x87220001
|
||||
0xc78 0x86230001 // -40
|
||||
0xc78 0x85240001
|
||||
0xc78 0x84250001
|
||||
0xc78 0x83260001
|
||||
0xc78 0x82270001
|
||||
0xc78 0x6a280001 //-30
|
||||
0xc78 0x69290001
|
||||
0xc78 0x682A0001
|
||||
0xc78 0x672B0001
|
||||
0xc78 0x662C0001
|
||||
0xc78 0x652D0001 // -20
|
||||
0xc78 0x642E0001
|
||||
0xc78 0x632F0001
|
||||
0xc78 0x62300001
|
||||
0xc78 0x61310001
|
||||
0xc78 0x60320001 // -10
|
||||
0xc78 0x47330001
|
||||
0xc78 0x46340001
|
||||
0xc78 0x45350001
|
||||
0xc78 0x44360001
|
||||
0xc78 0x43370001 // 0
|
||||
0xc78 0x42380001
|
||||
0xc78 0x41390001
|
||||
0xc78 0x403A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfe400001 //-110
|
||||
0xc78 0xfe410001
|
||||
0xc78 0xfe420001
|
||||
0xc78 0xfe430001
|
||||
0xc78 0xfd440001
|
||||
0xc78 0xfc450001 //-100
|
||||
0xc78 0xfb460001
|
||||
0xc78 0xfa470001
|
||||
0xc78 0xf9480001
|
||||
0xc78 0xf8490001
|
||||
0xc78 0xf74a0001 //-90
|
||||
0xc78 0xf64b0001
|
||||
0xc78 0xf54c0001
|
||||
0xc78 0xf44d0001
|
||||
0xc78 0xf34e0001
|
||||
0xc78 0xf24f0001 //-80
|
||||
0xc78 0xf1500001
|
||||
0xc78 0xf0510001
|
||||
0xc78 0xef520001
|
||||
0xc78 0xee530001
|
||||
0xc78 0xed540001 //-70
|
||||
0xc78 0xec550001
|
||||
0xc78 0xeb560001
|
||||
0xc78 0xea570001
|
||||
0xc78 0xe9580001
|
||||
0xc78 0xe8590001 //-60
|
||||
0xc78 0xe75a0001
|
||||
0xc78 0xe65b0001
|
||||
0xc78 0xe55c0001
|
||||
0xc78 0xe45d0001
|
||||
0xc78 0xe35e0001 //-50
|
||||
0xc78 0x885f0001
|
||||
0xc78 0x87600001
|
||||
0xc78 0xaa610001
|
||||
0xc78 0xa9620001
|
||||
0xc78 0xa8630001 //-40
|
||||
0xc78 0xa7640001
|
||||
0xc78 0xa6650001
|
||||
0xc78 0xa5660001
|
||||
0xc78 0x66670001
|
||||
0xc78 0x65680001 //-30
|
||||
0xc78 0x64690001
|
||||
0xc78 0x636a0001
|
||||
0xc78 0x626b0001
|
||||
0xc78 0x496c0001
|
||||
0xc78 0x486d0001 //-20
|
||||
0xc78 0x476e0001
|
||||
0xc78 0x466f0001
|
||||
0xc78 0x45700001
|
||||
0xc78 0x44710001
|
||||
0xc78 0x43720001 //-10
|
||||
0xc78 0x42730001
|
||||
0xc78 0x41740001
|
||||
0xc78 0x40750001
|
||||
0xc78 0x40760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040220
|
||||
0xc58 0x00000220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,115 @@
|
||||
//rtl8192e version = 58
|
||||
//0x16 0x36 // SWR by Hillo
|
||||
//0x28 0x83
|
||||
//0x2C 0x96
|
||||
//0x2D 0x05
|
||||
//0x2E 0x82
|
||||
//0x2F 0xF0
|
||||
//0x64 0x00
|
||||
//0x65 0x01 // TRSWP=1 ANTSEL2=0 for WLAN
|
||||
//0x78 0x2A
|
||||
//0x79 0x00
|
||||
//0x7C 0xC3
|
||||
0x11 0xEB
|
||||
0x12 0x07
|
||||
0x14 0x75
|
||||
0x303 0xA7
|
||||
0x421 0x0F
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x00
|
||||
0x432 0x00
|
||||
0x433 0x01
|
||||
0x434 0x04
|
||||
0x435 0x05
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x07
|
||||
0x43f 0x08
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x10
|
||||
0x445 0x00
|
||||
0x446 0x00
|
||||
0x447 0x00
|
||||
0x448 0x00
|
||||
0x449 0xf0
|
||||
0x44a 0x0f
|
||||
0x44b 0x3e
|
||||
0x44c 0x10
|
||||
0x44d 0x00
|
||||
0x44e 0x00
|
||||
0x44f 0x00
|
||||
0x450 0x00
|
||||
0x451 0xf0
|
||||
0x452 0x0f
|
||||
0x453 0x00
|
||||
0x456 0x5e
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12
|
||||
0x541 0x64
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55c 0x50
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x2a
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x638 0x50
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40 //ACK timeout
|
||||
0x642 0x40 //EIFS
|
||||
0x643 0x00
|
||||
0x652 0x2B
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//rtl8192e version = 58
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390004
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390004
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x806c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d047c8 // A01[7] ant div disable
|
||||
0xa04 0x81ff800c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e30120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x1a1b0000
|
||||
0xa24 0x090e1317
|
||||
0xa28 0x00000204
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fff80
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x21807531
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x2112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013269 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x40000100
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x40000100
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000048
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,36 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8192E_MAC_PHY_Parameter_v024_MP_20130927
|
||||
#[v1][Exact]#
|
||||
#[2.4G][A]#
|
||||
[1Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[2Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[1Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[2Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[1Tx] 0xe00 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0xe00 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0xe04 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0xe04 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0xe10 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0xe10 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0xe14 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe14 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe18 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0xe1C 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
#[2.4G][B]#
|
||||
[1Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[2Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[1Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[2Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[1Tx] 0x830 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0x830 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0x834 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0x834 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0x83c 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0x83c 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0x848 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x848 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x84c 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0x868 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,127 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB_filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918): RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x83 0x00000
|
||||
0xB0 0xFF9F1
|
||||
0xB1 0x55418
|
||||
0xB2 0x8CC00 //VCO current
|
||||
0xB4 0x43083 //KVCO
|
||||
0xB5 0x08166 //5G LO buffier increase current
|
||||
0xB6 0x0803E // SDM neg edge
|
||||
0xB7 0x1C69f //LPF
|
||||
0xB8 0x0407F //LPF Defalt:080FF reduce R3 (121005) RDC Lily
|
||||
0xB9 0x90001 //Defalt:80001 CV curve offset +1 for 25C (121005) RDC Lily
|
||||
0xBA 0x40001 //0x40000 : SDM 3 change 2 order for in-band noise floor check 40M spur for CH7?
|
||||
0xBB 0x00400
|
||||
0xBC 0x00078
|
||||
0xBD 0xB3333
|
||||
0xBE 0x33340
|
||||
0xBF 0x00000
|
||||
0xC0 0x05999
|
||||
0xC1 0x09999
|
||||
0xC2 0x02400
|
||||
0xC3 0x00009
|
||||
0xC4 0x40C91
|
||||
0xC5 0x99999
|
||||
0xC6 0x000A3
|
||||
0xC7 0x88820
|
||||
0xC8 0x76C06
|
||||
0xC9 0x00000
|
||||
0xCA 0x80000
|
||||
0x1C 0x00000
|
||||
//0xB6 0x0803E
|
||||
//0xB2 0x8CC00 //VCO current
|
||||
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E45E
|
||||
0x53 0x00071 // [1:0] for Tx EVM shrink
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8 // a8=ba
|
||||
0x35 0x001e2 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01C24
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving (92EE)
|
||||
0x34 0xadd7
|
||||
0x34 0x9dd4
|
||||
0x34 0x8dd1
|
||||
0x34 0x7dce
|
||||
0x34 0x6dcb
|
||||
0x34 0x5dc8 //0x5cea
|
||||
0x34 0x4dc5 //0x4ce7
|
||||
0x34 0x34cc //0x34e7
|
||||
0x34 0x244f //0x246a
|
||||
0x34 0x144c //0x1467
|
||||
0x34 0x0014 //0x0068
|
||||
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 //54fb0
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
|
||||
0xffe
|
||||
//LC calibration start
|
||||
//0xb1 0x55400
|
||||
0x18 0x0fc07 //LC calibration
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
|
||||
//0xb1 0x55418
|
||||
//LC calibration end
|
||||
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,93 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918):RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x7F 0x00082 // for C cut
|
||||
0x81 0x3F000 // for C cut
|
||||
0x83 0x00000
|
||||
0x1C 0x00000
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E42e
|
||||
0x53 0x00071
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8
|
||||
0x35 0x001e0 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01Ca8
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving(92EE)
|
||||
0x34 0xadd7
|
||||
0x34 0x9dd4
|
||||
0x34 0x8dd1
|
||||
0x34 0x7dce
|
||||
0x34 0x6dcb
|
||||
0x34 0x5dc8 //0x5cea
|
||||
0x34 0x4dc5 //0x4ce7
|
||||
0x34 0x34cc //0x34e7
|
||||
0x34 0x244f //0x246a
|
||||
0x34 0x144c //0x1467
|
||||
0x34 0x0014 //0x0068
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // Update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 // 0x54fb0 update by Gary 120921
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
0x00 0x10159 //standby mode
|
||||
//0x18 0x0f407 //LC calibration only @ path A
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 17 14 16
|
||||
CH02 17 14 16
|
||||
CH03 17 14 16
|
||||
CH04 17 14 16
|
||||
CH05 17 14 16
|
||||
CH06 17 14 16
|
||||
CH07 17 14 16
|
||||
CH08 17 14 16
|
||||
CH09 17 14 16
|
||||
CH10 17 14 16
|
||||
CH11 17 14 16
|
||||
CH12 NA 14 16
|
||||
CH13 NA 14 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 11 13
|
||||
CH02 13 11 13
|
||||
CH03 13 11 13
|
||||
CH04 13 11 13
|
||||
CH05 13 11 13
|
||||
CH06 13 11 13
|
||||
CH07 13 11 13
|
||||
CH08 13 11 13
|
||||
CH09 13 11 13
|
||||
CH10 13 11 13
|
||||
CH11 13 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 17 13 14
|
||||
CH04 17 13 14
|
||||
CH05 17 13 14
|
||||
CH06 17 13 14
|
||||
CH07 17 13 14
|
||||
CH08 17 13 14
|
||||
CH09 15 13 14
|
||||
CH10 15 13 14
|
||||
CH11 15 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 14 13 13
|
||||
CH10 14 13 13
|
||||
CH11 14 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 16 16 15
|
||||
CH07 16 16 15
|
||||
CH08 16 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 15 13 13
|
||||
CH07 15 13 13
|
||||
CH08 15 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 16 16
|
||||
CH02 15 16 16
|
||||
CH03 15 16 16
|
||||
CH04 15 16 16
|
||||
CH05 15 16 16
|
||||
CH06 15 16 16
|
||||
CH07 15 16 16
|
||||
CH08 15 16 16
|
||||
CH09 14 16 16
|
||||
CH10 14 16 16
|
||||
CH11 14 16 16
|
||||
CH12 NA 16 16
|
||||
CH13 NA 16 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 12 11 13
|
||||
CH02 12 11 13
|
||||
CH03 12 11 13
|
||||
CH04 12 11 13
|
||||
CH05 12 11 13
|
||||
CH06 12 11 13
|
||||
CH07 12 11 13
|
||||
CH08 12 11 13
|
||||
CH09 11 11 13
|
||||
CH10 11 11 13
|
||||
CH11 11 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 14 13 14
|
||||
CH04 14 13 14
|
||||
CH05 14 13 14
|
||||
CH06 14 13 14
|
||||
CH07 14 13 14
|
||||
CH08 14 13 14
|
||||
CH09 14 13 14
|
||||
CH10 14 13 14
|
||||
CH11 14 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 15 16 15
|
||||
CH07 15 16 15
|
||||
CH08 15 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,27 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8723B_MP_Parameter_v2_20130307
|
||||
//RTL8723BE_20130304
|
||||
//RTL8192EE_20130426_OnSite
|
||||
//=======================================================================================================================================//
|
||||
// [0][1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29] //
|
||||
//=======================================================================================================================================//
|
||||
[2G][A][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_P
|
||||
[2G][A][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_N
|
||||
[2G][B][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_P
|
||||
[2G][B][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_N
|
||||
[2G][A][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GA_P
|
||||
[2G][A][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GA_N
|
||||
[2G][B][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GB_P
|
||||
[2G][B][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GB_N
|
||||
[5G][A][+][ALL][0] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} //5GLA_P
|
||||
[5G][A][-][ALL][0] = {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLA_N
|
||||
[5G][B][+][ALL][0] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20} //5GLB_P
|
||||
[5G][B][-][ALL][0] = {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLB_N
|
||||
[5G][A][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GMA_P
|
||||
[5G][A][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16} //5GMA_N
|
||||
[5G][B][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20} //5GMB_P
|
||||
[5G][B][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GMB_N
|
||||
[5G][A][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHA_P
|
||||
[5G][A][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16} //5GHA_N
|
||||
[5G][B][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHB_P
|
||||
[5G][B][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GHB_N
|
||||
@ -0,0 +1,133 @@
|
||||
//rtl8192e version = 58
|
||||
0xc78 0xfb000001 // -110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfb020001
|
||||
0xc78 0xfb030001
|
||||
0xc78 0xfb040001
|
||||
0xc78 0xfb050001 // -100
|
||||
0xc78 0xfa060001
|
||||
0xc78 0xf9070001
|
||||
0xc78 0xf8080001
|
||||
0xc78 0xf7090001
|
||||
0xc78 0xf60A0001 // -90
|
||||
0xc78 0xf50B0001
|
||||
0xc78 0xf40C0001
|
||||
0xc78 0xf30D0001
|
||||
0xc78 0xf20E0001
|
||||
0xc78 0xf10F0001 // -80
|
||||
0xc78 0xf0100001
|
||||
0xc78 0xef110001
|
||||
0xc78 0xee120001
|
||||
0xc78 0xed130001
|
||||
0xc78 0xec140001 // -70
|
||||
0xc78 0xeb150001
|
||||
0xc78 0xea160001
|
||||
0xc78 0xe9170001
|
||||
0xc78 0xe8180001
|
||||
0xc78 0xe7190001 // -60
|
||||
0xc78 0xe61A0001
|
||||
0xc78 0xe51B0001
|
||||
0xc78 0xe41C0001
|
||||
0xc78 0xe31D0001
|
||||
0xc78 0xe21E0001 // -50
|
||||
0xc78 0xe11F0001
|
||||
0xc78 0x8a200001
|
||||
0xc78 0x89210001
|
||||
0xc78 0x88220001
|
||||
0xc78 0x87230001 // -40
|
||||
0xc78 0x86240001
|
||||
0xc78 0x85250001
|
||||
0xc78 0x84260001
|
||||
0xc78 0x83270001
|
||||
0xc78 0x82280001 //-30
|
||||
0xc78 0x6a290001
|
||||
0xc78 0x692A0001
|
||||
0xc78 0x682B0001
|
||||
0xc78 0x672C0001
|
||||
0xc78 0x662D0001 // -20
|
||||
0xc78 0x652E0001
|
||||
0xc78 0x642F0001
|
||||
0xc78 0x63300001
|
||||
0xc78 0x62310001
|
||||
0xc78 0x61320001 // -10
|
||||
0xc78 0x60330001
|
||||
0xc78 0x47340001
|
||||
0xc78 0x46350001
|
||||
0xc78 0x45360001
|
||||
0xc78 0x44370001 // 0
|
||||
0xc78 0x43380001
|
||||
0xc78 0x42390001
|
||||
0xc78 0x413A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfe400001 //-110
|
||||
0xc78 0xfe410001
|
||||
0xc78 0xfe420001
|
||||
0xc78 0xfe430001
|
||||
0xc78 0xfe440001
|
||||
0xc78 0xfd450001 //-100
|
||||
0xc78 0xfc460001
|
||||
0xc78 0xfb470001
|
||||
0xc78 0xfa480001
|
||||
0xc78 0xf9490001
|
||||
0xc78 0xf84a0001 //-90
|
||||
0xc78 0xf74b0001
|
||||
0xc78 0xf64c0001
|
||||
0xc78 0xf54d0001
|
||||
0xc78 0xf44e0001
|
||||
0xc78 0xf34f0001//-80
|
||||
0xc78 0xf2500001
|
||||
0xc78 0xf1510001
|
||||
0xc78 0xf0520001
|
||||
0xc78 0xef530001
|
||||
0xc78 0xee540001 //-70
|
||||
0xc78 0xed550001
|
||||
0xc78 0xec560001
|
||||
0xc78 0xeb570001
|
||||
0xc78 0xea580001
|
||||
0xc78 0x09590001 //-60
|
||||
0xc78 0x085a0001
|
||||
0xc78 0x075b0001
|
||||
0xc78 0x065c0001
|
||||
0xc78 0x055d0001
|
||||
0xc78 0x045e0001 //-50
|
||||
0xc78 0x035f0001
|
||||
0xc78 0x29600001
|
||||
0xc78 0x28610001
|
||||
0xc78 0x27620001
|
||||
0xc78 0x26630001 //-40
|
||||
0xc78 0x25640001
|
||||
0xc78 0x24650001
|
||||
0xc78 0x23660001
|
||||
0xc78 0x68670001
|
||||
0xc78 0x67680001 //-30
|
||||
0xc78 0x66690001
|
||||
0xc78 0x656a0001
|
||||
0xc78 0x646b0001
|
||||
0xc78 0x636c0001
|
||||
0xc78 0x626d0001 //-20
|
||||
0xc78 0x496e0001
|
||||
0xc78 0x486f0001
|
||||
0xc78 0x47700001
|
||||
0xc78 0x46710001
|
||||
0xc78 0x45720001 //-10
|
||||
0xc78 0x44730001
|
||||
0xc78 0x43740001
|
||||
0xc78 0x42750001
|
||||
0xc78 0x41760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040220
|
||||
0xc58 0x00000220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,115 @@
|
||||
//rtl8192e version = 58
|
||||
//0x16 0x36 // SWR by Hillo
|
||||
//0x28 0x83
|
||||
//0x2C 0x96
|
||||
//0x2D 0x05
|
||||
//0x2E 0x82
|
||||
//0x2F 0xF0
|
||||
//0x64 0x00
|
||||
//0x65 0x01 // TRSWP=1 ANTSEL2=0 for WLAN
|
||||
//0x78 0x2A
|
||||
//0x79 0x00
|
||||
//0x7C 0xC3
|
||||
0x11 0xEB
|
||||
0x12 0x07
|
||||
0x14 0x75
|
||||
0x303 0xA7
|
||||
0x421 0x0F
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x00
|
||||
0x432 0x00
|
||||
0x433 0x01
|
||||
0x434 0x04
|
||||
0x435 0x05
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x07
|
||||
0x43f 0x08
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x10
|
||||
0x445 0x00
|
||||
0x446 0x00
|
||||
0x447 0x00
|
||||
0x448 0x00
|
||||
0x449 0xf0
|
||||
0x44a 0x0f
|
||||
0x44b 0x3e
|
||||
0x44c 0x10
|
||||
0x44d 0x00
|
||||
0x44e 0x00
|
||||
0x44f 0x00
|
||||
0x450 0x00
|
||||
0x451 0xf0
|
||||
0x452 0x0f
|
||||
0x453 0x00
|
||||
0x456 0x5e
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12
|
||||
0x541 0x64
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55c 0x50
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x2a
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x638 0x50
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40 //ACK timeout
|
||||
0x642 0x40 //EIFS
|
||||
0x643 0x00
|
||||
0x652 0x2B
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//rtl8192e version = 58
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390004
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390004
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x806c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d047c8 // A01[7] ant div disable
|
||||
0xa04 0x81ff800c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e30120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x1a1b0000
|
||||
0xa24 0x090e1317
|
||||
0xa28 0x00000204
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fff80
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x21807531
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x2112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013269 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x40000100
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x40000100
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000048
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,36 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8192E_MAC_PHY_Parameter_v024_MP_20130927
|
||||
#[v1][Exact]#
|
||||
#[2.4G][A]#
|
||||
[1Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[2Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[1Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[2Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[1Tx] 0xe00 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0xe00 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0xe04 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0xe04 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0xe10 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0xe10 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0xe14 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe14 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe18 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0xe1C 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
#[2.4G][B]#
|
||||
[1Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[2Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[1Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[2Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[1Tx] 0x830 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0x830 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0x834 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0x834 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0x83c 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0x83c 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0x848 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x848 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x84c 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0x868 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,127 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB_filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918): RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x83 0x00000
|
||||
0xB0 0xFF9F1
|
||||
0xB1 0x55418
|
||||
0xB2 0x8CC00 //VCO current
|
||||
0xB4 0x43083 //KVCO
|
||||
0xB5 0x08166 //5G LO buffier increase current
|
||||
0xB6 0x0803E // SDM neg edge
|
||||
0xB7 0x1C69f //LPF
|
||||
0xB8 0x0407F //LPF Defalt:080FF reduce R3 (121005) RDC Lily
|
||||
0xB9 0x90001 //Defalt:80001 CV curve offset +1 for 25C (121005) RDC Lily
|
||||
0xBA 0x40001 //0x40000 : SDM 3 change 2 order for in-band noise floor check 40M spur for CH7?
|
||||
0xBB 0x00400
|
||||
0xBC 0x00078
|
||||
0xBD 0xB3333
|
||||
0xBE 0x33340
|
||||
0xBF 0x00000
|
||||
0xC0 0x05999
|
||||
0xC1 0x09999
|
||||
0xC2 0x02400
|
||||
0xC3 0x00009
|
||||
0xC4 0x40C91
|
||||
0xC5 0x99999
|
||||
0xC6 0x000A3
|
||||
0xC7 0x88820
|
||||
0xC8 0x76C06
|
||||
0xC9 0x00000
|
||||
0xCA 0x80000
|
||||
0x1C 0x00000
|
||||
//0xB6 0x0803E
|
||||
//0xB2 0x8CC00 //VCO current
|
||||
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E45E
|
||||
0x53 0x00071 // [1:0] for Tx EVM shrink
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8 // a8=ba
|
||||
0x35 0x001e2 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01C24
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving (92EE)
|
||||
0x34 0xadd7
|
||||
0x34 0x9dd4
|
||||
0x34 0x8dd1
|
||||
0x34 0x7dce
|
||||
0x34 0x6dcb
|
||||
0x34 0x5dc8 //0x5cea
|
||||
0x34 0x4dc5 //0x4ce7
|
||||
0x34 0x34cc //0x34e7
|
||||
0x34 0x244f //0x246a
|
||||
0x34 0x144c //0x1467
|
||||
0x34 0x0014 //0x0068
|
||||
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 //54fb0
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
|
||||
0xffe
|
||||
//LC calibration start
|
||||
//0xb1 0x55400
|
||||
0x18 0x0fc07 //LC calibration
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
|
||||
//0xb1 0x55418
|
||||
//LC calibration end
|
||||
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,93 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918):RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x7F 0x00082 // for C cut
|
||||
0x81 0x3F000 // for C cut
|
||||
0x83 0x00000
|
||||
0x1C 0x00000
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E42e
|
||||
0x53 0x00071
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8
|
||||
0x35 0x001e0 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01Ca8
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving(92EE)
|
||||
0x34 0xadd7
|
||||
0x34 0x9dd4
|
||||
0x34 0x8dd1
|
||||
0x34 0x7dce
|
||||
0x34 0x6dcb
|
||||
0x34 0x5dc8 //0x5cea
|
||||
0x34 0x4dc5 //0x4ce7
|
||||
0x34 0x34cc //0x34e7
|
||||
0x34 0x244f //0x246a
|
||||
0x34 0x144c //0x1467
|
||||
0x34 0x0014 //0x0068
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // Update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 // 0x54fb0 update by Gary 120921
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
0x00 0x10159 //standby mode
|
||||
//0x18 0x0f407 //LC calibration only @ path A
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 17 14 16
|
||||
CH02 17 14 16
|
||||
CH03 17 14 16
|
||||
CH04 17 14 16
|
||||
CH05 17 14 16
|
||||
CH06 17 14 16
|
||||
CH07 17 14 16
|
||||
CH08 17 14 16
|
||||
CH09 17 14 16
|
||||
CH10 17 14 16
|
||||
CH11 17 14 16
|
||||
CH12 NA 14 16
|
||||
CH13 NA 14 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 11 13
|
||||
CH02 13 11 13
|
||||
CH03 13 11 13
|
||||
CH04 13 11 13
|
||||
CH05 13 11 13
|
||||
CH06 13 11 13
|
||||
CH07 13 11 13
|
||||
CH08 13 11 13
|
||||
CH09 13 11 13
|
||||
CH10 13 11 13
|
||||
CH11 13 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 17 13 14
|
||||
CH04 17 13 14
|
||||
CH05 17 13 14
|
||||
CH06 17 13 14
|
||||
CH07 17 13 14
|
||||
CH08 17 13 14
|
||||
CH09 15 13 14
|
||||
CH10 15 13 14
|
||||
CH11 15 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 14 13 13
|
||||
CH10 14 13 13
|
||||
CH11 14 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 16 16 15
|
||||
CH07 16 16 15
|
||||
CH08 16 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 15 13 13
|
||||
CH07 15 13 13
|
||||
CH08 15 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 16 16
|
||||
CH02 15 16 16
|
||||
CH03 15 16 16
|
||||
CH04 15 16 16
|
||||
CH05 15 16 16
|
||||
CH06 15 16 16
|
||||
CH07 15 16 16
|
||||
CH08 15 16 16
|
||||
CH09 14 16 16
|
||||
CH10 14 16 16
|
||||
CH11 14 16 16
|
||||
CH12 NA 16 16
|
||||
CH13 NA 16 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 12 11 13
|
||||
CH02 12 11 13
|
||||
CH03 12 11 13
|
||||
CH04 12 11 13
|
||||
CH05 12 11 13
|
||||
CH06 12 11 13
|
||||
CH07 12 11 13
|
||||
CH08 12 11 13
|
||||
CH09 11 11 13
|
||||
CH10 11 11 13
|
||||
CH11 11 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 14 13 14
|
||||
CH04 14 13 14
|
||||
CH05 14 13 14
|
||||
CH06 14 13 14
|
||||
CH07 14 13 14
|
||||
CH08 14 13 14
|
||||
CH09 14 13 14
|
||||
CH10 14 13 14
|
||||
CH11 14 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 15 16 15
|
||||
CH07 15 16 15
|
||||
CH08 15 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,27 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8723B_MP_Parameter_v2_20130307
|
||||
//RTL8723BE_20130304
|
||||
//RTL8192EE_20130426_OnSite
|
||||
//=======================================================================================================================================//
|
||||
// [0][1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29] //
|
||||
//=======================================================================================================================================//
|
||||
[2G][A][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_P
|
||||
[2G][A][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_N
|
||||
[2G][B][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_P
|
||||
[2G][B][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_N
|
||||
[2G][A][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GA_P
|
||||
[2G][A][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GA_N
|
||||
[2G][B][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GB_P
|
||||
[2G][B][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GB_N
|
||||
[5G][A][+][ALL][0] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} //5GLA_P
|
||||
[5G][A][-][ALL][0] = {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLA_N
|
||||
[5G][B][+][ALL][0] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20} //5GLB_P
|
||||
[5G][B][-][ALL][0] = {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLB_N
|
||||
[5G][A][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GMA_P
|
||||
[5G][A][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16} //5GMA_N
|
||||
[5G][B][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20} //5GMB_P
|
||||
[5G][B][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GMB_N
|
||||
[5G][A][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHA_P
|
||||
[5G][A][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16} //5GHA_N
|
||||
[5G][B][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHB_P
|
||||
[5G][B][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GHB_N
|
||||
@ -0,0 +1,133 @@
|
||||
//rtl8192e version = 58
|
||||
0xc78 0xfb000001 // -110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfa020001
|
||||
0xc78 0xf9030001
|
||||
0xc78 0xf8040001
|
||||
0xc78 0xf7050001 // -100
|
||||
0xc78 0xf6060001
|
||||
0xc78 0xf5070001
|
||||
0xc78 0xf4080001
|
||||
0xc78 0xf3090001
|
||||
0xc78 0xf20A0001 // -90
|
||||
0xc78 0xf10B0001
|
||||
0xc78 0xf00C0001
|
||||
0xc78 0xef0D0001
|
||||
0xc78 0xee0E0001
|
||||
0xc78 0xed0F0001 // -80
|
||||
0xc78 0xec100001
|
||||
0xc78 0xeb110001
|
||||
0xc78 0xea120001
|
||||
0xc78 0xe9130001
|
||||
0xc78 0xe8140001 // -70
|
||||
0xc78 0xe7150001
|
||||
0xc78 0xe6160001
|
||||
0xc78 0xe5170001
|
||||
0xc78 0xe4180001
|
||||
0xc78 0xe3190001 // -60
|
||||
0xc78 0xe21A0001
|
||||
0xc78 0xe11B0001
|
||||
0xc78 0x8a1C0001
|
||||
0xc78 0x891D0001
|
||||
0xc78 0x881E0001 // -50
|
||||
0xc78 0x871F0001
|
||||
0xc78 0x86200001
|
||||
0xc78 0x85210001
|
||||
0xc78 0x84220001
|
||||
0xc78 0x83230001 // -40
|
||||
0xc78 0x82240001
|
||||
0xc78 0x6a250001
|
||||
0xc78 0x69260001
|
||||
0xc78 0x68270001
|
||||
0xc78 0x67280001 //-30
|
||||
0xc78 0x66290001
|
||||
0xc78 0x652A0001
|
||||
0xc78 0x642B0001
|
||||
0xc78 0x632C0001
|
||||
0xc78 0x622D0001 // -20
|
||||
0xc78 0x612E0001
|
||||
0xc78 0x602F0001
|
||||
0xc78 0x47300001
|
||||
0xc78 0x46310001
|
||||
0xc78 0x45320001 // -10
|
||||
0xc78 0x44330001
|
||||
0xc78 0x43340001
|
||||
0xc78 0x42350001
|
||||
0xc78 0x41360001
|
||||
0xc78 0x40370001 // 0
|
||||
0xc78 0x40380001
|
||||
0xc78 0x40390001
|
||||
0xc78 0x403A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfe400001 //-110
|
||||
0xc78 0xfd410001
|
||||
0xc78 0xfc420001
|
||||
0xc78 0xfb430001
|
||||
0xc78 0xfa440001
|
||||
0xc78 0xf9450001 //-100
|
||||
0xc78 0xf8460001
|
||||
0xc78 0xf7470001
|
||||
0xc78 0xf6480001
|
||||
0xc78 0xf5490001
|
||||
0xc78 0xf44a0001 //-90
|
||||
0xc78 0xf34b0001
|
||||
0xc78 0xf24c0001
|
||||
0xc78 0xf14d0001
|
||||
0xc78 0xf04e0001
|
||||
0xc78 0xef4f0001 //-80
|
||||
0xc78 0xee500001
|
||||
0xc78 0xed510001
|
||||
0xc78 0xec520001
|
||||
0xc78 0xeb530001
|
||||
0xc78 0xea540001 //-70
|
||||
0xc78 0xe9550001
|
||||
0xc78 0xe8560001
|
||||
0xc78 0xe7570001
|
||||
0xc78 0xe6580001
|
||||
0xc78 0xe5590001 //-60
|
||||
0xc78 0xe45a0001
|
||||
0xc78 0xe35b0001
|
||||
0xc78 0x885c0001
|
||||
0xc78 0x875d0001
|
||||
0xc78 0xaa5e0001 //-50
|
||||
0xc78 0xa95f0001
|
||||
0xc78 0xa8600001
|
||||
0xc78 0xa7610001
|
||||
0xc78 0xa6620001
|
||||
0xc78 0xa5630001 //-40
|
||||
0xc78 0x66640001
|
||||
0xc78 0x65650001
|
||||
0xc78 0x64660001
|
||||
0xc78 0x63670001
|
||||
0xc78 0x62680001 //-30
|
||||
0xc78 0x49690001
|
||||
0xc78 0x486a0001
|
||||
0xc78 0x476b0001
|
||||
0xc78 0x466c0001
|
||||
0xc78 0x456d0001 //-20
|
||||
0xc78 0x446e0001
|
||||
0xc78 0x436f0001
|
||||
0xc78 0x42700001
|
||||
0xc78 0x41710001
|
||||
0xc78 0x40720001 //-10
|
||||
0xc78 0x40730001
|
||||
0xc78 0x40740001
|
||||
0xc78 0x40750001
|
||||
0xc78 0x40760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040220
|
||||
0xc58 0x00000220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,115 @@
|
||||
//rtl8192e version = 58
|
||||
//0x16 0x36 // SWR by Hillo
|
||||
//0x28 0x83
|
||||
//0x2C 0x96
|
||||
//0x2D 0x05
|
||||
//0x2E 0x82
|
||||
//0x2F 0xF0
|
||||
//0x64 0x00
|
||||
//0x65 0x01 // TRSWP=1 ANTSEL2=0 for WLAN
|
||||
//0x78 0x2A
|
||||
//0x79 0x00
|
||||
//0x7C 0xC3
|
||||
0x11 0xEB
|
||||
0x12 0x07
|
||||
0x14 0x75
|
||||
0x303 0xA7
|
||||
0x421 0x0F
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x00
|
||||
0x432 0x00
|
||||
0x433 0x01
|
||||
0x434 0x04
|
||||
0x435 0x05
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x07
|
||||
0x43f 0x08
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x10
|
||||
0x445 0x00
|
||||
0x446 0x00
|
||||
0x447 0x00
|
||||
0x448 0x00
|
||||
0x449 0xf0
|
||||
0x44a 0x0f
|
||||
0x44b 0x3e
|
||||
0x44c 0x10
|
||||
0x44d 0x00
|
||||
0x44e 0x00
|
||||
0x44f 0x00
|
||||
0x450 0x00
|
||||
0x451 0xf0
|
||||
0x452 0x0f
|
||||
0x453 0x00
|
||||
0x456 0x5e
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12
|
||||
0x541 0x64
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55c 0x50
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x2a
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x638 0x50
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40 //ACK timeout
|
||||
0x642 0x40 //EIFS
|
||||
0x643 0x00
|
||||
0x652 0x2B
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//rtl8192e version = 58
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390004
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390004
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x806c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d047c8 // A01[7] ant div disable
|
||||
0xa04 0x81ff800c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e30120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x12130000
|
||||
0xa24 0x060a0d10
|
||||
0xa28 0x00000103
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fff80
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x21807531
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x2112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013269 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x2d4000b5 // -3
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x2d4000b5 // -3
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000048
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,36 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8192E_MAC_PHY_Parameter_v024_MP_20130927
|
||||
#[v1][Exact]#
|
||||
#[2.4G][A]#
|
||||
[1Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[2Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[1Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[2Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[1Tx] 0xe00 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0xe00 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0xe04 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0xe04 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0xe10 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0xe10 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0xe14 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe14 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe18 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0xe1C 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
#[2.4G][B]#
|
||||
[1Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[2Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[1Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[2Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[1Tx] 0x830 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0x830 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0x834 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0x834 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0x83c 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0x83c 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0x848 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x848 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x84c 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0x868 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,127 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB_filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918): RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x83 0x00000
|
||||
0xB0 0xFF9F1
|
||||
0xB1 0x55418
|
||||
0xB2 0x8CC00 //VCO current
|
||||
0xB4 0x43083 //KVCO
|
||||
0xB5 0x08166 //5G LO buffier increase current
|
||||
0xB6 0x0803E // SDM neg edge
|
||||
0xB7 0x1C69f //LPF
|
||||
0xB8 0x0407F //LPF Defalt:080FF reduce R3 (121005) RDC Lily
|
||||
0xB9 0x90001 //Defalt:80001 CV curve offset +1 for 25C (121005) RDC Lily
|
||||
0xBA 0x40001 //0x40000 : SDM 3 change 2 order for in-band noise floor check 40M spur for CH7?
|
||||
0xBB 0x00400
|
||||
0xBC 0x00078
|
||||
0xBD 0xB3333
|
||||
0xBE 0x33340
|
||||
0xBF 0x00000
|
||||
0xC0 0x05999
|
||||
0xC1 0x09999
|
||||
0xC2 0x02400
|
||||
0xC3 0x00009
|
||||
0xC4 0x40C91
|
||||
0xC5 0x99999
|
||||
0xC6 0x000A3
|
||||
0xC7 0x88820
|
||||
0xC8 0x76C06
|
||||
0xC9 0x00000
|
||||
0xCA 0x80000
|
||||
0x1C 0x01C00 // RC cal for high power
|
||||
//0xB6 0x0803E
|
||||
//0xB2 0x8CC00 //VCO current
|
||||
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E45E
|
||||
0x53 0x00071 // [1:0] for Tx EVM shrink
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8 // a8=ba
|
||||
0x35 0x001e2 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01C24
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving (92EE)
|
||||
0x34 0xa093
|
||||
0x34 0x908f
|
||||
0x34 0x808c
|
||||
0x34 0x704d
|
||||
0x34 0x604a
|
||||
0x34 0x5047
|
||||
0x34 0x400a
|
||||
0x34 0x3007
|
||||
0x34 0x2004
|
||||
0x34 0x1001
|
||||
0x34 0x0000
|
||||
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 //54fb0
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
|
||||
0xffe
|
||||
//LC calibration start
|
||||
//0xb1 0x55400
|
||||
0x18 0x0fc07 //LC calibration
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
|
||||
////0xb1 //MP chip cant remark
|
||||
//LC calibration end
|
||||
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,93 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918):RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x7F 0x00082 // for C cut
|
||||
0x81 0x3F000 // for C cut
|
||||
0x83 0x00000
|
||||
0x1C 0x01C00 // RC cal for high power
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E42e
|
||||
0x53 0x00071
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8
|
||||
0x35 0x001e0 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01Ca8
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving(92EE)
|
||||
0x34 0xa093
|
||||
0x34 0x908f
|
||||
0x34 0x808c
|
||||
0x34 0x704d
|
||||
0x34 0x604a
|
||||
0x34 0x5047
|
||||
0x34 0x400a
|
||||
0x34 0x3007
|
||||
0x34 0x2004
|
||||
0x34 0x1001
|
||||
0x34 0x0000
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // Update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 // 0x54fb0 update by Gary 120921
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
0x00 0x10159 //standby mode
|
||||
//0x18 0x0f407 //LC calibration only @ path A
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 17 14 16
|
||||
CH02 17 14 16
|
||||
CH03 17 14 16
|
||||
CH04 17 14 16
|
||||
CH05 17 14 16
|
||||
CH06 17 14 16
|
||||
CH07 17 14 16
|
||||
CH08 17 14 16
|
||||
CH09 17 14 16
|
||||
CH10 17 14 16
|
||||
CH11 17 14 16
|
||||
CH12 NA 14 16
|
||||
CH13 NA 14 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 11 13
|
||||
CH02 13 11 13
|
||||
CH03 13 11 13
|
||||
CH04 13 11 13
|
||||
CH05 13 11 13
|
||||
CH06 13 11 13
|
||||
CH07 13 11 13
|
||||
CH08 13 11 13
|
||||
CH09 13 11 13
|
||||
CH10 13 11 13
|
||||
CH11 13 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 17 13 14
|
||||
CH04 17 13 14
|
||||
CH05 17 13 14
|
||||
CH06 17 13 14
|
||||
CH07 17 13 14
|
||||
CH08 17 13 14
|
||||
CH09 15 13 14
|
||||
CH10 15 13 14
|
||||
CH11 15 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 14 13 13
|
||||
CH10 14 13 13
|
||||
CH11 14 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 16 16 15
|
||||
CH07 16 16 15
|
||||
CH08 16 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 15 13 13
|
||||
CH07 15 13 13
|
||||
CH08 15 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 16 16
|
||||
CH02 15 16 16
|
||||
CH03 15 16 16
|
||||
CH04 15 16 16
|
||||
CH05 15 16 16
|
||||
CH06 15 16 16
|
||||
CH07 15 16 16
|
||||
CH08 15 16 16
|
||||
CH09 14 16 16
|
||||
CH10 14 16 16
|
||||
CH11 14 16 16
|
||||
CH12 NA 16 16
|
||||
CH13 NA 16 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 12 11 13
|
||||
CH02 12 11 13
|
||||
CH03 12 11 13
|
||||
CH04 12 11 13
|
||||
CH05 12 11 13
|
||||
CH06 12 11 13
|
||||
CH07 12 11 13
|
||||
CH08 12 11 13
|
||||
CH09 11 11 13
|
||||
CH10 11 11 13
|
||||
CH11 11 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 14 13 14
|
||||
CH04 14 13 14
|
||||
CH05 14 13 14
|
||||
CH06 14 13 14
|
||||
CH07 14 13 14
|
||||
CH08 14 13 14
|
||||
CH09 14 13 14
|
||||
CH10 14 13 14
|
||||
CH11 14 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 15 16 15
|
||||
CH07 15 16 15
|
||||
CH08 15 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,27 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8723B_MP_Parameter_v2_20130307
|
||||
//RTL8723BE_20130304
|
||||
//RTL8192EE_20130426_OnSite
|
||||
//=======================================================================================================================================//
|
||||
// [0][1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29] //
|
||||
//=======================================================================================================================================//
|
||||
[2G][A][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_P
|
||||
[2G][A][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_N
|
||||
[2G][B][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_P
|
||||
[2G][B][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_N
|
||||
[2G][A][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GA_P
|
||||
[2G][A][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GA_N
|
||||
[2G][B][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GB_P
|
||||
[2G][B][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GB_N
|
||||
[5G][A][+][ALL][0] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} //5GLA_P
|
||||
[5G][A][-][ALL][0] = {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLA_N
|
||||
[5G][B][+][ALL][0] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20} //5GLB_P
|
||||
[5G][B][-][ALL][0] = {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLB_N
|
||||
[5G][A][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GMA_P
|
||||
[5G][A][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16} //5GMA_N
|
||||
[5G][B][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20} //5GMB_P
|
||||
[5G][B][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GMB_N
|
||||
[5G][A][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHA_P
|
||||
[5G][A][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16} //5GHA_N
|
||||
[5G][B][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHB_P
|
||||
[5G][B][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GHB_N
|
||||
@ -0,0 +1,133 @@
|
||||
//rtl8192e version = 58
|
||||
0xc78 0xfb000001 // -110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfb020001
|
||||
0xc78 0xfb030001
|
||||
0xc78 0xfa040001
|
||||
0xc78 0xf9050001 // -100
|
||||
0xc78 0xf8060001
|
||||
0xc78 0xf7070001
|
||||
0xc78 0xf6080001
|
||||
0xc78 0xf5090001
|
||||
0xc78 0xf40A0001 // -90
|
||||
0xc78 0xf30B0001
|
||||
0xc78 0xf20C0001
|
||||
0xc78 0xf10D0001
|
||||
0xc78 0xf00E0001
|
||||
0xc78 0xef0F0001 // -80
|
||||
0xc78 0xee100001
|
||||
0xc78 0xed110001
|
||||
0xc78 0xec120001
|
||||
0xc78 0xeb130001
|
||||
0xc78 0xea140001 // -70
|
||||
0xc78 0xe9150001
|
||||
0xc78 0xe8160001
|
||||
0xc78 0xe7170001
|
||||
0xc78 0xe6180001
|
||||
0xc78 0xe5190001 // -60
|
||||
0xc78 0xe41A0001
|
||||
0xc78 0xe31B0001
|
||||
0xc78 0xe21C0001
|
||||
0xc78 0xe11D0001
|
||||
0xc78 0x8a1E0001 // -50
|
||||
0xc78 0x891F0001
|
||||
0xc78 0x88200001
|
||||
0xc78 0x87210001
|
||||
0xc78 0x86220001
|
||||
0xc78 0x85230001 // -40
|
||||
0xc78 0x84240001
|
||||
0xc78 0x83250001
|
||||
0xc78 0x82260001
|
||||
0xc78 0x6a270001
|
||||
0xc78 0x69280001 //-30
|
||||
0xc78 0x68290001
|
||||
0xc78 0x672A0001
|
||||
0xc78 0x662B0001
|
||||
0xc78 0x652C0001
|
||||
0xc78 0x642D0001 // -20
|
||||
0xc78 0x632E0001
|
||||
0xc78 0x622F0001
|
||||
0xc78 0x61300001
|
||||
0xc78 0x60310001
|
||||
0xc78 0x47320001 // -10
|
||||
0xc78 0x46330001
|
||||
0xc78 0x45340001
|
||||
0xc78 0x44350001
|
||||
0xc78 0x43360001
|
||||
0xc78 0x42370001 // 0
|
||||
0xc78 0x41380001
|
||||
0xc78 0x40390001
|
||||
0xc78 0x403A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfe400001 //-110
|
||||
0xc78 0xfe410001
|
||||
0xc78 0xfe420001
|
||||
0xc78 0xfd430001
|
||||
0xc78 0xfc440001
|
||||
0xc78 0xfb450001 //-100
|
||||
0xc78 0xfa460001
|
||||
0xc78 0xf9470001
|
||||
0xc78 0xf8480001
|
||||
0xc78 0xf7490001
|
||||
0xc78 0xf64a0001 //-90
|
||||
0xc78 0xf54b0001
|
||||
0xc78 0xf44c0001
|
||||
0xc78 0xf34d0001
|
||||
0xc78 0xf24e0001
|
||||
0xc78 0xf14f0001 //-80
|
||||
0xc78 0xf0500001
|
||||
0xc78 0xef510001
|
||||
0xc78 0xee520001
|
||||
0xc78 0xed530001
|
||||
0xc78 0xec540001 //-70
|
||||
0xc78 0xeb550001
|
||||
0xc78 0xea560001
|
||||
0xc78 0xe9570001
|
||||
0xc78 0xe8580001
|
||||
0xc78 0xe7590001 //-60
|
||||
0xc78 0xe65a0001
|
||||
0xc78 0xe55b0001
|
||||
0xc78 0xe45c0001
|
||||
0xc78 0xe35d0001
|
||||
0xc78 0x885e0001 //-50
|
||||
0xc78 0x875f0001
|
||||
0xc78 0xaa600001
|
||||
0xc78 0xa9610001
|
||||
0xc78 0xa8620001
|
||||
0xc78 0xa7630001 //-40
|
||||
0xc78 0xa6640001
|
||||
0xc78 0xa5650001
|
||||
0xc78 0x66660001
|
||||
0xc78 0x65670001
|
||||
0xc78 0x64680001 //-30
|
||||
0xc78 0x63690001
|
||||
0xc78 0x626a0001
|
||||
0xc78 0x496b0001
|
||||
0xc78 0x486c0001
|
||||
0xc78 0x476d0001 //-20
|
||||
0xc78 0x466e0001
|
||||
0xc78 0x456f0001
|
||||
0xc78 0x44700001
|
||||
0xc78 0x43710001
|
||||
0xc78 0x42720001 //-10
|
||||
0xc78 0x41730001
|
||||
0xc78 0x40740001
|
||||
0xc78 0x40750001
|
||||
0xc78 0x40760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040220
|
||||
0xc58 0x00000220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,115 @@
|
||||
//rtl8192e version = 58
|
||||
//0x16 0x36 // SWR by Hillo
|
||||
//0x28 0x83
|
||||
//0x2C 0x96
|
||||
//0x2D 0x05
|
||||
//0x2E 0x82
|
||||
//0x2F 0xF0
|
||||
//0x64 0x00
|
||||
//0x65 0x01 // TRSWP=1 ANTSEL2=0 for WLAN
|
||||
//0x78 0x2A
|
||||
//0x79 0x00
|
||||
//0x7C 0xC3
|
||||
0x11 0xEB
|
||||
0x12 0x07
|
||||
0x14 0x75
|
||||
0x303 0xA7
|
||||
0x421 0x0F
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x00
|
||||
0x432 0x00
|
||||
0x433 0x01
|
||||
0x434 0x04
|
||||
0x435 0x05
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x07
|
||||
0x43f 0x08
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x10
|
||||
0x445 0x00
|
||||
0x446 0x00
|
||||
0x447 0x00
|
||||
0x448 0x00
|
||||
0x449 0xf0
|
||||
0x44a 0x0f
|
||||
0x44b 0x3e
|
||||
0x44c 0x10
|
||||
0x44d 0x00
|
||||
0x44e 0x00
|
||||
0x44f 0x00
|
||||
0x450 0x00
|
||||
0x451 0xf0
|
||||
0x452 0x0f
|
||||
0x453 0x00
|
||||
0x456 0x5e
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12
|
||||
0x541 0x64
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55c 0x50
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x2a
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x638 0x50
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40 //ACK timeout
|
||||
0x642 0x40 //EIFS
|
||||
0x643 0x00
|
||||
0x652 0x2B
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//rtl8192e version = 58
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390004
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390004
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x806c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d047c8 // A01[7] ant div disable
|
||||
0xa04 0x81ff800c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e30120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x12130000
|
||||
0xa24 0x060a0d10
|
||||
0xa28 0x00000103
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fff80
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x21807531
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x2112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013269 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x2d4000b5 // -3
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x2d4000b5 // -3
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000048
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,36 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8192E_MAC_PHY_Parameter_v024_MP_20130927
|
||||
#[v1][Exact]#
|
||||
#[2.4G][A]#
|
||||
[1Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[2Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[1Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[2Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[1Tx] 0xe00 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0xe00 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0xe04 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0xe04 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0xe10 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0xe10 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0xe14 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe14 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe18 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0xe1C 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
#[2.4G][B]#
|
||||
[1Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[2Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[1Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[2Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[1Tx] 0x830 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0x830 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0x834 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0x834 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0x83c 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0x83c 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0x848 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x848 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x84c 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0x868 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,127 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB_filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918): RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x83 0x00000
|
||||
0xB0 0xFF9F1
|
||||
0xB1 0x55418
|
||||
0xB2 0x8CC00 //VCO current
|
||||
0xB4 0x43083 //KVCO
|
||||
0xB5 0x08166 //5G LO buffier increase current
|
||||
0xB6 0x0803E // SDM neg edge
|
||||
0xB7 0x1C69f //LPF
|
||||
0xB8 0x0407F //LPF Defalt:080FF reduce R3 (121005) RDC Lily
|
||||
0xB9 0x90001 //Defalt:80001 CV curve offset +1 for 25C (121005) RDC Lily
|
||||
0xBA 0x40001 //0x40000 : SDM 3 change 2 order for in-band noise floor check 40M spur for CH7?
|
||||
0xBB 0x00400
|
||||
0xBC 0x00078
|
||||
0xBD 0xB3333
|
||||
0xBE 0x33340
|
||||
0xBF 0x00000
|
||||
0xC0 0x05999
|
||||
0xC1 0x09999
|
||||
0xC2 0x02400
|
||||
0xC3 0x00009
|
||||
0xC4 0x40C91
|
||||
0xC5 0x99999
|
||||
0xC6 0x000A3
|
||||
0xC7 0x88820
|
||||
0xC8 0x76C06
|
||||
0xC9 0x00000
|
||||
0xCA 0x80000
|
||||
0x1C 0x01C00 // RC cal for high power
|
||||
//0xB6 0x0803E
|
||||
//0xB2 0x8CC00 //VCO current
|
||||
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E45E
|
||||
0x53 0x00071 // [1:0] for Tx EVM shrink
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8 // a8=ba
|
||||
0x35 0x001e2 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01C24
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving (92EE)
|
||||
0x34 0xa093
|
||||
0x34 0x908f
|
||||
0x34 0x808c
|
||||
0x34 0x704d
|
||||
0x34 0x604a
|
||||
0x34 0x5047
|
||||
0x34 0x400a
|
||||
0x34 0x3007
|
||||
0x34 0x2004
|
||||
0x34 0x1001
|
||||
0x34 0x0000
|
||||
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 //54fb0
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
|
||||
0xffe
|
||||
//LC calibration start
|
||||
//0xb1 0x55400
|
||||
0x18 0x0fc07 //LC calibration
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
|
||||
//0xb1 0x55418
|
||||
//LC calibration end
|
||||
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,93 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918):RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x7F 0x00082 // for C cut
|
||||
0x81 0x3F000 // for C cut
|
||||
0x83 0x00000
|
||||
0x1C 0x01C00 // RC cal for high power
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E42e
|
||||
0x53 0x00071
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8
|
||||
0x35 0x001e0 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01Ca8
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving(92EE)
|
||||
0x34 0xa093
|
||||
0x34 0x908f
|
||||
0x34 0x808c
|
||||
0x34 0x704d
|
||||
0x34 0x604a
|
||||
0x34 0x5047
|
||||
0x34 0x400a
|
||||
0x34 0x3007
|
||||
0x34 0x2004
|
||||
0x34 0x1001
|
||||
0x34 0x0000
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // Update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 // 0x54fb0 update by Gary 120921
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
0x00 0x10159 //standby mode
|
||||
//0x18 0x0f407 //LC calibration only @ path A
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 17 14 16
|
||||
CH02 17 14 16
|
||||
CH03 17 14 16
|
||||
CH04 17 14 16
|
||||
CH05 17 14 16
|
||||
CH06 17 14 16
|
||||
CH07 17 14 16
|
||||
CH08 17 14 16
|
||||
CH09 17 14 16
|
||||
CH10 17 14 16
|
||||
CH11 17 14 16
|
||||
CH12 NA 14 16
|
||||
CH13 NA 14 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 11 13
|
||||
CH02 13 11 13
|
||||
CH03 13 11 13
|
||||
CH04 13 11 13
|
||||
CH05 13 11 13
|
||||
CH06 13 11 13
|
||||
CH07 13 11 13
|
||||
CH08 13 11 13
|
||||
CH09 13 11 13
|
||||
CH10 13 11 13
|
||||
CH11 13 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 17 13 14
|
||||
CH04 17 13 14
|
||||
CH05 17 13 14
|
||||
CH06 17 13 14
|
||||
CH07 17 13 14
|
||||
CH08 17 13 14
|
||||
CH09 15 13 14
|
||||
CH10 15 13 14
|
||||
CH11 15 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 14 13 13
|
||||
CH10 14 13 13
|
||||
CH11 14 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 16 16 15
|
||||
CH07 16 16 15
|
||||
CH08 16 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 15 13 13
|
||||
CH07 15 13 13
|
||||
CH08 15 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 16 16
|
||||
CH02 15 16 16
|
||||
CH03 15 16 16
|
||||
CH04 15 16 16
|
||||
CH05 15 16 16
|
||||
CH06 15 16 16
|
||||
CH07 15 16 16
|
||||
CH08 15 16 16
|
||||
CH09 14 16 16
|
||||
CH10 14 16 16
|
||||
CH11 14 16 16
|
||||
CH12 NA 16 16
|
||||
CH13 NA 16 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 12 11 13
|
||||
CH02 12 11 13
|
||||
CH03 12 11 13
|
||||
CH04 12 11 13
|
||||
CH05 12 11 13
|
||||
CH06 12 11 13
|
||||
CH07 12 11 13
|
||||
CH08 12 11 13
|
||||
CH09 11 11 13
|
||||
CH10 11 11 13
|
||||
CH11 11 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 14 13 14
|
||||
CH04 14 13 14
|
||||
CH05 14 13 14
|
||||
CH06 14 13 14
|
||||
CH07 14 13 14
|
||||
CH08 14 13 14
|
||||
CH09 14 13 14
|
||||
CH10 14 13 14
|
||||
CH11 14 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 15 16 15
|
||||
CH07 15 16 15
|
||||
CH08 15 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,27 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8723B_MP_Parameter_v2_20130307
|
||||
//RTL8723BE_20130304
|
||||
//RTL8192EE_20130426_OnSite
|
||||
//=======================================================================================================================================//
|
||||
// [0][1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29] //
|
||||
//=======================================================================================================================================//
|
||||
[2G][A][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_P
|
||||
[2G][A][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_N
|
||||
[2G][B][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_P
|
||||
[2G][B][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_N
|
||||
[2G][A][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GA_P
|
||||
[2G][A][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GA_N
|
||||
[2G][B][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GB_P
|
||||
[2G][B][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GB_N
|
||||
[5G][A][+][ALL][0] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} //5GLA_P
|
||||
[5G][A][-][ALL][0] = {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLA_N
|
||||
[5G][B][+][ALL][0] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20} //5GLB_P
|
||||
[5G][B][-][ALL][0] = {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLB_N
|
||||
[5G][A][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GMA_P
|
||||
[5G][A][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16} //5GMA_N
|
||||
[5G][B][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20} //5GMB_P
|
||||
[5G][B][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GMB_N
|
||||
[5G][A][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHA_P
|
||||
[5G][A][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16} //5GHA_N
|
||||
[5G][B][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHB_P
|
||||
[5G][B][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GHB_N
|
||||
@ -0,0 +1,133 @@
|
||||
//rtl8192e version = 58
|
||||
0xc78 0xfb000001 // -110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfb020001
|
||||
0xc78 0xfb030001
|
||||
0xc78 0xfb040001
|
||||
0xc78 0xfa050001 // -100
|
||||
0xc78 0xf9060001
|
||||
0xc78 0xf8070001
|
||||
0xc78 0xf7080001
|
||||
0xc78 0xf6090001
|
||||
0xc78 0xf50A0001 // -90
|
||||
0xc78 0xf40B0001
|
||||
0xc78 0xf30C0001
|
||||
0xc78 0xf20D0001
|
||||
0xc78 0xf10E0001
|
||||
0xc78 0xf00F0001 // -80
|
||||
0xc78 0xef100001
|
||||
0xc78 0xee110001
|
||||
0xc78 0xed120001
|
||||
0xc78 0xec130001
|
||||
0xc78 0xeb140001 // -70
|
||||
0xc78 0xea150001
|
||||
0xc78 0xe9160001
|
||||
0xc78 0xe8170001
|
||||
0xc78 0xe7180001
|
||||
0xc78 0xe6190001 // -60
|
||||
0xc78 0xe51A0001
|
||||
0xc78 0xe41B0001
|
||||
0xc78 0xe31C0001
|
||||
0xc78 0xe21D0001
|
||||
0xc78 0xe11E0001 // -50
|
||||
0xc78 0x8a1F0001
|
||||
0xc78 0x89200001
|
||||
0xc78 0x88210001
|
||||
0xc78 0x87220001
|
||||
0xc78 0x86230001 // -40
|
||||
0xc78 0x85240001
|
||||
0xc78 0x84250001
|
||||
0xc78 0x83260001
|
||||
0xc78 0x82270001
|
||||
0xc78 0x6a280001 //-30
|
||||
0xc78 0x69290001
|
||||
0xc78 0x682A0001
|
||||
0xc78 0x672B0001
|
||||
0xc78 0x662C0001
|
||||
0xc78 0x652D0001 // -20
|
||||
0xc78 0x642E0001
|
||||
0xc78 0x632F0001
|
||||
0xc78 0x62300001
|
||||
0xc78 0x61310001
|
||||
0xc78 0x60320001 // -10
|
||||
0xc78 0x47330001
|
||||
0xc78 0x46340001
|
||||
0xc78 0x45350001
|
||||
0xc78 0x44360001
|
||||
0xc78 0x43370001 // 0
|
||||
0xc78 0x42380001
|
||||
0xc78 0x41390001
|
||||
0xc78 0x403A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfe400001 //-110
|
||||
0xc78 0xfe410001
|
||||
0xc78 0xfe420001
|
||||
0xc78 0xfe430001
|
||||
0xc78 0xfd440001
|
||||
0xc78 0xfc450001 //-100
|
||||
0xc78 0xfb460001
|
||||
0xc78 0xfa470001
|
||||
0xc78 0xf9480001
|
||||
0xc78 0xf8490001
|
||||
0xc78 0xf74a0001 //-90
|
||||
0xc78 0xf64b0001
|
||||
0xc78 0xf54c0001
|
||||
0xc78 0xf44d0001
|
||||
0xc78 0xf34e0001
|
||||
0xc78 0xf24f0001 //-80
|
||||
0xc78 0xf1500001
|
||||
0xc78 0xf0510001
|
||||
0xc78 0xef520001
|
||||
0xc78 0xee530001
|
||||
0xc78 0xed540001 //-70
|
||||
0xc78 0xec550001
|
||||
0xc78 0xeb560001
|
||||
0xc78 0xea570001
|
||||
0xc78 0xe9580001
|
||||
0xc78 0xe8590001 //-60
|
||||
0xc78 0xe75a0001
|
||||
0xc78 0xe65b0001
|
||||
0xc78 0xe55c0001
|
||||
0xc78 0xe45d0001
|
||||
0xc78 0xe35e0001 //-50
|
||||
0xc78 0x885f0001
|
||||
0xc78 0x87600001
|
||||
0xc78 0xaa610001
|
||||
0xc78 0xa9620001
|
||||
0xc78 0xa8630001 //-40
|
||||
0xc78 0xa7640001
|
||||
0xc78 0xa6650001
|
||||
0xc78 0xa5660001
|
||||
0xc78 0x66670001
|
||||
0xc78 0x65680001 //-30
|
||||
0xc78 0x64690001
|
||||
0xc78 0x636a0001
|
||||
0xc78 0x626b0001
|
||||
0xc78 0x496c0001
|
||||
0xc78 0x486d0001 //-20
|
||||
0xc78 0x476e0001
|
||||
0xc78 0x466f0001
|
||||
0xc78 0x45700001
|
||||
0xc78 0x44710001
|
||||
0xc78 0x43720001 //-10
|
||||
0xc78 0x42730001
|
||||
0xc78 0x41740001
|
||||
0xc78 0x40750001
|
||||
0xc78 0x40760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040220
|
||||
0xc58 0x00000220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,115 @@
|
||||
//rtl8192e version = 58
|
||||
//0x16 0x36 // SWR by Hillo
|
||||
//0x28 0x83
|
||||
//0x2C 0x96
|
||||
//0x2D 0x05
|
||||
//0x2E 0x82
|
||||
//0x2F 0xF0
|
||||
//0x64 0x00
|
||||
//0x65 0x01 // TRSWP=1 ANTSEL2=0 for WLAN
|
||||
//0x78 0x2A
|
||||
//0x79 0x00
|
||||
//0x7C 0xC3
|
||||
0x11 0xEB
|
||||
0x12 0x07
|
||||
0x14 0x75
|
||||
0x303 0xA7
|
||||
0x421 0x0F
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x00
|
||||
0x432 0x00
|
||||
0x433 0x01
|
||||
0x434 0x04
|
||||
0x435 0x05
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x07
|
||||
0x43f 0x08
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x10
|
||||
0x445 0x00
|
||||
0x446 0x00
|
||||
0x447 0x00
|
||||
0x448 0x00
|
||||
0x449 0xf0
|
||||
0x44a 0x0f
|
||||
0x44b 0x3e
|
||||
0x44c 0x10
|
||||
0x44d 0x00
|
||||
0x44e 0x00
|
||||
0x44f 0x00
|
||||
0x450 0x00
|
||||
0x451 0xf0
|
||||
0x452 0x0f
|
||||
0x453 0x00
|
||||
0x456 0x5e
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12
|
||||
0x541 0x64
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55c 0x50
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x2a
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x638 0x50
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40 //ACK timeout
|
||||
0x642 0x40 //EIFS
|
||||
0x643 0x00
|
||||
0x652 0x2B
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//rtl8192e version = 58
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390004
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390004
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x806c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d047c8 // A01[7] ant div disable
|
||||
0xa04 0x81ff800c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e30120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x12130000
|
||||
0xa24 0x060a0d10
|
||||
0xa28 0x00000103
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fff80
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x21807531
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x2112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013269 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x2d4000b5 // -3
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x2d4000b5 // -3
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000048
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,36 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8192E_MAC_PHY_Parameter_v024_MP_20130927
|
||||
#[v1][Exact]#
|
||||
#[2.4G][A]#
|
||||
[1Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[2Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[1Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[2Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[1Tx] 0xe00 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0xe00 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0xe04 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0xe04 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0xe10 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0xe10 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0xe14 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe14 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe18 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0xe1C 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
#[2.4G][B]#
|
||||
[1Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[2Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[1Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[2Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[1Tx] 0x830 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0x830 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0x834 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0x834 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0x83c 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0x83c 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0x848 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x848 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x84c 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0x868 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,127 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB_filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918): RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x83 0x00000
|
||||
0xB0 0xFF9F1
|
||||
0xB1 0x55418
|
||||
0xB2 0x8CC00 //VCO current
|
||||
0xB4 0x43083 //KVCO
|
||||
0xB5 0x08166 //5G LO buffier increase current
|
||||
0xB6 0x0803E // SDM neg edge
|
||||
0xB7 0x1C69f //LPF
|
||||
0xB8 0x0407F //LPF Defalt:080FF reduce R3 (121005) RDC Lily
|
||||
0xB9 0x90001 //Defalt:80001 CV curve offset +1 for 25C (121005) RDC Lily
|
||||
0xBA 0x40001 //0x40000 : SDM 3 change 2 order for in-band noise floor check 40M spur for CH7?
|
||||
0xBB 0x00400
|
||||
0xBC 0x00078
|
||||
0xBD 0xB3333
|
||||
0xBE 0x33340
|
||||
0xBF 0x00000
|
||||
0xC0 0x05999
|
||||
0xC1 0x09999
|
||||
0xC2 0x02400
|
||||
0xC3 0x00009
|
||||
0xC4 0x40C91
|
||||
0xC5 0x99999
|
||||
0xC6 0x000A3
|
||||
0xC7 0x88820
|
||||
0xC8 0x76C06
|
||||
0xC9 0x00000
|
||||
0xCA 0x80000
|
||||
0x1C 0x01C00 // RC cal for high power
|
||||
//0xB6 0x0803E
|
||||
//0xB2 0x8CC00 //VCO current
|
||||
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E45E
|
||||
0x53 0x00071 // [1:0] for Tx EVM shrink
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8 // a8=ba
|
||||
0x35 0x001e2 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01C24
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving (92EE)
|
||||
0x34 0xa093
|
||||
0x34 0x908f
|
||||
0x34 0x808c
|
||||
0x34 0x704d
|
||||
0x34 0x604a
|
||||
0x34 0x5047
|
||||
0x34 0x400a
|
||||
0x34 0x3007
|
||||
0x34 0x2004
|
||||
0x34 0x1001
|
||||
0x34 0x0000
|
||||
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 //54fb0
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
|
||||
0xffe
|
||||
//LC calibration start
|
||||
//0xb1 0x55400
|
||||
0x18 0x0fc07 //LC calibration
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
|
||||
//0xb1 0x55418
|
||||
//LC calibration end
|
||||
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,93 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918):RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x7F 0x00082 // for C cut
|
||||
0x81 0x3F000 // for C cut
|
||||
0x83 0x00000
|
||||
0x1C 0x01C00 // RC cal for high power
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E42e
|
||||
0x53 0x00071
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8
|
||||
0x35 0x001e0 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01Ca8
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving(92EE)
|
||||
0x34 0xa093
|
||||
0x34 0x908f
|
||||
0x34 0x808c
|
||||
0x34 0x704d
|
||||
0x34 0x604a
|
||||
0x34 0x5047
|
||||
0x34 0x400a
|
||||
0x34 0x3007
|
||||
0x34 0x2004
|
||||
0x34 0x1001
|
||||
0x34 0x0000
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // Update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 // 0x54fb0 update by Gary 120921
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
0x00 0x10159 //standby mode
|
||||
//0x18 0x0f407 //LC calibration only @ path A
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 17 14 16
|
||||
CH02 17 14 16
|
||||
CH03 17 14 16
|
||||
CH04 17 14 16
|
||||
CH05 17 14 16
|
||||
CH06 17 14 16
|
||||
CH07 17 14 16
|
||||
CH08 17 14 16
|
||||
CH09 17 14 16
|
||||
CH10 17 14 16
|
||||
CH11 17 14 16
|
||||
CH12 NA 14 16
|
||||
CH13 NA 14 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 11 13
|
||||
CH02 13 11 13
|
||||
CH03 13 11 13
|
||||
CH04 13 11 13
|
||||
CH05 13 11 13
|
||||
CH06 13 11 13
|
||||
CH07 13 11 13
|
||||
CH08 13 11 13
|
||||
CH09 13 11 13
|
||||
CH10 13 11 13
|
||||
CH11 13 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 17 13 14
|
||||
CH04 17 13 14
|
||||
CH05 17 13 14
|
||||
CH06 17 13 14
|
||||
CH07 17 13 14
|
||||
CH08 17 13 14
|
||||
CH09 15 13 14
|
||||
CH10 15 13 14
|
||||
CH11 15 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 14 13 13
|
||||
CH10 14 13 13
|
||||
CH11 14 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 16 16 15
|
||||
CH07 16 16 15
|
||||
CH08 16 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 15 13 13
|
||||
CH07 15 13 13
|
||||
CH08 15 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 16 16
|
||||
CH02 15 16 16
|
||||
CH03 15 16 16
|
||||
CH04 15 16 16
|
||||
CH05 15 16 16
|
||||
CH06 15 16 16
|
||||
CH07 15 16 16
|
||||
CH08 15 16 16
|
||||
CH09 14 16 16
|
||||
CH10 14 16 16
|
||||
CH11 14 16 16
|
||||
CH12 NA 16 16
|
||||
CH13 NA 16 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 12 11 13
|
||||
CH02 12 11 13
|
||||
CH03 12 11 13
|
||||
CH04 12 11 13
|
||||
CH05 12 11 13
|
||||
CH06 12 11 13
|
||||
CH07 12 11 13
|
||||
CH08 12 11 13
|
||||
CH09 11 11 13
|
||||
CH10 11 11 13
|
||||
CH11 11 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 14 13 14
|
||||
CH04 14 13 14
|
||||
CH05 14 13 14
|
||||
CH06 14 13 14
|
||||
CH07 14 13 14
|
||||
CH08 14 13 14
|
||||
CH09 14 13 14
|
||||
CH10 14 13 14
|
||||
CH11 14 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 15 16 15
|
||||
CH07 15 16 15
|
||||
CH08 15 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,27 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8723B_MP_Parameter_v2_20130307
|
||||
//RTL8723BE_20130304
|
||||
//RTL8192EE_20130426_OnSite
|
||||
//=======================================================================================================================================//
|
||||
// [0][1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29] //
|
||||
//=======================================================================================================================================//
|
||||
[2G][A][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_P
|
||||
[2G][A][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_N
|
||||
[2G][B][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_P
|
||||
[2G][B][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_N
|
||||
[2G][A][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GA_P
|
||||
[2G][A][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GA_N
|
||||
[2G][B][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GB_P
|
||||
[2G][B][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GB_N
|
||||
[5G][A][+][ALL][0] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} //5GLA_P
|
||||
[5G][A][-][ALL][0] = {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLA_N
|
||||
[5G][B][+][ALL][0] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20} //5GLB_P
|
||||
[5G][B][-][ALL][0] = {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLB_N
|
||||
[5G][A][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GMA_P
|
||||
[5G][A][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16} //5GMA_N
|
||||
[5G][B][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20} //5GMB_P
|
||||
[5G][B][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GMB_N
|
||||
[5G][A][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHA_P
|
||||
[5G][A][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16} //5GHA_N
|
||||
[5G][B][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHB_P
|
||||
[5G][B][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GHB_N
|
||||
@ -0,0 +1,133 @@
|
||||
//rtl8192e version = 58
|
||||
0xc78 0xfb000001 // -110
|
||||
0xc78 0xfb010001
|
||||
0xc78 0xfb020001
|
||||
0xc78 0xfb030001
|
||||
0xc78 0xfb040001
|
||||
0xc78 0xfb050001 // -100
|
||||
0xc78 0xfa060001
|
||||
0xc78 0xf9070001
|
||||
0xc78 0xf8080001
|
||||
0xc78 0xf7090001
|
||||
0xc78 0xf60A0001 // -90
|
||||
0xc78 0xf50B0001
|
||||
0xc78 0xf40C0001
|
||||
0xc78 0xf30D0001
|
||||
0xc78 0xf20E0001
|
||||
0xc78 0xf10F0001 // -80
|
||||
0xc78 0xf0100001
|
||||
0xc78 0xef110001
|
||||
0xc78 0xee120001
|
||||
0xc78 0xed130001
|
||||
0xc78 0xec140001 // -70
|
||||
0xc78 0xeb150001
|
||||
0xc78 0xea160001
|
||||
0xc78 0xe9170001
|
||||
0xc78 0xe8180001
|
||||
0xc78 0xe7190001 // -60
|
||||
0xc78 0xe61A0001
|
||||
0xc78 0xe51B0001
|
||||
0xc78 0xe41C0001
|
||||
0xc78 0xe31D0001
|
||||
0xc78 0xe21E0001 // -50
|
||||
0xc78 0xe11F0001
|
||||
0xc78 0x8a200001
|
||||
0xc78 0x89210001
|
||||
0xc78 0x88220001
|
||||
0xc78 0x87230001 // -40
|
||||
0xc78 0x86240001
|
||||
0xc78 0x85250001
|
||||
0xc78 0x84260001
|
||||
0xc78 0x83270001
|
||||
0xc78 0x82280001 //-30
|
||||
0xc78 0x6a290001
|
||||
0xc78 0x692A0001
|
||||
0xc78 0x682B0001
|
||||
0xc78 0x672C0001
|
||||
0xc78 0x662D0001 // -20
|
||||
0xc78 0x652E0001
|
||||
0xc78 0x642F0001
|
||||
0xc78 0x63300001
|
||||
0xc78 0x62310001
|
||||
0xc78 0x61320001 // -10
|
||||
0xc78 0x60330001
|
||||
0xc78 0x47340001
|
||||
0xc78 0x46350001
|
||||
0xc78 0x45360001
|
||||
0xc78 0x44370001 // 0
|
||||
0xc78 0x43380001
|
||||
0xc78 0x42390001
|
||||
0xc78 0x413A0001
|
||||
0xc78 0x403B0001
|
||||
0xc78 0x403C0001 // 10
|
||||
0xc78 0x403D0001
|
||||
0xc78 0x403E0001
|
||||
0xc78 0x403F0001
|
||||
// AGC_TABLE 2 for CS
|
||||
0xc78 0xfe400001 //-110
|
||||
0xc78 0xfe410001
|
||||
0xc78 0xfe420001
|
||||
0xc78 0xfe430001
|
||||
0xc78 0xfe440001
|
||||
0xc78 0xfd450001 //-100
|
||||
0xc78 0xfc460001
|
||||
0xc78 0xfb470001
|
||||
0xc78 0xfa480001
|
||||
0xc78 0xf9490001
|
||||
0xc78 0xf84a0001 //-90
|
||||
0xc78 0xf74b0001
|
||||
0xc78 0xf64c0001
|
||||
0xc78 0xf54d0001
|
||||
0xc78 0xf44e0001
|
||||
0xc78 0xf34f0001//-80
|
||||
0xc78 0xf2500001
|
||||
0xc78 0xf1510001
|
||||
0xc78 0xf0520001
|
||||
0xc78 0xef530001
|
||||
0xc78 0xee540001 //-70
|
||||
0xc78 0xed550001
|
||||
0xc78 0xec560001
|
||||
0xc78 0xeb570001
|
||||
0xc78 0xea580001
|
||||
0xc78 0x09590001 //-60
|
||||
0xc78 0x085a0001
|
||||
0xc78 0x075b0001
|
||||
0xc78 0x065c0001
|
||||
0xc78 0x055d0001
|
||||
0xc78 0x045e0001 //-50
|
||||
0xc78 0x035f0001
|
||||
0xc78 0x29600001
|
||||
0xc78 0x28610001
|
||||
0xc78 0x27620001
|
||||
0xc78 0x26630001 //-40
|
||||
0xc78 0x25640001
|
||||
0xc78 0x24650001
|
||||
0xc78 0x23660001
|
||||
0xc78 0x68670001
|
||||
0xc78 0x67680001 //-30
|
||||
0xc78 0x66690001
|
||||
0xc78 0x656a0001
|
||||
0xc78 0x646b0001
|
||||
0xc78 0x636c0001
|
||||
0xc78 0x626d0001 //-20
|
||||
0xc78 0x496e0001
|
||||
0xc78 0x486f0001
|
||||
0xc78 0x47700001
|
||||
0xc78 0x46710001
|
||||
0xc78 0x45720001 //-10
|
||||
0xc78 0x44730001
|
||||
0xc78 0x43740001
|
||||
0xc78 0x42750001
|
||||
0xc78 0x41760001
|
||||
0xc78 0x40770001 //0
|
||||
0xc78 0x40780001
|
||||
0xc78 0x40790001
|
||||
0xc78 0x407a0001
|
||||
0xc78 0x407b0001
|
||||
0xc78 0x407c0001 //10
|
||||
0xc78 0x407d0001
|
||||
0xc78 0x407e0001
|
||||
0xc78 0x407f0001 //16
|
||||
0xc50 0x00040220
|
||||
0xc58 0x00000220
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,115 @@
|
||||
//rtl8192e version = 58
|
||||
//0x16 0x36 // SWR by Hillo
|
||||
//0x28 0x83
|
||||
//0x2C 0x96
|
||||
//0x2D 0x05
|
||||
//0x2E 0x82
|
||||
//0x2F 0xF0
|
||||
//0x64 0x00
|
||||
//0x65 0x01 // TRSWP=1 ANTSEL2=0 for WLAN
|
||||
//0x78 0x2A
|
||||
//0x79 0x00
|
||||
//0x7C 0xC3
|
||||
0x11 0xEB
|
||||
0x12 0x07
|
||||
0x14 0x75
|
||||
0x303 0xA7
|
||||
0x421 0x0F
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x00
|
||||
0x432 0x00
|
||||
0x433 0x01
|
||||
0x434 0x04
|
||||
0x435 0x05
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x07
|
||||
0x43f 0x08
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x10
|
||||
0x445 0x00
|
||||
0x446 0x00
|
||||
0x447 0x00
|
||||
0x448 0x00
|
||||
0x449 0xf0
|
||||
0x44a 0x0f
|
||||
0x44b 0x3e
|
||||
0x44c 0x10
|
||||
0x44d 0x00
|
||||
0x44e 0x00
|
||||
0x44f 0x00
|
||||
0x450 0x00
|
||||
0x451 0xf0
|
||||
0x452 0x0f
|
||||
0x453 0x00
|
||||
0x456 0x5e
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12
|
||||
0x541 0x64
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55c 0x50
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x2a
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x638 0x50
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40 //ACK timeout
|
||||
0x642 0x40 //EIFS
|
||||
0x643 0x00
|
||||
0x652 0x2B
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//rtl8192e version = 58
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390004
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390004
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x806c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d047c8 // A01[7] ant div disable
|
||||
0xa04 0x81ff800c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e30120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x12130000
|
||||
0xa24 0x060a0d10
|
||||
0xa28 0x00000103
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fff80
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x21807531
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x2112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013269 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x2d4000b5 // -3
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x2d4000b5 // -3
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000048
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,36 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8192E_MAC_PHY_Parameter_v024_MP_20130927
|
||||
#[v1][Exact]#
|
||||
#[2.4G][A]#
|
||||
[1Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[2Tx] 0xe08 0x0000ff00 0 0 16 0 // TXAGC codeword (H-byte->L-byte)={1M}
|
||||
[1Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[2Tx] 0x86c 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M}
|
||||
[1Tx] 0xe00 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0xe00 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0xe04 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0xe04 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0xe10 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0xe10 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0xe14 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe14 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0xe18 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0xe1C 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
#[2.4G][B]#
|
||||
[1Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[2Tx] 0x838 0xffffff00 16 16 16 0 // TXAGC codeword (H-byte->L-byte)={5.5M 2M 1M}
|
||||
[1Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[2Tx] 0x86C 0x000000ff 0 0 0 16 // TXAGC codeword (H-byte->L-byte)={11M}
|
||||
[1Tx] 0x830 0xffffffff 18 18 20 20 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[2Tx] 0x830 0xffffffff 17 17 18 18 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
|
||||
[1Tx] 0x834 0xffffffff 14 14 16 17 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[2Tx] 0x834 0xffffffff 14 14 15 16 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
|
||||
[1Tx] 0x83c 0xffffffff 19 19 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[2Tx] 0x83c 0xffffffff 17 18 19 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
|
||||
[1Tx] 0x848 0xffffffff 13 14 15 19 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x848 0xffffffff 13 14 15 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
|
||||
[2Tx] 0x84c 0xffffffff 18 19 20 20 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
|
||||
[2Tx] 0x868 0xffffffff 12 13 14 16 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
|
||||
#[END]#
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,127 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB_filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918): RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x83 0x00000
|
||||
0xB0 0xFF9F1
|
||||
0xB1 0x55418
|
||||
0xB2 0x8CC00 //VCO current
|
||||
0xB4 0x43083 //KVCO
|
||||
0xB5 0x08166 //5G LO buffier increase current
|
||||
0xB6 0x0803E // SDM neg edge
|
||||
0xB7 0x1C69f //LPF
|
||||
0xB8 0x0407F //LPF Defalt:080FF reduce R3 (121005) RDC Lily
|
||||
0xB9 0x90001 //Defalt:80001 CV curve offset +1 for 25C (121005) RDC Lily
|
||||
0xBA 0x40001 //0x40000 : SDM 3 change 2 order for in-band noise floor check 40M spur for CH7?
|
||||
0xBB 0x00400
|
||||
0xBC 0x00078
|
||||
0xBD 0xB3333
|
||||
0xBE 0x33340
|
||||
0xBF 0x00000
|
||||
0xC0 0x05999
|
||||
0xC1 0x09999
|
||||
0xC2 0x02400
|
||||
0xC3 0x00009
|
||||
0xC4 0x40C91
|
||||
0xC5 0x99999
|
||||
0xC6 0x000A3
|
||||
0xC7 0x88820
|
||||
0xC8 0x76C06
|
||||
0xC9 0x00000
|
||||
0xCA 0x80000
|
||||
0x1C 0x01C00 // RC cal for high power
|
||||
//0xB6 0x0803E
|
||||
//0xB2 0x8CC00 //VCO current
|
||||
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E45E
|
||||
0x53 0x00071 // [1:0] for Tx EVM shrink
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8 // a8=ba
|
||||
0x35 0x001e2 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01C24
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving (92EE)
|
||||
0x34 0xa093
|
||||
0x34 0x908f
|
||||
0x34 0x808c
|
||||
0x34 0x704d
|
||||
0x34 0x604a
|
||||
0x34 0x5047
|
||||
0x34 0x400a
|
||||
0x34 0x3007
|
||||
0x34 0x2004
|
||||
0x34 0x1001
|
||||
0x34 0x0000
|
||||
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 //54fb0
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
|
||||
0xffe
|
||||
//LC calibration start
|
||||
//0xb1 0x55400
|
||||
0x18 0x0fc07 //LC calibration
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
|
||||
//0xb1 0x55418
|
||||
//LC calibration end
|
||||
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,93 @@
|
||||
//rtl8192e version = 58
|
||||
0x7F 0x00082 // for C cut POW_SYN
|
||||
0x81 0x3FC00 // for C cut POW_BB filter
|
||||
0x00 0x30000
|
||||
0x08 0x08400 //DC leakage
|
||||
0x18 0x00407
|
||||
0x19 0x00012 //(120918):RC calibration : 1b[4] 1b[1]
|
||||
0x1B 0x0146c
|
||||
0x1E 0x80009
|
||||
0x1F 0x00880
|
||||
0x2F 0x1A060
|
||||
0x3F 0x00000
|
||||
0x42 0x060C0
|
||||
0x57 0xd0000 //for 80M OFDM(right) spur
|
||||
0x58 0xBE180
|
||||
0x67 0x01552
|
||||
0x7F 0x00082 // for C cut
|
||||
0x81 0x3F000 // for C cut
|
||||
0x83 0x00000
|
||||
0x1C 0x01C00 // RC cal for high power
|
||||
//phking
|
||||
0xDF 0x00180
|
||||
0xEF 0x001a0
|
||||
0x51 0x69545 //0x6b25d :spur
|
||||
0x52 0x7E42e
|
||||
0x53 0x00071
|
||||
0x56 0x51FF3
|
||||
0x35 0x000a8
|
||||
0x35 0x001e0 //CCK DY swing TX EVM
|
||||
0x35 0x002a8 //OFDM
|
||||
0x36 0x01Ca8
|
||||
0x36 0x09C24
|
||||
0x36 0x11C24
|
||||
0x36 0x19C24
|
||||
|
||||
0x18 0x00C07
|
||||
0X5A 0x48000 //TX IMR 4Be00 // 8bd00
|
||||
0X19 0x739d0
|
||||
|
||||
|
||||
//For MP Chip power saving(92EE)
|
||||
0x34 0xa093
|
||||
0x34 0x908f
|
||||
0x34 0x808c
|
||||
0x34 0x704d
|
||||
0x34 0x604a
|
||||
0x34 0x5047
|
||||
0x34 0x400a
|
||||
0x34 0x3007
|
||||
0x34 0x2004
|
||||
0x34 0x1001
|
||||
0x34 0x0000
|
||||
|
||||
|
||||
//phking
|
||||
0x00 0x30159 //RX mode
|
||||
// RX setting 20111118
|
||||
0x84 0x68180 // Update by Hillo for better IMR
|
||||
0x86 0x10e
|
||||
0x87 0xf5f80
|
||||
0x8e 0x65540
|
||||
0x8f 0x88000
|
||||
// RX gain table 20111118
|
||||
0xef 0x020A0 //Rx gaintable WE
|
||||
0x3b 0xF0730
|
||||
0x3b 0xE0730
|
||||
0x3b 0xD0020
|
||||
0x3b 0xC0020
|
||||
0x3b 0xB0760
|
||||
0x3b 0xA0010
|
||||
0x3b 0x90000
|
||||
0x3b 0x80000
|
||||
0x3b 0x787b0
|
||||
0x3b 0x60fb0 // CS gain table
|
||||
0x3b 0x5ffa0 // 0x54fb0 update by Gary 120921
|
||||
0x3b 0x40620 // update for CS 0x407a0 // CS gain table
|
||||
0x3b 0x37090 // C-cut
|
||||
0x3b 0x20080
|
||||
0x3b 0x1f060 // HG for CCK
|
||||
0x3b 0x0ffb0 // ULG for CCK
|
||||
0xef 0x000A0 //Rx gaintable WEb
|
||||
|
||||
0x00 0x10159 //standby mode
|
||||
//0x18 0x0f407 //LC calibration only @ path A
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0xffe
|
||||
0x1e 0x00001
|
||||
0x1f 0x80000
|
||||
0x00 0x33e70 //RX mode //pc_wang only
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 17 14 16
|
||||
CH02 17 14 16
|
||||
CH03 17 14 16
|
||||
CH04 17 14 16
|
||||
CH05 17 14 16
|
||||
CH06 17 14 16
|
||||
CH07 17 14 16
|
||||
CH08 17 14 16
|
||||
CH09 17 14 16
|
||||
CH10 17 14 16
|
||||
CH11 17 14 16
|
||||
CH12 NA 14 16
|
||||
CH13 NA 14 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 11 13
|
||||
CH02 13 11 13
|
||||
CH03 13 11 13
|
||||
CH04 13 11 13
|
||||
CH05 13 11 13
|
||||
CH06 13 11 13
|
||||
CH07 13 11 13
|
||||
CH08 13 11 13
|
||||
CH09 13 11 13
|
||||
CH10 13 11 13
|
||||
CH11 13 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 17 13 14
|
||||
CH04 17 13 14
|
||||
CH05 17 13 14
|
||||
CH06 17 13 14
|
||||
CH07 17 13 14
|
||||
CH08 17 13 14
|
||||
CH09 15 13 14
|
||||
CH10 15 13 14
|
||||
CH11 15 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 17 16 17
|
||||
CH04 17 16 17
|
||||
CH05 17 16 17
|
||||
CH06 17 16 17
|
||||
CH07 17 16 17
|
||||
CH08 17 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 17 13 15
|
||||
CH04 17 13 15
|
||||
CH05 17 13 15
|
||||
CH06 17 13 15
|
||||
CH07 17 13 15
|
||||
CH08 17 13 15
|
||||
CH09 14 13 13
|
||||
CH10 14 13 13
|
||||
CH11 14 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 16 16 15
|
||||
CH07 16 16 15
|
||||
CH08 16 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 15 13 13
|
||||
CH07 15 13 13
|
||||
CH08 15 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,229 @@
|
||||
//rtl8192e version = 58
|
||||
// Format:
|
||||
//
|
||||
// Note: The order of the tables MUST match the definition in WLAN driver.
|
||||
//
|
||||
// Power Limit Table Parameter Definition
|
||||
// Band: 2.4G/5G
|
||||
// Bandwidth: 20/40/80/160 MHZ
|
||||
// RF Path: 1/2/3/4 Transmit RF
|
||||
// Rate Section: CCK/OFDM/HT/VHT
|
||||
// Regulation: FCC/ETSI/MKK
|
||||
//
|
||||
// Description:
|
||||
// 1. IF in 1T test
|
||||
// 2. power is real dBm.
|
||||
// 3. // is for comment.
|
||||
//
|
||||
// NA is non-release channle.
|
||||
//
|
||||
//
|
||||
//Table 1: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 16 16
|
||||
CH02 15 16 16
|
||||
CH03 15 16 16
|
||||
CH04 15 16 16
|
||||
CH05 15 16 16
|
||||
CH06 15 16 16
|
||||
CH07 15 16 16
|
||||
CH08 15 16 16
|
||||
CH09 14 16 16
|
||||
CH10 14 16 16
|
||||
CH11 14 16 16
|
||||
CH12 NA 16 16
|
||||
CH13 NA 16 16
|
||||
CH14 NA NA 16
|
||||
## END
|
||||
//
|
||||
//Table 2: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, CCK, //(1M;2M;5.5M;11M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 12 11 13
|
||||
CH02 12 11 13
|
||||
CH03 12 11 13
|
||||
CH04 12 11 13
|
||||
CH05 12 11 13
|
||||
CH06 12 11 13
|
||||
CH07 12 11 13
|
||||
CH08 12 11 13
|
||||
CH09 11 11 13
|
||||
CH10 11 11 13
|
||||
CH11 11 11 13
|
||||
CH12 NA 11 13
|
||||
CH13 NA 11 13
|
||||
CH14 NA NA 13
|
||||
## END
|
||||
//
|
||||
//Table 3: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 4: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 13 13 14
|
||||
CH02 13 13 14
|
||||
CH03 14 13 14
|
||||
CH04 14 13 14
|
||||
CH05 14 13 14
|
||||
CH06 14 13 14
|
||||
CH07 14 13 14
|
||||
CH08 14 13 14
|
||||
CH09 14 13 14
|
||||
CH10 14 13 14
|
||||
CH11 14 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 5: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 15 14 14
|
||||
CH02 15 14 14
|
||||
CH03 15 16 17
|
||||
CH04 15 16 17
|
||||
CH05 15 16 17
|
||||
CH06 15 16 17
|
||||
CH07 15 16 17
|
||||
CH08 15 16 17
|
||||
CH09 15 14 14
|
||||
CH10 15 14 14
|
||||
CH11 15 14 14
|
||||
CH12 NA 14 14
|
||||
CH13 NA 14 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 6: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 14
|
||||
CH02 14 13 14
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 14
|
||||
CH10 13 13 14
|
||||
CH11 13 13 14
|
||||
CH12 NA 13 14
|
||||
CH13 NA 13 14
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 7: ===========================================
|
||||
//
|
||||
## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 14 13 13
|
||||
CH02 14 13 13
|
||||
CH03 14 13 15
|
||||
CH04 14 13 15
|
||||
CH05 14 13 15
|
||||
CH06 14 13 15
|
||||
CH07 14 13 15
|
||||
CH08 14 13 15
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA 13 13
|
||||
CH13 NA 13 13
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 8: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 14 14 14
|
||||
CH04 14 14 14
|
||||
CH05 14 14 14
|
||||
CH06 15 16 15
|
||||
CH07 15 16 15
|
||||
CH08 15 16 15
|
||||
CH09 14 14 14
|
||||
CH10 14 14 14
|
||||
CH11 14 14 14
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 9: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS0~MCS7)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 10 13 13
|
||||
CH04 10 13 13
|
||||
CH05 10 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 11 13 13
|
||||
CH10 11 13 13
|
||||
CH11 11 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
//
|
||||
//Table 10: ===========================================
|
||||
//
|
||||
## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
|
||||
## START
|
||||
## #3# FCC ETSI MKK
|
||||
CH01 NA NA NA
|
||||
CH02 NA NA NA
|
||||
CH03 13 13 13
|
||||
CH04 13 13 13
|
||||
CH05 13 13 13
|
||||
CH06 14 13 13
|
||||
CH07 14 13 13
|
||||
CH08 14 13 13
|
||||
CH09 13 13 13
|
||||
CH10 13 13 13
|
||||
CH11 13 13 13
|
||||
CH12 NA NA NA
|
||||
CH13 NA NA NA
|
||||
CH14 NA NA NA
|
||||
## END
|
||||
@ -0,0 +1,27 @@
|
||||
//rtl8192e version = 58
|
||||
//RTL8723B_MP_Parameter_v2_20130307
|
||||
//RTL8723BE_20130304
|
||||
//RTL8192EE_20130426_OnSite
|
||||
//=======================================================================================================================================//
|
||||
// [0][1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29] //
|
||||
//=======================================================================================================================================//
|
||||
[2G][A][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_P
|
||||
[2G][A][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKA_N
|
||||
[2G][B][+][CCK] = {0, 0, 0, 0, 1, 1, 1, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6, 7, 7, 7, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_P
|
||||
[2G][B][-][CCK] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GCCKB_N
|
||||
[2G][A][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GA_P
|
||||
[2G][A][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GA_N
|
||||
[2G][B][+][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15} //2GB_P
|
||||
[2G][B][-][ALL] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15} //2GB_N
|
||||
[5G][A][+][ALL][0] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} //5GLA_P
|
||||
[5G][A][-][ALL][0] = {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLA_N
|
||||
[5G][B][+][ALL][0] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20} //5GLB_P
|
||||
[5G][B][-][ALL][0] = {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GLB_N
|
||||
[5G][A][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GMA_P
|
||||
[5G][A][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16} //5GMA_N
|
||||
[5G][B][+][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20} //5GMB_P
|
||||
[5G][B][-][ALL][1] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GMB_N
|
||||
[5G][A][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHA_P
|
||||
[5G][A][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16} //5GHA_N
|
||||
[5G][B][+][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21} //5GHB_P
|
||||
[5G][B][-][ALL][2] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14} //5GHB_N
|
||||
@ -0,0 +1,4 @@
|
||||
////Release version: 8881A.0820.2013
|
||||
// Max line number: 30
|
||||
0x460 0x02
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,4 @@
|
||||
////Release version: 8881A.0820.2013
|
||||
// Max line number: 30
|
||||
0x460 0x0
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,4 @@
|
||||
////Release version: 8881A.0820.2013
|
||||
// Max line number: 30
|
||||
0x460 0x01
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,4 @@
|
||||
////Release version: 8881A.0820.2013
|
||||
// Max line number: 30
|
||||
0x460 0x05
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,4 @@
|
||||
////Release version: 8881A.0820.2013
|
||||
// Max line number: 30
|
||||
0x460 0x03
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,4 @@
|
||||
////Release version: 8881A.0820.2013
|
||||
// Max line number: 30
|
||||
0x460 0x04
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,35 @@
|
||||
////Release version: 8881A.0820.2013
|
||||
// State:
|
||||
// 1.) MACDM_TP_STATE_DEFAULT
|
||||
// 2.) MACDM_TP_STATE_GENERAL
|
||||
// 3.) MACDM_TP_STATE_TXOP
|
||||
// So, we need four criteria
|
||||
// 1.) MACDM_TP_THRS_DEF_TO_GEN
|
||||
// a.) RSSI low
|
||||
// b.) RSSI normal
|
||||
// c.) RSSI high
|
||||
// 2.) MACDM_TP_THRS_GEN_TO_DEF
|
||||
// a.) RSSI low
|
||||
// b.) RSSI normal
|
||||
// c.) RSSI high
|
||||
// 3.) MACDM_TP_THRS_GEN_TO_TXOP
|
||||
// a.) RSSI low
|
||||
// b.) RSSI normal
|
||||
// c.) RSSI high
|
||||
// 4.) MACDM_TP_THRS_TXOP_TO_GEN
|
||||
// a.) RSSI low
|
||||
// b.) RSSI normal
|
||||
// c.) RSSI high
|
||||
0x1a
|
||||
0x1b
|
||||
0x1c
|
||||
0x2a
|
||||
0x2b
|
||||
0x2c
|
||||
0x3a
|
||||
0x3b
|
||||
0x3c
|
||||
0x4a
|
||||
0x4b
|
||||
0x4c
|
||||
0xffff
|
||||
@ -0,0 +1,4 @@
|
||||
////Release version: 8881A.0820.2013
|
||||
// Max line number: 30
|
||||
0x460 0x08
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,4 @@
|
||||
////Release version: 8881A.0820.2013
|
||||
// Max line number: 30
|
||||
0x460 0x06
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,4 @@
|
||||
////Release version: 8881A.0820.2013
|
||||
// Max line number: 30
|
||||
0x460 0x07
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,103 @@
|
||||
////Release version: RL0560A.0921.2012
|
||||
0x2C 0x96
|
||||
0x2D 0x05
|
||||
0x2E 0x82
|
||||
0x2F 0xF0
|
||||
0x65 0x01 // TRSWP TRSWN
|
||||
0x78 0x2A
|
||||
0x79 0x00
|
||||
//0x7C 0xC3
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x01
|
||||
0x432 0x02
|
||||
0x433 0x04
|
||||
0x434 0x05
|
||||
0x435 0x06
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x438 0x00
|
||||
0x439 0x00
|
||||
0x43a 0x01
|
||||
0x43b 0x02
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x06
|
||||
0x43f 0x07
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x15
|
||||
0x445 0xf0
|
||||
0x446 0x0f
|
||||
0x447 0x00
|
||||
0x458 0x41
|
||||
0x459 0xa8
|
||||
0x45a 0x72
|
||||
0x45b 0xb9
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x480 0x08
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x4d3 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12 // add for Cisco1252 IOT
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x28
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x638 0x50 // EDCA clock
|
||||
0x652 0xc8 //enable NAV upper bound
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
|
||||
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,97 @@
|
||||
////Release version: RL0560A.0921.2012
|
||||
0x65 0x01 // TRSWP TRSWN
|
||||
0x78 0x2A
|
||||
0x79 0x00
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x01
|
||||
0x432 0x02
|
||||
0x433 0x04
|
||||
0x434 0x05
|
||||
0x435 0x06
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x438 0x00
|
||||
0x439 0x00
|
||||
0x43a 0x01
|
||||
0x43b 0x02
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x06
|
||||
0x43f 0x07
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x15
|
||||
0x445 0xf0
|
||||
0x446 0x0f
|
||||
0x447 0x00
|
||||
0x458 0x41
|
||||
0x459 0xa8
|
||||
0x45a 0x72
|
||||
0x45b 0xb9
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x480 0x08
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x4d3 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12 // add for Cisco1252 IOT
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x28
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x652 0x20
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
|
||||
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,111 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v016_MP_20130705
|
||||
//0x16 0x36 // SWR by Hillo
|
||||
//0x28 0x83
|
||||
//0x2C 0x96
|
||||
//0x2D 0x05
|
||||
//0x2E 0x82
|
||||
//0x2F 0xF0
|
||||
//0x64 0x00
|
||||
//0x65 0x01 // TRSWP=1 ANTSEL2=0 for WLAN
|
||||
//0x78 0x2A
|
||||
//0x79 0x00
|
||||
//0x7C 0xC3
|
||||
0x303 0xA7
|
||||
0x428 0x0a
|
||||
0x429 0x10
|
||||
0x430 0x00
|
||||
0x431 0x00
|
||||
0x432 0x00
|
||||
0x433 0x01
|
||||
0x434 0x04
|
||||
0x435 0x05
|
||||
0x436 0x07
|
||||
0x437 0x08
|
||||
0x43c 0x04
|
||||
0x43d 0x05
|
||||
0x43e 0x07
|
||||
0x43f 0x08
|
||||
0x440 0x5d
|
||||
0x441 0x01
|
||||
0x442 0x00
|
||||
0x444 0x10
|
||||
0x445 0x00
|
||||
0x446 0x00
|
||||
0x447 0x00
|
||||
0x448 0x00
|
||||
0x449 0xf0
|
||||
0x44a 0x0f
|
||||
0x44b 0x3e
|
||||
0x44c 0x10
|
||||
0x44d 0x00
|
||||
0x44e 0x00
|
||||
0x44f 0x00
|
||||
0x450 0x00
|
||||
0x451 0xf0
|
||||
0x452 0x0f
|
||||
0x453 0x00
|
||||
0x456 0x5e
|
||||
0x460 0x66
|
||||
0x461 0x66
|
||||
0x4c8 0xff
|
||||
0x4c9 0x08
|
||||
0x4cc 0xff
|
||||
0x4cd 0xff
|
||||
0x4ce 0x01
|
||||
0x500 0x26
|
||||
0x501 0xa2
|
||||
0x502 0x2f
|
||||
0x503 0x00
|
||||
0x504 0x28
|
||||
0x505 0xa3
|
||||
0x506 0x5e
|
||||
0x507 0x00
|
||||
0x508 0x2b
|
||||
0x509 0xa4
|
||||
0x50a 0x5e
|
||||
0x50b 0x00
|
||||
0x50c 0x4f
|
||||
0x50d 0xa4
|
||||
0x50e 0x00
|
||||
0x50f 0x00
|
||||
0x512 0x1c
|
||||
0x514 0x0a
|
||||
0x516 0x0a
|
||||
0x525 0x4f
|
||||
0x540 0x12
|
||||
0x541 0x64
|
||||
0x550 0x10
|
||||
0x551 0x10
|
||||
0x559 0x02
|
||||
0x55c 0x50
|
||||
0x55d 0xff
|
||||
0x605 0x30
|
||||
0x608 0x0e
|
||||
0x609 0x28
|
||||
0x620 0xff
|
||||
0x621 0xff
|
||||
0x622 0xff
|
||||
0x623 0xff
|
||||
0x624 0xff
|
||||
0x625 0xff
|
||||
0x626 0xff
|
||||
0x627 0xff
|
||||
0x638 0x50
|
||||
0x63c 0x0a
|
||||
0x63d 0x0a
|
||||
0x63e 0x0e
|
||||
0x63f 0x0e
|
||||
0x640 0x40 //ACK timeout
|
||||
0x642 0x40 //EIFS
|
||||
0x643 0x00
|
||||
0x652 0xC8
|
||||
0x66e 0x05
|
||||
0x700 0x21
|
||||
0x701 0x43
|
||||
0x702 0x65
|
||||
0x703 0x87
|
||||
0x708 0x21
|
||||
0x709 0x43
|
||||
0x70a 0x65
|
||||
0x70b 0x87
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,235 @@
|
||||
////Release version: RTL8192E.001.0921.2012
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390204 // 92E testchip 0x824[22:20]=3h6 for RF path-A mode table setting C-cut back to 3
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390204 // 92E testchip 0x82c[22:20]=3h6 for RF path-B mode table setting C-cut back to 3
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004000 // path B 1R RSSI off issue
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x826c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d047c8
|
||||
0xa04 0x80ff000c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e68120f
|
||||
0xa10 0x9500bb78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x1a1b0000
|
||||
0xa24 0x090e1317
|
||||
0xa28 0x00000204
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fbf00
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x218075b1
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00040020 //
|
||||
0xc54 0x0400101f // Antenna weighting TH
|
||||
0xc58 0x00000020 //
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x7112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000000 // gain_var & table sel
|
||||
0xc74 0x02013169 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x40000100
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x40000100
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030
|
||||
0xe10 0x30303030
|
||||
0xe14 0x30303030
|
||||
0xe18 0x30303030
|
||||
0xe1c 0x30303030
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05
|
||||
0xe60 0x00000008
|
||||
0xe68 0x0fc01616
|
||||
0xe6c 0x0fc01616
|
||||
0xe70 0x0fc01616
|
||||
0xe74 0x0fc01616
|
||||
0xe78 0x0fc01616
|
||||
0xe7c 0x0fc01616
|
||||
0xe80 0x0fc01616
|
||||
0xe84 0x0fc01616
|
||||
0xe88 0x0fc01616
|
||||
0xe8c 0x0fc01616
|
||||
0xed0 0x0fc01616
|
||||
0xed4 0x0fc01616
|
||||
0xed8 0x0fc01616
|
||||
0xedc 0x0fc01616
|
||||
0xee0 0x0fc01616
|
||||
0xeec 0x0fc01616
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v036_MP_20140812
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390004 // 92E testchip 0x824[22:20]=3h6 for RF path-A mode table setting C-cut back to 3
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390004 // 92E testchip 0x82c[22:20]=3h6 for RF path-B mode table setting C-cut back to 3
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x806c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00005000
|
||||
0x934 0x00004000
|
||||
0x938 0x00000540
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000015
|
||||
0x944 0x0000083F
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d0c7c8 // bit7 ant div enable
|
||||
0xa04 0x81ff800c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e2e120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x1a1b0000
|
||||
0xa24 0x090e1317
|
||||
0xa28 0x00000204
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fff00
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x21807531
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x7112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013163 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x40000100
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x40000100
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000008
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v023_MP_20130910
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390004 // 92E testchip 0x824[22:20]=3h6 for RF path-A mode table setting C-cut back to 3
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390004 // 92E testchip 0x82c[22:20]=3h6 for RF path-B mode table setting C-cut back to 3
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x826c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d0c7c8 // bit7 ant div enable
|
||||
0xa04 0x81ff000c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e2e120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x1a1b0000
|
||||
0xa24 0x090e1317
|
||||
0xa28 0x00000204
|
||||
0xa2c 0x10d30000
|
||||
0xa70 0x101fbf00
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x218075b1
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x7112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013169 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x2d4000b5 // -3
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x2d4000b5 // -3
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000008
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v023_MP_20130910
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390204 // 92E testchip 0x824[22:20]=3h6 for RF path-A mode table setting C-cut back to 3
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390204 // 92E testchip 0x82c[22:20]=3h6 for RF path-B mode table setting C-cut back to 3
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x826c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d0c7c8 // bit7 ant div enable
|
||||
0xa04 0x81ff000c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e68120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x1a1b0000
|
||||
0xa24 0x090e1317
|
||||
0xa28 0x00000204
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fbf00
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x218075b1
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x7112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013169 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x40000100
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x40000100
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000008
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
@ -0,0 +1,239 @@
|
||||
//RTL8192E_MAC_PHY_Parameter_v023_MP_20130910
|
||||
//=======================
|
||||
// PAGE_8 ( FPGA_PHY0 )
|
||||
//=======================
|
||||
0x800 0x80040000 // turn off RF when 1R CCA
|
||||
0x804 0x00000003
|
||||
0x808 0x0000fc00
|
||||
0x80c 0x0000000A
|
||||
0x810 0x10001331
|
||||
0x814 0x020c3d10
|
||||
0x818 0x02220385 // 92E testchip 0x818[17]=1b1 for IQ inverse
|
||||
0x81c 0x00000000
|
||||
0x820 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x824 0x00390204 // 92E testchip 0x824[22:20]=3h6 for RF path-A mode table setting C-cut back to 3
|
||||
0x828 0x01000100 // 0x01000000 (SI) 0x01000100 (PI)
|
||||
0x82c 0x00390204 // 92E testchip 0x82c[22:20]=3h6 for RF path-B mode table setting C-cut back to 3
|
||||
0x830 0x32323232 // Path-B TX AGC codewod 6M 9M 12M 18M
|
||||
0x834 0x30303030 // Path-B TX AGC codewod 24M 36M 48M 54M
|
||||
0x838 0x30303030 // Path-B TX AGC codewod MCS32 1M 2M 5.5M
|
||||
0x83c 0x30303030 // Path-B TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0x840 0x00010000 // RF to standby mode
|
||||
0x844 0x00010000 // RF to standby mode
|
||||
0x848 0x28282828 // Path-B TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0x84c 0x28282828 // Path-B TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0x850 0x00000000 // RF wakeup TBD
|
||||
0x854 0x00000000 // RF sleep TBD
|
||||
0x858 0x009a009a
|
||||
0x85c 0x01000014 // AFE ctrl reg (ASIC) RX AD3 CCA mode
|
||||
0x860 0x66f60000 // 88CE default left anatenna
|
||||
0x864 0x061f0000
|
||||
0x868 0x30303030 // Path-B TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0x86c 0x30303030 // Path-A 11M/5.5M/2M TX AGC codeword Path-B 11M TX AGC codeword
|
||||
0x870 0x00000000 // z2: 0x03000300 92C RF: 0x07000700 (2 internal PA) 92S RF: 0x03000700 (one internal PA)
|
||||
0x874 0x55004200 // path B 1R RSSI off issue 92E MP: BIT[9:8] for IQ flag setting 1:refer to path-B 0: refer to path-A
|
||||
0x878 0x08080808 // 92E TestChip 1SS Path-B Tx and Path-A enter RX mode 6 C-cut back to default
|
||||
0x87c 0x00000000 // TST mode
|
||||
0x880 0xb0000c1c // Port 0 AFE ctrl reg (ASIC)
|
||||
0x884 0x00000001 // Port 0 AFE ctrl reg (ASIC)
|
||||
0x888 0x00000000 // AFE ctrl reg (ASIC)
|
||||
0x88c 0xcc0000c0 // [10:1] is r_rdy_cnt for sleep/standby mode [27] [31] are MCS_IND
|
||||
0x890 0x00000800
|
||||
0x894 0xfffffffe
|
||||
0x898 0x40302010
|
||||
|
||||
|
||||
//=======================
|
||||
// PAGE_9 ( FPGA_PHY1 )
|
||||
//=======================
|
||||
0x900 0x00000000
|
||||
0x904 0x00000023
|
||||
0x908 0x00000000
|
||||
0x90c 0x81121313 // tx antenna by contorl register
|
||||
0x910 0x826c0001 // LDPC setting 910[5:0]=1 for AMPDU PHY status parsing
|
||||
0x914 0x00000001
|
||||
0x918 0x00000000
|
||||
0x91c 0x00010000 // LDPC setting
|
||||
0x924 0x00000001
|
||||
0x928 0x00000000
|
||||
0x92c 0x00000000
|
||||
0x930 0x00000000
|
||||
0x934 0x00000000
|
||||
0x938 0x00000000
|
||||
0x93c 0x00000000
|
||||
0x940 0x00000000
|
||||
0x944 0x00000000
|
||||
0x94c 0x00000008
|
||||
//=======================
|
||||
// PAGE_A ( CCK_PHY0 )
|
||||
//=======================
|
||||
0xa00 0x00d0c7c8 // bit7 ant div enable
|
||||
0xa04 0x81ff000c
|
||||
0xa08 0x8c838300 // MP: 0x88838300 driver: 0x8ccd8300
|
||||
0xa0c 0x2e68120f
|
||||
0xa10 0x95009b78 //
|
||||
0xa14 0x1114D028
|
||||
0xa18 0x00881117
|
||||
0xa1c 0x89140f00
|
||||
0xa20 0x1a1b0000
|
||||
0xa24 0x090e1317
|
||||
0xa28 0x00000204
|
||||
0xa2c 0x00d30000
|
||||
0xa70 0x101fbf00
|
||||
0xa74 0x00000007
|
||||
0xa78 0x00000900
|
||||
0xa7c 0x225b0606
|
||||
0xa80 0x218075b1
|
||||
|
||||
//=======================
|
||||
// PAGE_B
|
||||
//=======================
|
||||
0xb38 0x00000000
|
||||
|
||||
//=======================
|
||||
// PAGE_C ( OFDM_PHY0 )
|
||||
//=======================
|
||||
0xc00 0x48071d40
|
||||
0xc04 0x03a05633
|
||||
0xc08 0x000000e4 // [8:4] is about DBG_GPIO selection
|
||||
0xc0c 0x6c6c6c6c
|
||||
0xc10 0x08800000
|
||||
0xc14 0x40000100
|
||||
0xc18 0x08800000
|
||||
0xc1c 0x40000100
|
||||
0xc20 0x00000000 // DTR TH
|
||||
0xc24 0x00000000 // DTR TH
|
||||
0xc28 0x00000000 // DTR TH
|
||||
0xc2c 0x00000000 // DTR TH
|
||||
0xc30 0x69e9ac47 // PWED_TH option2=0x69e9bb44 0x69e9ab44 0x69e9ac44
|
||||
0xc34 0x469652af // FS option = L1 MF only
|
||||
0xc38 0x49795994
|
||||
0xc3c 0x0a97971c
|
||||
0xc40 0x1f7c403f
|
||||
0xc44 0x000100b7
|
||||
0xc48 0xec020107 //[1]=1:enable L1_SBD
|
||||
0xc4c 0x007f037f // turn off edcca
|
||||
0xc50 0x00340220
|
||||
0xc54 0x0080801f // Antenna weighting TH
|
||||
0xc58 0x00000220
|
||||
0xc5c 0x00248492 // AGC RXHP corner
|
||||
0xc60 0x00000000 // DTR TH
|
||||
0xc64 0x7112848b // Lower L1 MF TH for FS
|
||||
0xc68 0x47c00bff // L1-SBD
|
||||
0xc6c 0x00000036 // L1-SBD
|
||||
0xc70 0x00000600 // gain_var & table sel
|
||||
0xc74 0x02013169 // simple agc settling time
|
||||
0xc78 0x0000001f
|
||||
0xc7c 0x00b91612 // HT-AGC setting
|
||||
0xc80 0x40000100
|
||||
0xc84 0x21f60000 // New TX-DFIR enable c84[24]=1
|
||||
0xc88 0x40000100
|
||||
0xc8c 0xa0e40000 // for MRC weighting function
|
||||
0xc90 0x00121820 // TX Power Training for path-A
|
||||
0xc94 0x00000000
|
||||
0xc98 0x00121820 // TX Power Training for path-B
|
||||
0xc9c 0x00007f7f // turn off pre-cca
|
||||
0xca0 0x00000000
|
||||
0xca4 0x000300A0 // ANTsw TH
|
||||
0xca8 0x00000000 // reserved
|
||||
0xcac 0x00000000 // reserved
|
||||
0xcb0 0x00000000 // reserved
|
||||
0xcb4 0x00000000 // reserved
|
||||
0xcb8 0x00000000 // reserved
|
||||
0xcbc 0x28000000
|
||||
0xcc0 0x00000000 // reserved
|
||||
0xcc4 0x00000000 // reserved
|
||||
0xcc8 0x00000000 // reserved
|
||||
0xccc 0x00000000 // reserved
|
||||
0xcd0 0x00000000 // reserved
|
||||
0xcd4 0x00000000 // reserved
|
||||
0xcd8 0x64b22427 // reserved
|
||||
0xcdc 0x00766932 // reserved
|
||||
0xce0 0x00222222
|
||||
0xce4 0x00040000 // LNAsw gain jump enable
|
||||
0xce8 0x77644302 // c8c[30]=1b1
|
||||
0xcec 0x2f97d40c
|
||||
|
||||
//=======================
|
||||
// PAGE_D ( OFDM_PHY1 )
|
||||
//=======================
|
||||
0xd00 0x00080740
|
||||
0xd04 0x00020403
|
||||
0xd08 0x0000907f
|
||||
0xd0c 0x20010201
|
||||
0xd10 0xa0633333
|
||||
0xd14 0x3333bc43
|
||||
0xd18 0x7a8f5b6b
|
||||
0xd1c 0x0000007f
|
||||
0xd2c 0xcc979975
|
||||
0xd30 0x00000000
|
||||
0xd34 0x80608000
|
||||
0xd38 0x00000000
|
||||
0xd3c 0x00127353 //0x00027293
|
||||
0xd40 0x00000000
|
||||
0xd44 0x00000000
|
||||
0xd48 0x00000000
|
||||
0xd4c 0x00000000
|
||||
0xd50 0x6437140a
|
||||
0xd54 0x00000000
|
||||
0xd58 0x00000282 // NBI CSI weighted
|
||||
0xd5c 0x30032064
|
||||
0xd60 0x4653de68
|
||||
0xd64 0x04518a3c //[26]=1:enable L1-SBD//
|
||||
0xd68 0x00002101
|
||||
0xd6c 0x2a201c16 // DTR
|
||||
0xd70 0x1812362e // DTR
|
||||
0xd74 0x322c2220 // DTR
|
||||
0xd78 0x000e3c24 // DTR
|
||||
0xd80 0x01081008 // CSI default value
|
||||
0xd84 0x00000800 // csi_feedback_en
|
||||
0xd88 0xf0b50000 // scaling
|
||||
|
||||
//=======================
|
||||
// PAGE_E
|
||||
//=======================
|
||||
0xe00 0x30303030 // Path-A TX AGC codewod 6M 9M 12M 18M
|
||||
0xe04 0x30303030 // Path-A TX AGC codewod 24M 36M 48M 54M
|
||||
0xe08 0x03903030 // Path-A TX AGC codewod MCS32 1M
|
||||
0xe10 0x30303030 // Path-A TX AGC codewod MCS0 MCS1 MCS2 MCS3
|
||||
0xe14 0x30303030 // Path-A TX AGC codewod MCS4 MCS5 MCS6 MCS7
|
||||
0xe18 0x30303030 // Path-A TX AGC codewod MCS8 MCS9 MCS10 MCS11
|
||||
0xe1c 0x30303030 // Path-A TX AGC codewod MCS12 MCS13 MCS14 MCS15
|
||||
0xe28 0x00000000
|
||||
0xe30 0x1000dc1f // 0xe30~0xe60: IQK
|
||||
0xe34 0x10008c1f
|
||||
0xe38 0x02140102
|
||||
0xe3C 0x681604c2 //default :0x681604c2 change RXIQK to mode 3 C-cut back to default
|
||||
0xe40 0x01007c00
|
||||
0xe44 0x01004800
|
||||
0xe48 0xfb000000
|
||||
0xe4c 0x000028d1
|
||||
0xe50 0x1000dc1f
|
||||
0xe54 0x10008c1f
|
||||
0xe58 0x02140102
|
||||
0xe5C 0x28160d05 //default C-cut: 0x28160d05 change RXIQK to mode 3
|
||||
0xe60 0x00000008
|
||||
0xe68 0x0fc05656
|
||||
0xe6c 0x03c09696 // AFE ctrl reg (ASIC) Blue-Tooth
|
||||
0xe70 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_CCA
|
||||
0xe74 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_RFON
|
||||
0xe78 0x0c005656 // AFE ctrl reg (ASIC) TX_CCK_BBON
|
||||
0xe7c 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_RFON
|
||||
0xe80 0x0c005656 // AFE ctrl reg (ASIC) TX_OFDM_BBON
|
||||
0xe84 0x03c09696 // AFE ctrl reg (ASIC) TX_TO_RX
|
||||
0xe88 0x0c005656 // AFE ctrl reg (ASIC) TX_TO_TX
|
||||
0xe8c 0x03c09696 // AFE ctrl reg (ASIC) RX_CCK
|
||||
0xed0 0x03c09696 // AFE ctrl reg (ASIC) RX_OFDM
|
||||
0xed4 0x03c09696 // AFE ctrl reg (ASIC) RX_WAIT_RIFS
|
||||
0xed8 0x03c09696 // AFE ctrl reg (ASIC) RX_TO_RX
|
||||
0xedc 0x0000d6d6 // AFE ctrl reg (ASIC) Standby
|
||||
0xee0 0x0000d6d6 // AFE ctrl reg (ASIC) Sleep
|
||||
0xeec 0x0fc01616 // AFE ctrl reg (ASIC) PMPD_ANAEN
|
||||
0xee4 0xb0000c1c // Port 1
|
||||
0xee8 0x00000001 // Port 1
|
||||
|
||||
0xf14 0x00000003 // debug port selection. 0x0~0x3: PHY DBG 0x4~0x5: MAC DBG
|
||||
0xf4c 0x00000000 // Only for FPGA PMAC
|
||||
0xf00 0x00000300 // enable BBRSTB bcz HSSI use clk_bb
|
||||
|
||||
0xffff 0xffff
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user