110 lines
4.2 KiB
C
110 lines
4.2 KiB
C
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/*
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* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
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* reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the NetLogic
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* license below:
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ASM_NLM_IOMAP_H
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#define _ASM_NLM_IOMAP_H
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#define DEFAULT_NETLOGIC_IO_BASE CKSEG1ADDR(0x1ef00000)
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#define NETLOGIC_IO_DDR2_CHN0_OFFSET 0x01000
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#define NETLOGIC_IO_DDR2_CHN1_OFFSET 0x02000
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#define NETLOGIC_IO_DDR2_CHN2_OFFSET 0x03000
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#define NETLOGIC_IO_DDR2_CHN3_OFFSET 0x04000
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#define NETLOGIC_IO_PIC_OFFSET 0x08000
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#define NETLOGIC_IO_UART_0_OFFSET 0x14000
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#define NETLOGIC_IO_UART_1_OFFSET 0x15100
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#define NETLOGIC_IO_SIZE 0x1000
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#define NETLOGIC_IO_BRIDGE_OFFSET 0x00000
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#define NETLOGIC_IO_RLD2_CHN0_OFFSET 0x05000
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#define NETLOGIC_IO_RLD2_CHN1_OFFSET 0x06000
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#define NETLOGIC_IO_SRAM_OFFSET 0x07000
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#define NETLOGIC_IO_PCIX_OFFSET 0x09000
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#define NETLOGIC_IO_HT_OFFSET 0x0A000
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#define NETLOGIC_IO_SECURITY_OFFSET 0x0B000
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#define NETLOGIC_IO_GMAC_0_OFFSET 0x0C000
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#define NETLOGIC_IO_GMAC_1_OFFSET 0x0D000
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#define NETLOGIC_IO_GMAC_2_OFFSET 0x0E000
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#define NETLOGIC_IO_GMAC_3_OFFSET 0x0F000
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/* XLS devices */
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#define NETLOGIC_IO_GMAC_4_OFFSET 0x20000
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#define NETLOGIC_IO_GMAC_5_OFFSET 0x21000
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#define NETLOGIC_IO_GMAC_6_OFFSET 0x22000
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#define NETLOGIC_IO_GMAC_7_OFFSET 0x23000
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#define NETLOGIC_IO_PCIE_0_OFFSET 0x1E000
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#define NETLOGIC_IO_PCIE_1_OFFSET 0x1F000
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#define NETLOGIC_IO_SRIO_0_OFFSET 0x1E000
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#define NETLOGIC_IO_SRIO_1_OFFSET 0x1F000
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#define NETLOGIC_IO_USB_0_OFFSET 0x24000
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#define NETLOGIC_IO_USB_1_OFFSET 0x25000
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#define NETLOGIC_IO_COMP_OFFSET 0x1D000
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/* end XLS devices */
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/* XLR devices */
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#define NETLOGIC_IO_SPI4_0_OFFSET 0x10000
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#define NETLOGIC_IO_XGMAC_0_OFFSET 0x11000
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#define NETLOGIC_IO_SPI4_1_OFFSET 0x12000
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#define NETLOGIC_IO_XGMAC_1_OFFSET 0x13000
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/* end XLR devices */
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#define NETLOGIC_IO_I2C_0_OFFSET 0x16000
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#define NETLOGIC_IO_I2C_1_OFFSET 0x17000
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#define NETLOGIC_IO_GPIO_OFFSET 0x18000
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#define NETLOGIC_IO_FLASH_OFFSET 0x19000
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#define NETLOGIC_IO_TB_OFFSET 0x1C000
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#define NETLOGIC_CPLD_OFFSET KSEG1ADDR(0x1d840000)
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/*
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* Base Address (Virtual) of the PCI Config address space
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* For now, choose 256M phys in kseg1 = 0xA0000000 + (1<<28)
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* Config space spans 256 (num of buses) * 256 (num functions) * 256 bytes
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* ie 1<<24 = 16M
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*/
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#define DEFAULT_PCI_CONFIG_BASE 0x18000000
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#define DEFAULT_HT_TYPE0_CFG_BASE 0x16000000
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#define DEFAULT_HT_TYPE1_CFG_BASE 0x17000000
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#endif
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