140 lines
4.7 KiB
C
140 lines
4.7 KiB
C
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/*
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* Copyright (c) 2011, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ARCH_ARM_MACH_MSM_INCLUDE_MACH_RPM_REGULATOR_9615_H
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#define __ARCH_ARM_MACH_MSM_INCLUDE_MACH_RPM_REGULATOR_9615_H
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/* Pin control input signals. */
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#define RPM_VREG_PIN_CTRL_PM8018_D1 0x01
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#define RPM_VREG_PIN_CTRL_PM8018_A0 0x02
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#define RPM_VREG_PIN_CTRL_PM8018_A1 0x04
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#define RPM_VREG_PIN_CTRL_PM8018_A2 0x08
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/**
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* enum rpm_vreg_pin_fn_9615 - RPM regulator pin function choices
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* %RPM_VREG_PIN_FN_9615_DONT_CARE: do not care about pin control state of
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* the regulator; allow another master
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* processor to specify pin control
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* %RPM_VREG_PIN_FN_9615_ENABLE: pin control switches between disable and
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* enable
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* %RPM_VREG_PIN_FN_9615_MODE: pin control switches between LPM and HPM
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* %RPM_VREG_PIN_FN_9615_SLEEP_B: regulator is forced into LPM when
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* sleep_b signal is asserted
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* %RPM_VREG_PIN_FN_9615_NONE: do not use pin control for the regulator
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* and do not allow another master to
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* request pin control
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*
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* The pin function specified in platform data corresponds to the active state
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* pin function value. Pin function will be NONE until a consumer requests
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* pin control to be enabled.
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*/
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enum rpm_vreg_pin_fn_9615 {
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RPM_VREG_PIN_FN_9615_DONT_CARE,
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RPM_VREG_PIN_FN_9615_ENABLE,
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RPM_VREG_PIN_FN_9615_MODE,
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RPM_VREG_PIN_FN_9615_SLEEP_B,
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RPM_VREG_PIN_FN_9615_NONE,
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};
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/**
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* enum rpm_vreg_force_mode_9615 - RPM regulator force mode choices
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* %RPM_VREG_FORCE_MODE_9615_PIN_CTRL: allow pin control usage
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* %RPM_VREG_FORCE_MODE_9615_NONE: do not force any mode
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* %RPM_VREG_FORCE_MODE_9615_LPM: force into low power mode
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* %RPM_VREG_FORCE_MODE_9615_AUTO: allow regulator to automatically select
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* its own mode based on realtime current
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* draw (only available for SMPS
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* regulators)
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* %RPM_VREG_FORCE_MODE_9615_HPM: force into high power mode
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* %RPM_VREG_FORCE_MODE_9615_BYPASS: set regulator to use bypass mode, i.e.
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* to act as a switch and not regulate
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* (only available for LDO regulators)
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*
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* Force mode is used to override aggregation with other masters and to set
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* special operating modes.
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*/
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enum rpm_vreg_force_mode_9615 {
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RPM_VREG_FORCE_MODE_9615_PIN_CTRL = 0,
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RPM_VREG_FORCE_MODE_9615_NONE = 0,
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RPM_VREG_FORCE_MODE_9615_LPM,
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RPM_VREG_FORCE_MODE_9615_AUTO, /* SMPS only */
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RPM_VREG_FORCE_MODE_9615_HPM,
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RPM_VREG_FORCE_MODE_9615_BYPASS, /* LDO only */
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};
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/**
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* enum rpm_vreg_power_mode_9615 - power mode for SMPS regulators
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* %RPM_VREG_POWER_MODE_9615_HYSTERETIC: Use hysteretic mode for HPM and when
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* usage goes high in AUTO
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* %RPM_VREG_POWER_MODE_9615_PWM: Use PWM mode for HPM and when usage
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* goes high in AUTO
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*/
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enum rpm_vreg_power_mode_9615 {
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RPM_VREG_POWER_MODE_9615_HYSTERETIC,
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RPM_VREG_POWER_MODE_9615_PWM,
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};
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/**
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* enum rpm_vreg_id - RPM regulator ID numbers (both real and pin control)
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*/
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enum rpm_vreg_id_9615 {
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RPM_VREG_ID_PM8018_L2,
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RPM_VREG_ID_PM8018_L3,
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RPM_VREG_ID_PM8018_L4,
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RPM_VREG_ID_PM8018_L5,
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RPM_VREG_ID_PM8018_L6,
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RPM_VREG_ID_PM8018_L7,
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RPM_VREG_ID_PM8018_L8,
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RPM_VREG_ID_PM8018_L9,
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RPM_VREG_ID_PM8018_L10,
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RPM_VREG_ID_PM8018_L11,
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RPM_VREG_ID_PM8018_L12,
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RPM_VREG_ID_PM8018_L13,
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RPM_VREG_ID_PM8018_L14,
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RPM_VREG_ID_PM8018_S1,
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RPM_VREG_ID_PM8018_S2,
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RPM_VREG_ID_PM8018_S3,
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RPM_VREG_ID_PM8018_S4,
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RPM_VREG_ID_PM8018_S5,
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RPM_VREG_ID_PM8018_LVS1,
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RPM_VREG_ID_PM8018_VDD_DIG_CORNER,
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RPM_VREG_ID_PM8018_MAX_REAL = RPM_VREG_ID_PM8018_VDD_DIG_CORNER,
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/* The following are IDs for regulator devices to enable pin control. */
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RPM_VREG_ID_PM8018_L2_PC,
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RPM_VREG_ID_PM8018_L3_PC,
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RPM_VREG_ID_PM8018_L4_PC,
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RPM_VREG_ID_PM8018_L5_PC,
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RPM_VREG_ID_PM8018_L6_PC,
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RPM_VREG_ID_PM8018_L7_PC,
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RPM_VREG_ID_PM8018_L8_PC,
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RPM_VREG_ID_PM8018_L13_PC,
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RPM_VREG_ID_PM8018_L14_PC,
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RPM_VREG_ID_PM8018_S1_PC,
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RPM_VREG_ID_PM8018_S2_PC,
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RPM_VREG_ID_PM8018_S3_PC,
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RPM_VREG_ID_PM8018_S4_PC,
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RPM_VREG_ID_PM8018_S5_PC,
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RPM_VREG_ID_PM8018_LVS1_PC,
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RPM_VREG_ID_PM8018_MAX = RPM_VREG_ID_PM8018_LVS1_PC,
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};
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/* Minimum high power mode loads in uA. */
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#define RPM_VREG_9615_LDO_50_HPM_MIN_LOAD 5000
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#define RPM_VREG_9615_LDO_150_HPM_MIN_LOAD 10000
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#define RPM_VREG_9615_LDO_300_HPM_MIN_LOAD 10000
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#define RPM_VREG_9615_LDO_1200_HPM_MIN_LOAD 10000
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#define RPM_VREG_9615_SMPS_1500_HPM_MIN_LOAD 100000
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#endif
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