97 lines
2.3 KiB
C
97 lines
2.3 KiB
C
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/*
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* arch/arm/mach-dove/include/mach/irqs.h
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*
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* IRQ definitions for Marvell Dove 88AP510 SoC
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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/*
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* Dove Low Interrupt Controller
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*/
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#define IRQ_DOVE_BRIDGE 0
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#define IRQ_DOVE_H2C 1
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#define IRQ_DOVE_C2H 2
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#define IRQ_DOVE_NAND 3
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#define IRQ_DOVE_PDMA 4
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#define IRQ_DOVE_SPI1 5
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#define IRQ_DOVE_SPI0 6
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#define IRQ_DOVE_UART_0 7
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#define IRQ_DOVE_UART_1 8
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#define IRQ_DOVE_UART_2 9
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#define IRQ_DOVE_UART_3 10
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#define IRQ_DOVE_I2C 11
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#define IRQ_DOVE_GPIO_0_7 12
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#define IRQ_DOVE_GPIO_8_15 13
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#define IRQ_DOVE_GPIO_16_23 14
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#define IRQ_DOVE_PCIE0_ERR 15
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#define IRQ_DOVE_PCIE0 16
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#define IRQ_DOVE_PCIE1_ERR 17
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#define IRQ_DOVE_PCIE1 18
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#define IRQ_DOVE_I2S0 19
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#define IRQ_DOVE_I2S0_ERR 20
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#define IRQ_DOVE_I2S1 21
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#define IRQ_DOVE_I2S1_ERR 22
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#define IRQ_DOVE_USB_ERR 23
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#define IRQ_DOVE_USB0 24
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#define IRQ_DOVE_USB1 25
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#define IRQ_DOVE_GE00_RX 26
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#define IRQ_DOVE_GE00_TX 27
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#define IRQ_DOVE_GE00_MISC 28
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#define IRQ_DOVE_GE00_SUM 29
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#define IRQ_DOVE_GE00_ERR 30
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#define IRQ_DOVE_CRYPTO 31
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/*
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* Dove High Interrupt Controller
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*/
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#define IRQ_DOVE_AC97 32
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#define IRQ_DOVE_PMU 33
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#define IRQ_DOVE_CAM 34
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#define IRQ_DOVE_SDIO0 35
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#define IRQ_DOVE_SDIO1 36
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#define IRQ_DOVE_SDIO0_WAKEUP 37
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#define IRQ_DOVE_SDIO1_WAKEUP 38
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#define IRQ_DOVE_XOR_00 39
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#define IRQ_DOVE_XOR_01 40
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#define IRQ_DOVE_XOR0_ERR 41
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#define IRQ_DOVE_XOR_10 42
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#define IRQ_DOVE_XOR_11 43
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#define IRQ_DOVE_XOR1_ERR 44
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#define IRQ_DOVE_LCD_DCON 45
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#define IRQ_DOVE_LCD1 46
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#define IRQ_DOVE_LCD0 47
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#define IRQ_DOVE_GPU 48
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#define IRQ_DOVE_PERFORM_MNTR 49
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#define IRQ_DOVE_VPRO_DMA1 51
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#define IRQ_DOVE_SSP_TIMER 54
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#define IRQ_DOVE_SSP 55
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#define IRQ_DOVE_MC_L2_ERR 56
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#define IRQ_DOVE_CRYPTO_ERR 59
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#define IRQ_DOVE_GPIO_24_31 60
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#define IRQ_DOVE_HIGH_GPIO 61
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#define IRQ_DOVE_SATA 62
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/*
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* DOVE General Purpose Pins
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*/
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#define IRQ_DOVE_GPIO_START 64
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#define NR_GPIO_IRQS 64
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/*
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* PMU interrupts
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*/
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#define IRQ_DOVE_PMU_START (IRQ_DOVE_GPIO_START + NR_GPIO_IRQS)
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#define NR_PMU_IRQS 7
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#define IRQ_DOVE_RTC (IRQ_DOVE_PMU_START + 5)
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#define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS)
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#endif
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