358 lines
8.2 KiB
Plaintext
358 lines
8.2 KiB
Plaintext
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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&soc {
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tmc_etr: tmc@fc326000 {
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compatible = "arm,coresight-tmc";
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reg = <0xfc326000 0x1000>,
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<0xfc37c000 0x3000>;
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reg-names = "tmc-base", "bam-base";
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qcom,memory-reservation-type = "EBI1";
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qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
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coresight-id = <0>;
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coresight-name = "coresight-tmc-etr";
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coresight-nr-inports = <1>;
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coresight-ctis = <&cti0 &cti8>;
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};
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tpiu: tpiu@fc320000 {
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compatible = "arm,coresight-tpiu";
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reg = <0xfc320000 0x1000>;
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reg-names = "tpiu-base";
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coresight-id = <1>;
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coresight-name = "coresight-tpiu";
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coresight-nr-inports = <1>;
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vdd-supply = <&pm8110_l18>;
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qcom,vdd-voltage-level = <2950000 2950000>;
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qcom,vdd-current-level = <15000 400000>;
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};
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replicator: replicator@fc324000 {
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compatible = "qcom,coresight-replicator";
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reg = <0xfc324000 0x1000>;
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reg-names = "replicator-base";
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coresight-id = <2>;
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coresight-name = "coresight-replicator";
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coresight-nr-inports = <1>;
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coresight-outports = <0 1>;
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coresight-child-list = <&tmc_etr &tpiu>;
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coresight-child-ports = <0 0>;
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};
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tmc_etf: tmc@fc325000 {
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compatible = "arm,coresight-tmc";
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reg = <0xfc325000 0x1000>;
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reg-names = "tmc-base";
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coresight-id = <3>;
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coresight-name = "coresight-tmc-etf";
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coresight-nr-inports = <1>;
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coresight-outports = <0>;
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coresight-child-list = <&replicator>;
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coresight-child-ports = <0>;
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coresight-default-sink;
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coresight-ctis = <&cti0 &cti8>;
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};
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funnel_merg: funnel@fc323000 {
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compatible = "arm,coresight-funnel";
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reg = <0xfc323000 0x1000>;
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reg-names = "funnel-base";
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coresight-id = <4>;
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coresight-name = "coresight-funnel-merg";
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coresight-nr-inports = <2>;
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coresight-outports = <0>;
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coresight-child-list = <&tmc_etf>;
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coresight-child-ports = <0>;
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};
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funnel_in0: funnel@fc321000 {
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compatible = "arm,coresight-funnel";
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reg = <0xfc321000 0x1000>;
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reg-names = "funnel-base";
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coresight-id = <5>;
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coresight-name = "coresight-funnel-in0";
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coresight-nr-inports = <8>;
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coresight-outports = <0>;
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coresight-child-list = <&funnel_merg>;
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coresight-child-ports = <0>;
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};
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funnel_in1: funnel@fc322000 {
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compatible = "arm,coresight-funnel";
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reg = <0xfc322000 0x1000>;
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reg-names = "funnel-base";
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coresight-id = <6>;
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coresight-name = "coresight-funnel-in1";
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coresight-nr-inports = <8>;
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coresight-outports = <0>;
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coresight-child-list = <&funnel_merg>;
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coresight-child-ports = <1>;
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};
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funnel_a7ss: funnel@fc355000 {
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compatible = "arm,coresight-funnel";
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reg = <0xfc355000 0x1000>;
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reg-names = "funnel-base";
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coresight-id = <7>;
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coresight-name = "coresight-funnel-a7ss";
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coresight-nr-inports = <4>;
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coresight-outports = <0>;
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coresight-child-list = <&funnel_in1>;
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coresight-child-ports = <6>;
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};
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stm: stm@fc302000 {
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compatible = "arm,coresight-stm";
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reg = <0xfc302000 0x1000>,
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<0xfa280000 0x180000>;
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reg-names = "stm-base", "stm-data-base";
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coresight-id = <8>;
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coresight-name = "coresight-stm";
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coresight-nr-inports = <0>;
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coresight-outports = <0>;
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coresight-child-list = <&funnel_in0>;
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coresight-child-ports = <7>;
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};
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etm0: etm@fc34c000 {
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compatible = "arm,coresight-etm";
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reg = <0xfc34c000 0x1000>;
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reg-names = "etm-base";
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coresight-id = <9>;
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coresight-name = "coresight-etm0";
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coresight-nr-inports = <0>;
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coresight-outports = <0>;
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coresight-child-list = <&funnel_a7ss>;
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coresight-child-ports = <0>;
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qcom,pc-save;
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qcom,round-robin;
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};
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etm1: etm@fc34d000 {
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compatible = "arm,coresight-etm";
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reg = <0xfc34d000 0x1000>;
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reg-names = "etm-base";
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coresight-id = <10>;
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coresight-name = "coresight-etm1";
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coresight-nr-inports = <0>;
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coresight-outports = <0>;
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coresight-child-list = <&funnel_a7ss>;
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coresight-child-ports = <1>;
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qcom,pc-save;
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qcom,round-robin;
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};
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etm2: etm@fc34e000 {
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compatible = "arm,coresight-etm";
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reg = <0xfc34e000 0x1000>;
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reg-names = "etm-base";
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coresight-id = <11>;
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coresight-name = "coresight-etm2";
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coresight-nr-inports = <0>;
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coresight-outports = <0>;
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coresight-child-list = <&funnel_a7ss>;
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coresight-child-ports = <2>;
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qcom,pc-save;
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qcom,round-robin;
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};
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etm3: etm@fc34f000 {
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compatible = "arm,coresight-etm";
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reg = <0xfc34f000 0x1000>;
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reg-names = "etm-base";
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coresight-id = <12>;
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coresight-name = "coresight-etm3";
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coresight-nr-inports = <0>;
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coresight-outports = <0>;
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coresight-child-list = <&funnel_a7ss>;
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coresight-child-ports = <3>;
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qcom,pc-save;
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qcom,round-robin;
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};
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csr: csr@fc301000 {
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compatible = "qcom,coresight-csr";
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reg = <0xfc301000 0x1000>;
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reg-names = "csr-base";
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coresight-id = <13>;
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coresight-name = "coresight-csr";
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coresight-nr-inports = <0>;
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qcom,blk-size = <1>;
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};
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cti0: cti@fc310000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc310000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <14>;
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coresight-name = "coresight-cti0";
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coresight-nr-inports = <0>;
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};
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cti1: cti@fc311000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc311000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <15>;
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coresight-name = "coresight-cti1";
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coresight-nr-inports = <0>;
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};
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cti2: cti@fc312000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc312000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <16>;
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coresight-name = "coresight-cti2";
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coresight-nr-inports = <0>;
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};
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cti3: cti@fc313000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc313000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <17>;
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coresight-name = "coresight-cti3";
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coresight-nr-inports = <0>;
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};
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cti4: cti@fc314000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc314000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <18>;
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coresight-name = "coresight-cti4";
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coresight-nr-inports = <0>;
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};
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cti5: cti@fc315000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc315000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <19>;
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coresight-name = "coresight-cti5";
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coresight-nr-inports = <0>;
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};
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cti6: cti@fc316000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc316000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <20>;
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coresight-name = "coresight-cti6";
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coresight-nr-inports = <0>;
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};
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cti7: cti@fc317000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc317000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <21>;
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coresight-name = "coresight-cti7";
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coresight-nr-inports = <0>;
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};
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cti8: cti@fc318000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc318000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <22>;
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coresight-name = "coresight-cti8";
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coresight-nr-inports = <0>;
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};
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cti_cpu0: cti@fc351000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc351000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <23>;
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coresight-name = "coresight-cti-cpu0";
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coresight-nr-inports = <0>;
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};
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cti_cpu1: cti@fc352000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc352000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <24>;
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coresight-name = "coresight-cti-cpu1";
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coresight-nr-inports = <0>;
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};
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cti_cpu2: cti@fc353000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc353000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <25>;
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coresight-name = "coresight-cti-cpu2";
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coresight-nr-inports = <0>;
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};
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cti_cpu3: cti@fc354000 {
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compatible = "arm,coresight-cti";
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reg = <0xfc354000 0x1000>;
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reg-names = "cti-base";
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coresight-id = <26>;
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coresight-name = "coresight-cti-cpu3";
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coresight-nr-inports = <0>;
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};
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hwevent: hwevent@fd820018 {
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compatible = "qcom,coresight-hwevent";
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reg = <0xfd820018 0x80>,
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<0xf9011080 0x80>,
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<0xfd4ab160 0x80>;
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reg-names = "mmss-mux", "apcs-mux", "ppss-mux";
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coresight-id = <27>;
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coresight-name = "coresight-hwevent";
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coresight-nr-inports = <0>;
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qcom,hwevent-clks = "core_mmss_clk";
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};
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};
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