88 lines
3.4 KiB
Plaintext
88 lines
3.4 KiB
Plaintext
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MSM SuperSpeed USB3.0 SoC controller
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Required properties :
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- compatible : should be "qcom,dwc-usb3-msm"
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- reg : offset and length of the register set in the memory map
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offset and length of the TCSR register for routing USB
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signals to either picoPHY0 or picoPHY1.
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- interrupts: IRQ lines used by this controller
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- <supply-name>-supply: phandle to the regulator device tree node
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Required "supply-name" examples are:
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"SSUSB_lp8" : 1.8v supply for SSPHY
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"HSUSB_1p8" : 1.8v supply for HSPHY
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"HSUSB_3p3" : 3.3v supply for HSPHY
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"vbus_dwc3" : vbus supply for host mode
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"ssusb_vdd_dig" : vdd supply for SSPHY digital circuit operation
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"hsusb_vdd_dig" : vdd supply for HSPHY digital circuit operation
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- qcom,dwc-usb3-msm-dbm-eps: Number of endpoints avaliable for
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the DBM (Device Bus Manager). The DBM is HW unit which is part of
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the MSM USB3.0 core (which also includes the Synopsys DesignWare
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USB3.0 controller)
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- qcom,vdd-voltage-level: This property must be a list of three integer
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values (no, min, max) where each value represents either a voltage in
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microvolts or a value corresponding to voltage corner
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Optional properties :
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- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
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below optional properties:
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- qcom,msm_bus,name
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- qcom,msm_bus,num_cases
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- qcom,msm_bus,active_only
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- qcom,msm_bus,num_paths
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- qcom,msm_bus,vectors
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- interrupt-names : Optional interrupt resource entries are:
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"hs_phy_irq" : Interrupt from HSPHY for asynchronous events in LPM.
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This is not used if wakeup events are received externally (e.g. PMIC)
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"pmic_id_irq" : Interrupt from PMIC for external ID pin notification.
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- qcom,otg-capability: If present then depend on PMIC for VBUS notifications,
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otherwise depend on PHY.
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- qcom,charging-disabled: If present then battery charging using USB
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is disabled.
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- qcom,dwc-hsphy-init: This property if present represents phy init
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value to be used for overriding HSPHY parameters into QSCRATCH register.
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This 32 bit value represents parameters as follows:
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bits 0-5 PARAMETER_OVERRIDE_A
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bits 6-12 PARAMETER_OVERRIDE_B
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bits 13-19 PARAMETER_OVERRIDE_C
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bits 20-25 PARAMETER_OVERRIDE_D
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- qcom,skip-charger-detection: If present then charger detection using BC1.2
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is not supported and attached host should always be assumed as SDP.
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Sub nodes:
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- Sub node for "DWC3- USB3 controller".
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This sub node is required property for device node. The properties of this subnode
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are specified in dwc3.txt.
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Example MSM USB3.0 controller device node :
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usb@f9200000 {
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compatible = "qcom,dwc-usb3-msm";
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reg = <0xf9200000 0xfc000>,
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<0xfd4ab000 0x4>;
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interrupts = <0 133 0>;
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interrupt-names = "hs_phy_irq";
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ssusb_vdd_dig-supply = <&pm8841_s2_corner>;
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SSUSB_1p8-supply = <&pm8941_l6>;
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hsusb_vdd_dig-supply = <&pm8841_s2_corner>;
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HSUSB_1p8-supply = <&pm8941_l6>;
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HSUSB_3p3-supply = <&pm8941_l24>;
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vbus_dwc3-supply = <&pm8941_mvs1>;
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qcom,dwc-usb3-msm-dbm-eps = <4>
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qcom,vdd-voltage-level = <1 5 7>;
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qcom,dwc-hsphy-init = <0x00D195A4>;
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qcom,msm_bus,name = "usb3";
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qcom,msm_bus,num_cases = <2>;
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qcom,msm_bus,active_only = <0>;
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qcom,msm_bus,num_paths = <1>;
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qcom,msm_bus,vectors =
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<61 512 0 0>,
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<61 512 240000000 960000000>;
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dwc3@f9200000 {
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compatible = "synopsys,dwc3";
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reg = <0xf9200000 0xfc000>;
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interrupts = <0 131 0>, <0 179 0>;
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interrupt-names = "irq", "otg_irq";
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tx-fifo-resize;
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};
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};
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