63 lines
1.6 KiB
Plaintext
63 lines
1.6 KiB
Plaintext
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External Memory Interface
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-------------------------
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The emifa node describes a simple external bus controller found on some C6X
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SoCs. This interface provides external busses with a number of chip selects.
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Required properties:
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- compatible: must be "ti,c64x+emifa", "simple-bus"
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- reg: register area base and size
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- #address-cells: must be 2 (chip-select + offset)
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- #size-cells: must be 1
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- ranges: mapping from EMIFA space to parent space
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Optional properties:
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- ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
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- ti,emifa-burst-priority:
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Number of memory transfers after which the EMIF will elevate the priority
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of the oldest command in the command FIFO. Setting this field to 255
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disables this feature, thereby allowing old commands to stay in the FIFO
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indefinitely.
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- ti,emifa-ce-config:
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Configuration values for each of the supported chip selects.
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Example:
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emifa@70000000 {
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compatible = "ti,c64x+emifa", "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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reg = <0x70000000 0x100>;
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ranges = <0x2 0x0 0xa0000000 0x00000008
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0x3 0x0 0xb0000000 0x00400000
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0x4 0x0 0xc0000000 0x10000000
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0x5 0x0 0xD0000000 0x10000000>;
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ti,dscr-dev-enable = <13>;
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ti,emifa-burst-priority = <255>;
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ti,emifa-ce-config = <0x00240120
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0x00240120
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0x00240122
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0x00240122>;
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flash@3,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x3 0x0 0x400000>;
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bank-width = <1>;
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device-width = <1>;
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partition@0 {
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reg = <0x0 0x400000>;
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label = "NOR";
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};
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};
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};
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This shows a flash chip attached to chip select 3.
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