2024-09-09 08:57:42 +00:00
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#ifndef __UAPI_MSM_GEMINI_H
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#define __UAPI_MSM_GEMINI_H
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2024-09-09 08:52:07 +00:00
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#include <linux/types.h>
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#include <linux/ioctl.h>
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#define MSM_GMN_IOCTL_MAGIC 'g'
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#define MSM_GMN_IOCTL_GET_HW_VERSION \
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_IOW(MSM_GMN_IOCTL_MAGIC, 1, struct msm_gemini_hw_cmd *)
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#define MSM_GMN_IOCTL_RESET \
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_IOW(MSM_GMN_IOCTL_MAGIC, 2, struct msm_gemini_ctrl_cmd *)
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#define MSM_GMN_IOCTL_STOP \
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_IOW(MSM_GMN_IOCTL_MAGIC, 3, struct msm_gemini_hw_cmds *)
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#define MSM_GMN_IOCTL_START \
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_IOW(MSM_GMN_IOCTL_MAGIC, 4, struct msm_gemini_hw_cmds *)
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#define MSM_GMN_IOCTL_INPUT_BUF_ENQUEUE \
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_IOW(MSM_GMN_IOCTL_MAGIC, 5, struct msm_gemini_buf *)
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#define MSM_GMN_IOCTL_INPUT_GET \
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_IOW(MSM_GMN_IOCTL_MAGIC, 6, struct msm_gemini_buf *)
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#define MSM_GMN_IOCTL_INPUT_GET_UNBLOCK \
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_IOW(MSM_GMN_IOCTL_MAGIC, 7, int)
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#define MSM_GMN_IOCTL_OUTPUT_BUF_ENQUEUE \
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_IOW(MSM_GMN_IOCTL_MAGIC, 8, struct msm_gemini_buf *)
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#define MSM_GMN_IOCTL_OUTPUT_GET \
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_IOW(MSM_GMN_IOCTL_MAGIC, 9, struct msm_gemini_buf *)
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#define MSM_GMN_IOCTL_OUTPUT_GET_UNBLOCK \
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_IOW(MSM_GMN_IOCTL_MAGIC, 10, int)
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#define MSM_GMN_IOCTL_EVT_GET \
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_IOW(MSM_GMN_IOCTL_MAGIC, 11, struct msm_gemini_ctrl_cmd *)
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#define MSM_GMN_IOCTL_EVT_GET_UNBLOCK \
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_IOW(MSM_GMN_IOCTL_MAGIC, 12, int)
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#define MSM_GMN_IOCTL_HW_CMD \
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_IOW(MSM_GMN_IOCTL_MAGIC, 13, struct msm_gemini_hw_cmd *)
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#define MSM_GMN_IOCTL_HW_CMDS \
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_IOW(MSM_GMN_IOCTL_MAGIC, 14, struct msm_gemini_hw_cmds *)
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#define MSM_GMN_IOCTL_TEST_DUMP_REGION \
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_IOW(MSM_GMN_IOCTL_MAGIC, 15, unsigned long)
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#define MSM_GMN_IOCTL_SET_MODE \
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_IOW(MSM_GMN_IOCTL_MAGIC, 16, enum msm_gmn_out_mode)
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#define MSM_GEMINI_MODE_REALTIME_ENCODE 0
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#define MSM_GEMINI_MODE_OFFLINE_ENCODE 1
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#define MSM_GEMINI_MODE_REALTIME_ROTATION 2
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#define MSM_GEMINI_MODE_OFFLINE_ROTATION 3
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enum msm_gmn_out_mode {
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MSM_GMN_OUTMODE_FRAGMENTED,
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MSM_GMN_OUTMODE_SINGLE
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};
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struct msm_gemini_ctrl_cmd {
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uint32_t type;
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uint32_t len;
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void *value;
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};
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#define MSM_GEMINI_EVT_RESET 0
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#define MSM_GEMINI_EVT_FRAMEDONE 1
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#define MSM_GEMINI_EVT_ERR 2
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struct msm_gemini_buf {
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uint32_t type;
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int fd;
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void *vaddr;
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uint32_t y_off;
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uint32_t y_len;
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uint32_t framedone_len;
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uint32_t cbcr_off;
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uint32_t cbcr_len;
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uint32_t num_of_mcu_rows;
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uint32_t offset;
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};
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#define MSM_GEMINI_HW_CMD_TYPE_READ 0
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#define MSM_GEMINI_HW_CMD_TYPE_WRITE 1
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#define MSM_GEMINI_HW_CMD_TYPE_WRITE_OR 2
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#define MSM_GEMINI_HW_CMD_TYPE_UWAIT 3
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#define MSM_GEMINI_HW_CMD_TYPE_MWAIT 4
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#define MSM_GEMINI_HW_CMD_TYPE_MDELAY 5
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#define MSM_GEMINI_HW_CMD_TYPE_UDELAY 6
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struct msm_gemini_hw_cmd {
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uint32_t type:4;
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/* n microseconds of timeout for WAIT */
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/* n microseconds of time for DELAY */
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/* repeat n times for READ/WRITE */
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/* max is 0xFFF, 4095 */
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uint32_t n:12;
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uint32_t offset:16;
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uint32_t mask;
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union {
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uint32_t data; /* for single READ/WRITE/WAIT, n = 1 */
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uint32_t *pdata; /* for multiple READ/WRITE/WAIT, n > 1 */
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};
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};
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struct msm_gemini_hw_cmds {
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uint32_t m; /* number of elements in the hw_cmd array */
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struct msm_gemini_hw_cmd hw_cmd[1];
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};
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2024-09-09 08:57:42 +00:00
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#endif /* __UAPI_MSM_GEMINI_H */
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