535 lines
14 KiB
C
535 lines
14 KiB
C
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/*
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* Copyright (c) 2012 Qualcomm Atheros, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "ath9k.h"
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/*
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* TX polling - checks if the TX engine is stuck somewhere
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* and issues a chip reset if so.
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*/
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void ath_tx_complete_poll_work(struct work_struct *work)
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{
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struct ath_softc *sc = container_of(work, struct ath_softc,
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tx_complete_work.work);
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struct ath_txq *txq;
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int i;
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bool needreset = false;
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if (sc->tx99_state) {
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ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
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"skip tx hung detection on tx99\n");
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return;
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}
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for (i = 0; i < IEEE80211_NUM_ACS; i++) {
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txq = sc->tx.txq_map[i];
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ath_txq_lock(sc, txq);
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if (txq->axq_depth) {
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if (txq->axq_tx_inprogress) {
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needreset = true;
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ath_txq_unlock(sc, txq);
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break;
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} else {
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txq->axq_tx_inprogress = true;
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}
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}
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ath_txq_unlock(sc, txq);
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}
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if (needreset) {
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ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
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"tx hung, resetting the chip\n");
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ath9k_queue_reset(sc, RESET_TYPE_TX_HANG);
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return;
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}
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ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
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msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT));
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}
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/*
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* Checks if the BB/MAC is hung.
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*/
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bool ath_hw_check(struct ath_softc *sc)
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{
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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enum ath_reset_type type;
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bool is_alive;
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ath9k_ps_wakeup(sc);
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is_alive = ath9k_hw_check_alive(sc->sc_ah);
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if (!is_alive) {
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ath_dbg(common, RESET,
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"HW hang detected, schedule chip reset\n");
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type = RESET_TYPE_MAC_HANG;
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ath9k_queue_reset(sc, type);
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}
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ath9k_ps_restore(sc);
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return is_alive;
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}
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/*
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* PLL-WAR for AR9485/AR9340
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*/
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static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
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{
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static int count;
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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if (pll_sqsum >= 0x40000) {
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count++;
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if (count == 3) {
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ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
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ath9k_queue_reset(sc, RESET_TYPE_PLL_HANG);
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count = 0;
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return true;
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}
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} else {
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count = 0;
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}
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return false;
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}
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void ath_hw_pll_work(struct work_struct *work)
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{
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u32 pll_sqsum;
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struct ath_softc *sc = container_of(work, struct ath_softc,
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hw_pll_work.work);
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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/*
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* ensure that the PLL WAR is executed only
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* after the STA is associated (or) if the
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* beaconing had started in interfaces that
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* uses beacons.
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*/
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if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
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return;
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if (sc->tx99_state)
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return;
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ath9k_ps_wakeup(sc);
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pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
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ath9k_ps_restore(sc);
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if (ath_hw_pll_rx_hang_check(sc, pll_sqsum))
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return;
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ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
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msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
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}
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/*
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* PA Pre-distortion.
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*/
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static void ath_paprd_activate(struct ath_softc *sc)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath9k_hw_cal_data *caldata = ah->caldata;
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int chain;
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if (!caldata || !test_bit(PAPRD_DONE, &caldata->cal_flags)) {
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ath_dbg(common, CALIBRATE, "Failed to activate PAPRD\n");
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return;
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}
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ar9003_paprd_enable(ah, false);
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for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
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if (!(ah->txchainmask & BIT(chain)))
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continue;
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ar9003_paprd_populate_single_table(ah, caldata, chain);
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}
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ath_dbg(common, CALIBRATE, "Activating PAPRD\n");
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ar9003_paprd_enable(ah, true);
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}
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static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
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{
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struct ieee80211_hw *hw = sc->hw;
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_tx_control txctl;
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int time_left;
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memset(&txctl, 0, sizeof(txctl));
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txctl.txq = sc->tx.txq_map[IEEE80211_AC_BE];
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memset(tx_info, 0, sizeof(*tx_info));
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tx_info->band = sc->cur_chandef.chan->band;
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tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
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tx_info->control.rates[0].idx = 0;
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tx_info->control.rates[0].count = 1;
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tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
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tx_info->control.rates[1].idx = -1;
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init_completion(&sc->paprd_complete);
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txctl.paprd = BIT(chain);
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if (ath_tx_start(hw, skb, &txctl) != 0) {
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ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
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dev_kfree_skb_any(skb);
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return false;
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}
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time_left = wait_for_completion_timeout(&sc->paprd_complete,
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msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
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if (!time_left)
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ath_dbg(common, CALIBRATE,
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"Timeout waiting for paprd training on TX chain %d\n",
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chain);
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return !!time_left;
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}
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void ath_paprd_calibrate(struct work_struct *work)
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{
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struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
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struct ieee80211_hw *hw = sc->hw;
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struct ath_hw *ah = sc->sc_ah;
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struct ieee80211_hdr *hdr;
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struct sk_buff *skb = NULL;
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struct ath9k_hw_cal_data *caldata = ah->caldata;
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struct ath_common *common = ath9k_hw_common(ah);
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int ftype;
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int chain_ok = 0;
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int chain;
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int len = 1800;
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int ret;
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if (!caldata ||
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!test_bit(PAPRD_PACKET_SENT, &caldata->cal_flags) ||
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test_bit(PAPRD_DONE, &caldata->cal_flags)) {
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ath_dbg(common, CALIBRATE, "Skipping PAPRD calibration\n");
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return;
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}
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ath9k_ps_wakeup(sc);
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if (ar9003_paprd_init_table(ah) < 0)
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goto fail_paprd;
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skb = alloc_skb(len, GFP_KERNEL);
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if (!skb)
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goto fail_paprd;
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skb_put(skb, len);
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memset(skb->data, 0, len);
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hdr = (struct ieee80211_hdr *)skb->data;
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ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
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hdr->frame_control = cpu_to_le16(ftype);
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hdr->duration_id = cpu_to_le16(10);
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memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
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memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
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memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
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for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
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if (!(ah->txchainmask & BIT(chain)))
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continue;
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chain_ok = 0;
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ar9003_paprd_setup_gain_table(ah, chain);
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ath_dbg(common, CALIBRATE,
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"Sending PAPRD training frame on chain %d\n", chain);
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if (!ath_paprd_send_frame(sc, skb, chain))
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goto fail_paprd;
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if (!ar9003_paprd_is_done(ah)) {
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ath_dbg(common, CALIBRATE,
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"PAPRD not yet done on chain %d\n", chain);
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break;
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}
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ret = ar9003_paprd_create_curve(ah, caldata, chain);
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if (ret == -EINPROGRESS) {
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ath_dbg(common, CALIBRATE,
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"PAPRD curve on chain %d needs to be re-trained\n",
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chain);
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break;
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} else if (ret) {
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ath_dbg(common, CALIBRATE,
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"PAPRD create curve failed on chain %d\n",
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chain);
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break;
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}
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chain_ok = 1;
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}
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kfree_skb(skb);
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if (chain_ok) {
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set_bit(PAPRD_DONE, &caldata->cal_flags);
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ath_paprd_activate(sc);
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}
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fail_paprd:
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ath9k_ps_restore(sc);
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}
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/*
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* ANI performs periodic noise floor calibration
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* that is used to adjust and optimize the chip performance. This
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* takes environmental changes (location, temperature) into account.
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* When the task is complete, it reschedules itself depending on the
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* appropriate interval that was calculated.
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*/
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void ath_ani_calibrate(unsigned long data)
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{
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struct ath_softc *sc = (struct ath_softc *)data;
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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bool longcal = false;
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bool shortcal = false;
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bool aniflag = false;
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unsigned int timestamp = jiffies_to_msecs(jiffies);
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u32 cal_interval, short_cal_interval, long_cal_interval;
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unsigned long flags;
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if (ah->caldata && test_bit(NFCAL_INTF, &ah->caldata->cal_flags))
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long_cal_interval = ATH_LONG_CALINTERVAL_INT;
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else
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long_cal_interval = ATH_LONG_CALINTERVAL;
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short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
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ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
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/* Only calibrate if awake */
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if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) {
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if (++ah->ani_skip_count >= ATH_ANI_MAX_SKIP_COUNT) {
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spin_lock_irqsave(&sc->sc_pm_lock, flags);
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sc->ps_flags |= PS_WAIT_FOR_ANI;
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spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
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}
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goto set_timer;
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}
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ah->ani_skip_count = 0;
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spin_lock_irqsave(&sc->sc_pm_lock, flags);
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sc->ps_flags &= ~PS_WAIT_FOR_ANI;
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spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
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ath9k_ps_wakeup(sc);
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/* Long calibration runs independently of short calibration. */
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if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
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longcal = true;
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common->ani.longcal_timer = timestamp;
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}
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/* Short calibration applies only while caldone is false */
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if (!common->ani.caldone) {
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if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
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shortcal = true;
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common->ani.shortcal_timer = timestamp;
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common->ani.resetcal_timer = timestamp;
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}
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} else {
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if ((timestamp - common->ani.resetcal_timer) >=
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ATH_RESTART_CALINTERVAL) {
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common->ani.caldone = ath9k_hw_reset_calvalid(ah);
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if (common->ani.caldone)
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common->ani.resetcal_timer = timestamp;
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}
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}
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/* Verify whether we must check ANI */
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if ((timestamp - common->ani.checkani_timer) >= ah->config.ani_poll_interval) {
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aniflag = true;
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common->ani.checkani_timer = timestamp;
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}
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/* Call ANI routine if necessary */
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if (aniflag) {
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spin_lock(&common->cc_lock);
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ath9k_hw_ani_monitor(ah, ah->curchan);
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ath_update_survey_stats(sc);
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spin_unlock(&common->cc_lock);
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}
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/* Perform calibration if necessary */
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if (longcal || shortcal) {
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common->ani.caldone =
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ath9k_hw_calibrate(ah, ah->curchan,
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ah->rxchainmask, longcal);
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}
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ath_dbg(common, ANI,
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"Calibration @%lu finished: %s %s %s, caldone: %s\n",
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jiffies,
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longcal ? "long" : "", shortcal ? "short" : "",
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aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
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ath9k_ps_restore(sc);
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set_timer:
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/*
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* Set timer interval based on previous results.
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* The interval must be the shortest necessary to satisfy ANI,
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* short calibration and long calibration.
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*/
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cal_interval = ATH_LONG_CALINTERVAL;
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cal_interval = min(cal_interval, (u32)ah->config.ani_poll_interval);
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if (!common->ani.caldone)
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cal_interval = min(cal_interval, (u32)short_cal_interval);
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mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
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if (ar9003_is_paprd_enabled(ah) && ah->caldata) {
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if (!test_bit(PAPRD_DONE, &ah->caldata->cal_flags)) {
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ieee80211_queue_work(sc->hw, &sc->paprd_work);
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} else if (!ah->paprd_table_write_done) {
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ath9k_ps_wakeup(sc);
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ath_paprd_activate(sc);
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ath9k_ps_restore(sc);
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}
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}
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}
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void ath_start_ani(struct ath_softc *sc)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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||
|
unsigned long timestamp = jiffies_to_msecs(jiffies);
|
||
|
|
||
|
if (common->disable_ani ||
|
||
|
!test_bit(ATH_OP_ANI_RUN, &common->op_flags) ||
|
||
|
sc->cur_chan->offchannel)
|
||
|
return;
|
||
|
|
||
|
common->ani.longcal_timer = timestamp;
|
||
|
common->ani.shortcal_timer = timestamp;
|
||
|
common->ani.checkani_timer = timestamp;
|
||
|
|
||
|
ath_dbg(common, ANI, "Starting ANI\n");
|
||
|
mod_timer(&common->ani.timer,
|
||
|
jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval));
|
||
|
}
|
||
|
|
||
|
void ath_stop_ani(struct ath_softc *sc)
|
||
|
{
|
||
|
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||
|
|
||
|
ath_dbg(common, ANI, "Stopping ANI\n");
|
||
|
del_timer_sync(&common->ani.timer);
|
||
|
}
|
||
|
|
||
|
void ath_check_ani(struct ath_softc *sc)
|
||
|
{
|
||
|
struct ath_hw *ah = sc->sc_ah;
|
||
|
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||
|
struct ath_beacon_config *cur_conf = &sc->cur_chan->beacon;
|
||
|
|
||
|
/*
|
||
|
* Check for the various conditions in which ANI has to
|
||
|
* be stopped.
|
||
|
*/
|
||
|
if (ah->opmode == NL80211_IFTYPE_ADHOC) {
|
||
|
if (!cur_conf->enable_beacon)
|
||
|
goto stop_ani;
|
||
|
} else if (ah->opmode == NL80211_IFTYPE_AP) {
|
||
|
if (!cur_conf->enable_beacon) {
|
||
|
/*
|
||
|
* Disable ANI only when there are no
|
||
|
* associated stations.
|
||
|
*/
|
||
|
if (!test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags))
|
||
|
goto stop_ani;
|
||
|
}
|
||
|
} else if (ah->opmode == NL80211_IFTYPE_STATION) {
|
||
|
if (!test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags))
|
||
|
goto stop_ani;
|
||
|
}
|
||
|
|
||
|
if (!test_bit(ATH_OP_ANI_RUN, &common->op_flags)) {
|
||
|
set_bit(ATH_OP_ANI_RUN, &common->op_flags);
|
||
|
ath_start_ani(sc);
|
||
|
}
|
||
|
|
||
|
return;
|
||
|
|
||
|
stop_ani:
|
||
|
clear_bit(ATH_OP_ANI_RUN, &common->op_flags);
|
||
|
ath_stop_ani(sc);
|
||
|
}
|
||
|
|
||
|
void ath_update_survey_nf(struct ath_softc *sc, int channel)
|
||
|
{
|
||
|
struct ath_hw *ah = sc->sc_ah;
|
||
|
struct ath9k_channel *chan = &ah->channels[channel];
|
||
|
struct survey_info *survey = &sc->survey[channel];
|
||
|
|
||
|
if (chan->noisefloor) {
|
||
|
survey->filled |= SURVEY_INFO_NOISE_DBM;
|
||
|
survey->noise = ath9k_hw_getchan_noise(ah, chan,
|
||
|
chan->noisefloor);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Updates the survey statistics and returns the busy time since last
|
||
|
* update in %, if the measurement duration was long enough for the
|
||
|
* result to be useful, -1 otherwise.
|
||
|
*/
|
||
|
int ath_update_survey_stats(struct ath_softc *sc)
|
||
|
{
|
||
|
struct ath_hw *ah = sc->sc_ah;
|
||
|
struct ath_common *common = ath9k_hw_common(ah);
|
||
|
int pos = ah->curchan - &ah->channels[0];
|
||
|
struct survey_info *survey = &sc->survey[pos];
|
||
|
struct ath_cycle_counters *cc = &common->cc_survey;
|
||
|
unsigned int div = common->clockrate * 1000;
|
||
|
int ret = 0;
|
||
|
|
||
|
if (!ah->curchan)
|
||
|
return -1;
|
||
|
|
||
|
if (ah->power_mode == ATH9K_PM_AWAKE)
|
||
|
ath_hw_cycle_counters_update(common);
|
||
|
|
||
|
if (cc->cycles > 0) {
|
||
|
survey->filled |= SURVEY_INFO_CHANNEL_TIME |
|
||
|
SURVEY_INFO_CHANNEL_TIME_BUSY |
|
||
|
SURVEY_INFO_CHANNEL_TIME_RX |
|
||
|
SURVEY_INFO_CHANNEL_TIME_TX;
|
||
|
survey->channel_time += cc->cycles / div;
|
||
|
survey->channel_time_busy += cc->rx_busy / div;
|
||
|
survey->channel_time_rx += cc->rx_frame / div;
|
||
|
survey->channel_time_tx += cc->tx_frame / div;
|
||
|
}
|
||
|
|
||
|
if (cc->cycles < div)
|
||
|
return -1;
|
||
|
|
||
|
if (cc->cycles > 0)
|
||
|
ret = cc->rx_busy * 100 / cc->cycles;
|
||
|
|
||
|
memset(cc, 0, sizeof(*cc));
|
||
|
|
||
|
ath_update_survey_nf(sc, pos);
|
||
|
|
||
|
return ret;
|
||
|
}
|