2024-09-09 08:52:07 +00:00
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/*
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* Copyright (c) 2009-2011 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Module for common driver code between ath9k and ath9k_htc
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include "common.h"
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MODULE_AUTHOR("Atheros Communications");
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MODULE_DESCRIPTION("Shared library for Atheros wireless 802.11n LAN cards.");
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MODULE_LICENSE("Dual BSD/GPL");
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2024-09-09 08:57:42 +00:00
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/* Assumes you've already done the endian to CPU conversion */
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bool ath9k_cmn_rx_accept(struct ath_common *common,
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struct ieee80211_hdr *hdr,
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struct ieee80211_rx_status *rxs,
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struct ath_rx_status *rx_stats,
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bool *decrypt_error,
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unsigned int rxfilter)
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2024-09-09 08:52:07 +00:00
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{
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2024-09-09 08:57:42 +00:00
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struct ath_hw *ah = common->ah;
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bool is_mc, is_valid_tkip, strip_mic, mic_error;
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__le16 fc;
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fc = hdr->frame_control;
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is_mc = !!is_multicast_ether_addr(hdr->addr1);
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is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
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test_bit(rx_stats->rs_keyix, common->tkip_keymap);
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strip_mic = is_valid_tkip && ieee80211_is_data(fc) &&
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ieee80211_has_protected(fc) &&
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!(rx_stats->rs_status &
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(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
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ATH9K_RXERR_KEYMISS));
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/*
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* Key miss events are only relevant for pairwise keys where the
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* descriptor does contain a valid key index. This has been observed
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* mostly with CCMP encryption.
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*/
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if (rx_stats->rs_keyix == ATH9K_RXKEYIX_INVALID ||
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!test_bit(rx_stats->rs_keyix, common->ccmp_keymap))
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rx_stats->rs_status &= ~ATH9K_RXERR_KEYMISS;
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mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
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!ieee80211_has_morefrags(fc) &&
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!(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
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(rx_stats->rs_status & ATH9K_RXERR_MIC);
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/*
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* The rx_stats->rs_status will not be set until the end of the
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* chained descriptors so it can be ignored if rs_more is set. The
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* rs_more will be false at the last element of the chained
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* descriptors.
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*/
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if (rx_stats->rs_status != 0) {
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u8 status_mask;
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if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
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rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
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mic_error = false;
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}
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if ((rx_stats->rs_status & ATH9K_RXERR_DECRYPT) ||
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(!is_mc && (rx_stats->rs_status & ATH9K_RXERR_KEYMISS))) {
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*decrypt_error = true;
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mic_error = false;
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}
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/*
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* Reject error frames with the exception of
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* decryption and MIC failures. For monitor mode,
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* we also ignore the CRC error.
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*/
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status_mask = ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
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ATH9K_RXERR_KEYMISS;
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if (ah->is_monitoring && (rxfilter & FIF_FCSFAIL))
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status_mask |= ATH9K_RXERR_CRC;
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if (rx_stats->rs_status & ~status_mask)
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return false;
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}
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/*
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* For unicast frames the MIC error bit can have false positives,
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* so all MIC error reports need to be validated in software.
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* False negatives are not common, so skip software verification
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* if the hardware considers the MIC valid.
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*/
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if (strip_mic)
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rxs->flag |= RX_FLAG_MMIC_STRIPPED;
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else if (is_mc && mic_error)
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rxs->flag |= RX_FLAG_MMIC_ERROR;
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return true;
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}
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EXPORT_SYMBOL(ath9k_cmn_rx_accept);
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void ath9k_cmn_rx_skb_postprocess(struct ath_common *common,
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struct sk_buff *skb,
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struct ath_rx_status *rx_stats,
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struct ieee80211_rx_status *rxs,
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bool decrypt_error)
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{
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struct ath_hw *ah = common->ah;
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struct ieee80211_hdr *hdr;
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int hdrlen, padpos, padsize;
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u8 keyix;
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__le16 fc;
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/* see if any padding is done by the hw and remove it */
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hdr = (struct ieee80211_hdr *) skb->data;
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hdrlen = ieee80211_get_hdrlen_from_skb(skb);
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fc = hdr->frame_control;
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padpos = ieee80211_hdrlen(fc);
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/* The MAC header is padded to have 32-bit boundary if the
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* packet payload is non-zero. The general calculation for
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* padsize would take into account odd header lengths:
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* padsize = (4 - padpos % 4) % 4; However, since only
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* even-length headers are used, padding can only be 0 or 2
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* bytes and we can optimize this a bit. In addition, we must
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* not try to remove padding from short control frames that do
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* not have payload. */
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padsize = padpos & 3;
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if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
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memmove(skb->data + padsize, skb->data, padpos);
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skb_pull(skb, padsize);
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2024-09-09 08:52:07 +00:00
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}
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2024-09-09 08:57:42 +00:00
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keyix = rx_stats->rs_keyix;
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if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
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ieee80211_has_protected(fc)) {
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rxs->flag |= RX_FLAG_DECRYPTED;
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} else if (ieee80211_has_protected(fc)
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&& !decrypt_error && skb->len >= hdrlen + 4) {
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keyix = skb->data[hdrlen + 3] >> 6;
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if (test_bit(keyix, common->keymap))
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rxs->flag |= RX_FLAG_DECRYPTED;
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2024-09-09 08:52:07 +00:00
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}
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2024-09-09 08:57:42 +00:00
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if (ah->sw_mgmt_crypto &&
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(rxs->flag & RX_FLAG_DECRYPTED) &&
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ieee80211_is_mgmt(fc))
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/* Use software decrypt for management frames. */
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rxs->flag &= ~RX_FLAG_DECRYPTED;
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}
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EXPORT_SYMBOL(ath9k_cmn_rx_skb_postprocess);
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int ath9k_cmn_process_rate(struct ath_common *common,
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struct ieee80211_hw *hw,
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struct ath_rx_status *rx_stats,
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struct ieee80211_rx_status *rxs)
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{
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struct ieee80211_supported_band *sband;
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enum ieee80211_band band;
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unsigned int i = 0;
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struct ath_hw *ah = common->ah;
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band = ah->curchan->chan->band;
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sband = hw->wiphy->bands[band];
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if (IS_CHAN_QUARTER_RATE(ah->curchan))
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rxs->flag |= RX_FLAG_5MHZ;
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else if (IS_CHAN_HALF_RATE(ah->curchan))
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rxs->flag |= RX_FLAG_10MHZ;
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2024-09-09 08:52:07 +00:00
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2024-09-09 08:57:42 +00:00
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if (rx_stats->rs_rate & 0x80) {
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/* HT rate */
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rxs->flag |= RX_FLAG_HT;
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rxs->flag |= rx_stats->flag;
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rxs->rate_idx = rx_stats->rs_rate & 0x7f;
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return 0;
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}
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for (i = 0; i < sband->n_bitrates; i++) {
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if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
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rxs->rate_idx = i;
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return 0;
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}
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if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
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rxs->flag |= RX_FLAG_SHORTPRE;
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rxs->rate_idx = i;
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return 0;
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}
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}
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return -EINVAL;
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2024-09-09 08:52:07 +00:00
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}
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2024-09-09 08:57:42 +00:00
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EXPORT_SYMBOL(ath9k_cmn_process_rate);
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void ath9k_cmn_process_rssi(struct ath_common *common,
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struct ieee80211_hw *hw,
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struct ath_rx_status *rx_stats,
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struct ieee80211_rx_status *rxs)
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{
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struct ath_hw *ah = common->ah;
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int last_rssi;
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int rssi = rx_stats->rs_rssi;
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int i, j;
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/*
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* RSSI is not available for subframes in an A-MPDU.
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*/
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if (rx_stats->rs_moreaggr) {
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rxs->flag |= RX_FLAG_NO_SIGNAL_VAL;
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return;
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}
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/*
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* Check if the RSSI for the last subframe in an A-MPDU
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* or an unaggregated frame is valid.
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*/
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if (rx_stats->rs_rssi == ATH9K_RSSI_BAD) {
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rxs->flag |= RX_FLAG_NO_SIGNAL_VAL;
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return;
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}
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for (i = 0, j = 0; i < ARRAY_SIZE(rx_stats->rs_rssi_ctl); i++) {
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s8 rssi;
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if (!(ah->rxchainmask & BIT(i)))
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continue;
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rssi = rx_stats->rs_rssi_ctl[i];
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if (rssi != ATH9K_RSSI_BAD) {
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rxs->chains |= BIT(j);
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rxs->chain_signal[j] = ah->noise + rssi;
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}
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j++;
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}
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/*
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* Update Beacon RSSI, this is used by ANI.
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*/
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if (rx_stats->is_mybeacon &&
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((ah->opmode == NL80211_IFTYPE_STATION) ||
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(ah->opmode == NL80211_IFTYPE_ADHOC))) {
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ATH_RSSI_LPF(common->last_rssi, rx_stats->rs_rssi);
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last_rssi = common->last_rssi;
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if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
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rssi = ATH_EP_RND(last_rssi, ATH_RSSI_EP_MULTIPLIER);
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if (rssi < 0)
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rssi = 0;
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ah->stats.avgbrssi = rssi;
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}
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rxs->signal = ah->noise + rx_stats->rs_rssi;
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}
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EXPORT_SYMBOL(ath9k_cmn_process_rssi);
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2024-09-09 08:52:07 +00:00
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int ath9k_cmn_get_hw_crypto_keytype(struct sk_buff *skb)
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{
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
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if (tx_info->control.hw_key) {
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switch (tx_info->control.hw_key->cipher) {
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case WLAN_CIPHER_SUITE_WEP40:
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case WLAN_CIPHER_SUITE_WEP104:
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return ATH9K_KEY_TYPE_WEP;
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case WLAN_CIPHER_SUITE_TKIP:
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return ATH9K_KEY_TYPE_TKIP;
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case WLAN_CIPHER_SUITE_CCMP:
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return ATH9K_KEY_TYPE_AES;
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default:
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break;
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}
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}
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return ATH9K_KEY_TYPE_CLEAR;
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}
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EXPORT_SYMBOL(ath9k_cmn_get_hw_crypto_keytype);
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/*
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* Update internal channel flags.
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*/
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2024-09-09 08:57:42 +00:00
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static void ath9k_cmn_update_ichannel(struct ath9k_channel *ichan,
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struct cfg80211_chan_def *chandef)
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2024-09-09 08:52:07 +00:00
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{
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2024-09-09 08:57:42 +00:00
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struct ieee80211_channel *chan = chandef->chan;
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u16 flags = 0;
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2024-09-09 08:52:07 +00:00
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ichan->channel = chan->center_freq;
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ichan->chan = chan;
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2024-09-09 08:57:42 +00:00
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if (chan->band == IEEE80211_BAND_5GHZ)
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flags |= CHANNEL_5GHZ;
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switch (chandef->width) {
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case NL80211_CHAN_WIDTH_5:
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flags |= CHANNEL_QUARTER;
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break;
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case NL80211_CHAN_WIDTH_10:
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flags |= CHANNEL_HALF;
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break;
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case NL80211_CHAN_WIDTH_20_NOHT:
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break;
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case NL80211_CHAN_WIDTH_20:
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flags |= CHANNEL_HT;
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break;
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case NL80211_CHAN_WIDTH_40:
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if (chandef->center_freq1 > chandef->chan->center_freq)
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flags |= CHANNEL_HT40PLUS | CHANNEL_HT;
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else
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flags |= CHANNEL_HT40MINUS | CHANNEL_HT;
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break;
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default:
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WARN_ON(1);
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2024-09-09 08:52:07 +00:00
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}
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2024-09-09 08:57:42 +00:00
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ichan->channelFlags = flags;
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2024-09-09 08:52:07 +00:00
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}
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/*
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* Get the internal channel reference.
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*/
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2024-09-09 08:57:42 +00:00
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struct ath9k_channel *ath9k_cmn_get_channel(struct ieee80211_hw *hw,
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struct ath_hw *ah,
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struct cfg80211_chan_def *chandef)
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2024-09-09 08:52:07 +00:00
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|
|
{
|
2024-09-09 08:57:42 +00:00
|
|
|
struct ieee80211_channel *curchan = chandef->chan;
|
2024-09-09 08:52:07 +00:00
|
|
|
struct ath9k_channel *channel;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
channel = &ah->channels[curchan->hw_value];
|
|
|
|
ath9k_cmn_update_ichannel(channel, chandef);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
return channel;
|
|
|
|
}
|
2024-09-09 08:57:42 +00:00
|
|
|
EXPORT_SYMBOL(ath9k_cmn_get_channel);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
int ath9k_cmn_count_streams(unsigned int chainmask, int max)
|
|
|
|
{
|
|
|
|
int streams = 0;
|
|
|
|
|
|
|
|
do {
|
|
|
|
if (++streams == max)
|
|
|
|
break;
|
|
|
|
} while ((chainmask = chainmask & (chainmask - 1)));
|
|
|
|
|
|
|
|
return streams;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(ath9k_cmn_count_streams);
|
|
|
|
|
|
|
|
void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
|
|
|
|
u16 new_txpow, u16 *txpower)
|
|
|
|
{
|
|
|
|
struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (reg->power_limit != new_txpow)
|
2024-09-09 08:52:07 +00:00
|
|
|
ath9k_hw_set_txpowerlimit(ah, new_txpow, false);
|
2024-09-09 08:57:42 +00:00
|
|
|
|
|
|
|
/* read back in case value is clamped */
|
|
|
|
*txpower = reg->max_power_level;
|
2024-09-09 08:52:07 +00:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(ath9k_cmn_update_txpow);
|
|
|
|
|
|
|
|
void ath9k_cmn_init_crypto(struct ath_hw *ah)
|
|
|
|
{
|
|
|
|
struct ath_common *common = ath9k_hw_common(ah);
|
|
|
|
int i = 0;
|
|
|
|
|
|
|
|
/* Get the hardware key cache size. */
|
|
|
|
common->keymax = AR_KEYTABLE_SIZE;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check whether the separate key cache entries
|
|
|
|
* are required to handle both tx+rx MIC keys.
|
|
|
|
* With split mic keys the number of stations is limited
|
|
|
|
* to 27 otherwise 59.
|
|
|
|
*/
|
|
|
|
if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
|
|
|
|
common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Reset the key cache since some parts do not
|
|
|
|
* reset the contents on initial power up.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < common->keymax; i++)
|
|
|
|
ath_hw_keyreset(common, (u16) i);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(ath9k_cmn_init_crypto);
|
|
|
|
|
|
|
|
static int __init ath9k_cmn_init(void)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
module_init(ath9k_cmn_init);
|
|
|
|
|
|
|
|
static void __exit ath9k_cmn_exit(void)
|
|
|
|
{
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
module_exit(ath9k_cmn_exit);
|