2024-09-09 08:52:07 +00:00
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/*
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* Driver for the ov9650 sensor
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*
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* Copyright (C) 2008 Erik Andrén
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* Copyright (C) 2007 Ilyes Gouta. Based on the m5603x Linux Driver Project.
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* Copyright (C) 2005 m5603x Linux Driver Project <m5602@x3ng.com.br>
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*
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* Portions of code to USB interface and ALi driver software,
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* Copyright (c) 2006 Willem Duinker
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* v4l2 interface modeled after the V4L2 driver
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* for SN9C10x PC Camera Controllers
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation, version 2.
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*
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include "m5602_ov9650.h"
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2024-09-09 08:57:42 +00:00
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static int ov9650_s_ctrl(struct v4l2_ctrl *ctrl);
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static void ov9650_dump_registers(struct sd *sd);
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2024-09-09 08:52:07 +00:00
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/* Vertically and horizontally flips the image if matched, needed for machines
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where the sensor is mounted upside down */
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static
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const
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struct dmi_system_id ov9650_flip_dmi_table[] = {
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{
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.ident = "ASUS A6Ja",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "A6J")
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}
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},
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{
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.ident = "ASUS A6JC",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "A6JC")
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}
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},
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{
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.ident = "ASUS A6K",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "A6K")
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}
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},
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{
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.ident = "ASUS A6Kt",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "A6Kt")
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}
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},
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{
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.ident = "ASUS A6VA",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "A6VA")
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}
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},
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{
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.ident = "ASUS A6VC",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "A6VC")
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}
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},
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{
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.ident = "ASUS A6VM",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "A6VM")
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}
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},
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{
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.ident = "ASUS A7V",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "A7V")
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}
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},
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{
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.ident = "Alienware Aurora m9700",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "alienware"),
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DMI_MATCH(DMI_PRODUCT_NAME, "Aurora m9700")
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}
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},
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{}
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};
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static struct v4l2_pix_format ov9650_modes[] = {
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{
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176,
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144,
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V4L2_PIX_FMT_SBGGR8,
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V4L2_FIELD_NONE,
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.sizeimage =
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176 * 144,
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.bytesperline = 176,
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.colorspace = V4L2_COLORSPACE_SRGB,
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.priv = 9
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}, {
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320,
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240,
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V4L2_PIX_FMT_SBGGR8,
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V4L2_FIELD_NONE,
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.sizeimage =
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320 * 240,
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.bytesperline = 320,
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.colorspace = V4L2_COLORSPACE_SRGB,
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.priv = 8
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}, {
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352,
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288,
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V4L2_PIX_FMT_SBGGR8,
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V4L2_FIELD_NONE,
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.sizeimage =
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352 * 288,
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.bytesperline = 352,
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.colorspace = V4L2_COLORSPACE_SRGB,
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.priv = 9
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}, {
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640,
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480,
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V4L2_PIX_FMT_SBGGR8,
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V4L2_FIELD_NONE,
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.sizeimage =
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640 * 480,
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.bytesperline = 640,
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.colorspace = V4L2_COLORSPACE_SRGB,
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.priv = 9
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}
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};
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2024-09-09 08:57:42 +00:00
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static const struct v4l2_ctrl_ops ov9650_ctrl_ops = {
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.s_ctrl = ov9650_s_ctrl,
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};
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2024-09-09 08:52:07 +00:00
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int ov9650_probe(struct sd *sd)
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{
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int err = 0;
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u8 prod_id = 0, ver_id = 0, i;
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2024-09-09 08:57:42 +00:00
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struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
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2024-09-09 08:52:07 +00:00
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if (force_sensor) {
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if (force_sensor == OV9650_SENSOR) {
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pr_info("Forcing an %s sensor\n", ov9650.name);
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goto sensor_found;
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}
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/* If we want to force another sensor,
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don't try to probe this one */
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return -ENODEV;
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}
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PDEBUG(D_PROBE, "Probing for an ov9650 sensor");
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/* Run the pre-init before probing the sensor */
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for (i = 0; i < ARRAY_SIZE(preinit_ov9650) && !err; i++) {
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u8 data = preinit_ov9650[i][2];
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if (preinit_ov9650[i][0] == SENSOR)
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err = m5602_write_sensor(sd,
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preinit_ov9650[i][1], &data, 1);
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else
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err = m5602_write_bridge(sd,
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preinit_ov9650[i][1], data);
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}
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if (err < 0)
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return err;
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if (m5602_read_sensor(sd, OV9650_PID, &prod_id, 1))
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return -ENODEV;
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if (m5602_read_sensor(sd, OV9650_VER, &ver_id, 1))
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return -ENODEV;
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if ((prod_id == 0x96) && (ver_id == 0x52)) {
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pr_info("Detected an ov9650 sensor\n");
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goto sensor_found;
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}
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return -ENODEV;
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sensor_found:
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sd->gspca_dev.cam.cam_mode = ov9650_modes;
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sd->gspca_dev.cam.nmodes = ARRAY_SIZE(ov9650_modes);
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return 0;
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}
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int ov9650_init(struct sd *sd)
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{
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int i, err = 0;
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u8 data;
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if (dump_sensor)
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ov9650_dump_registers(sd);
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for (i = 0; i < ARRAY_SIZE(init_ov9650) && !err; i++) {
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data = init_ov9650[i][2];
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if (init_ov9650[i][0] == SENSOR)
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err = m5602_write_sensor(sd, init_ov9650[i][1],
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&data, 1);
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else
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err = m5602_write_bridge(sd, init_ov9650[i][1], data);
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}
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2024-09-09 08:57:42 +00:00
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return 0;
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}
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2024-09-09 08:52:07 +00:00
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2024-09-09 08:57:42 +00:00
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int ov9650_init_controls(struct sd *sd)
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{
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struct v4l2_ctrl_handler *hdl = &sd->gspca_dev.ctrl_handler;
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sd->gspca_dev.vdev.ctrl_handler = hdl;
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v4l2_ctrl_handler_init(hdl, 9);
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sd->auto_white_bal = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops,
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V4L2_CID_AUTO_WHITE_BALANCE,
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0, 1, 1, 1);
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sd->red_bal = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops,
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V4L2_CID_RED_BALANCE, 0, 255, 1,
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RED_GAIN_DEFAULT);
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sd->blue_bal = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops,
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V4L2_CID_BLUE_BALANCE, 0, 255, 1,
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BLUE_GAIN_DEFAULT);
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sd->autoexpo = v4l2_ctrl_new_std_menu(hdl, &ov9650_ctrl_ops,
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V4L2_CID_EXPOSURE_AUTO, 1, 0, V4L2_EXPOSURE_AUTO);
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sd->expo = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops, V4L2_CID_EXPOSURE,
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0, 0x1ff, 4, EXPOSURE_DEFAULT);
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sd->autogain = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops,
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V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
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sd->gain = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops, V4L2_CID_GAIN, 0,
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0x3ff, 1, GAIN_DEFAULT);
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sd->hflip = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops, V4L2_CID_HFLIP,
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0, 1, 1, 0);
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sd->vflip = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops, V4L2_CID_VFLIP,
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0, 1, 1, 0);
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if (hdl->error) {
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pr_err("Could not initialize controls\n");
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return hdl->error;
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}
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2024-09-09 08:52:07 +00:00
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2024-09-09 08:57:42 +00:00
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v4l2_ctrl_auto_cluster(3, &sd->auto_white_bal, 0, false);
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v4l2_ctrl_auto_cluster(2, &sd->autoexpo, 0, false);
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v4l2_ctrl_auto_cluster(2, &sd->autogain, 0, false);
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v4l2_ctrl_cluster(2, &sd->hflip);
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2024-09-09 08:52:07 +00:00
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2024-09-09 08:57:42 +00:00
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return 0;
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2024-09-09 08:52:07 +00:00
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}
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int ov9650_start(struct sd *sd)
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{
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u8 data;
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int i, err = 0;
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struct cam *cam = &sd->gspca_dev.cam;
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int width = cam->cam_mode[sd->gspca_dev.curr_mode].width;
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int height = cam->cam_mode[sd->gspca_dev.curr_mode].height;
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int ver_offs = cam->cam_mode[sd->gspca_dev.curr_mode].priv;
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int hor_offs = OV9650_LEFT_OFFSET;
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2024-09-09 08:57:42 +00:00
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struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
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2024-09-09 08:52:07 +00:00
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if ((!dmi_check_system(ov9650_flip_dmi_table) &&
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2024-09-09 08:57:42 +00:00
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sd->vflip->val) ||
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2024-09-09 08:52:07 +00:00
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(dmi_check_system(ov9650_flip_dmi_table) &&
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2024-09-09 08:57:42 +00:00
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!sd->vflip->val))
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2024-09-09 08:52:07 +00:00
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ver_offs--;
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if (width <= 320)
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hor_offs /= 2;
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/* Synthesize the vsync/hsync setup */
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for (i = 0; i < ARRAY_SIZE(res_init_ov9650) && !err; i++) {
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if (res_init_ov9650[i][0] == BRIDGE)
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err = m5602_write_bridge(sd, res_init_ov9650[i][1],
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res_init_ov9650[i][2]);
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else if (res_init_ov9650[i][0] == SENSOR) {
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data = res_init_ov9650[i][2];
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err = m5602_write_sensor(sd,
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res_init_ov9650[i][1], &data, 1);
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}
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}
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if (err < 0)
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return err;
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err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA,
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((ver_offs >> 8) & 0xff));
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if (err < 0)
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return err;
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err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (ver_offs & 0xff));
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if (err < 0)
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return err;
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err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, 0);
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if (err < 0)
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return err;
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err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (height >> 8) & 0xff);
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if (err < 0)
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return err;
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err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (height & 0xff));
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if (err < 0)
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return err;
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for (i = 0; i < 2 && !err; i++)
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err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, 0);
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if (err < 0)
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return err;
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err = m5602_write_bridge(sd, M5602_XB_SIG_INI, 0);
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if (err < 0)
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return err;
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err = m5602_write_bridge(sd, M5602_XB_SIG_INI, 2);
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if (err < 0)
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return err;
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err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA,
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(hor_offs >> 8) & 0xff);
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if (err < 0)
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return err;
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err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA, hor_offs & 0xff);
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if (err < 0)
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|
|
|
return err;
|
|
|
|
|
|
|
|
err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA,
|
|
|
|
((width + hor_offs) >> 8) & 0xff);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA,
|
|
|
|
((width + hor_offs) & 0xff));
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
err = m5602_write_bridge(sd, M5602_XB_SIG_INI, 0);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
switch (width) {
|
|
|
|
case 640:
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Configuring camera for VGA mode");
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
data = OV9650_VGA_SELECT | OV9650_RGB_SELECT |
|
|
|
|
OV9650_RAW_RGB_SELECT;
|
|
|
|
err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 352:
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Configuring camera for CIF mode");
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
data = OV9650_CIF_SELECT | OV9650_RGB_SELECT |
|
|
|
|
OV9650_RAW_RGB_SELECT;
|
|
|
|
err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 320:
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Configuring camera for QVGA mode");
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
data = OV9650_QVGA_SELECT | OV9650_RGB_SELECT |
|
|
|
|
OV9650_RAW_RGB_SELECT;
|
|
|
|
err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 176:
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Configuring camera for QCIF mode");
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
data = OV9650_QCIF_SELECT | OV9650_RGB_SELECT |
|
|
|
|
OV9650_RAW_RGB_SELECT;
|
|
|
|
err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
int ov9650_stop(struct sd *sd)
|
|
|
|
{
|
|
|
|
u8 data = OV9650_SOFT_SLEEP | OV9650_OUTPUT_DRIVE_2X;
|
|
|
|
return m5602_write_sensor(sd, OV9650_COM2, &data, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
void ov9650_disconnect(struct sd *sd)
|
|
|
|
{
|
|
|
|
ov9650_stop(sd);
|
|
|
|
|
|
|
|
sd->sensor = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ov9650_set_exposure(struct gspca_dev *gspca_dev, __s32 val)
|
|
|
|
{
|
|
|
|
struct sd *sd = (struct sd *) gspca_dev;
|
|
|
|
u8 i2c_data;
|
|
|
|
int err;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Set exposure to %d", val);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
/* The 6 MSBs */
|
|
|
|
i2c_data = (val >> 10) & 0x3f;
|
|
|
|
err = m5602_write_sensor(sd, OV9650_AECHM,
|
|
|
|
&i2c_data, 1);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
/* The 8 middle bits */
|
|
|
|
i2c_data = (val >> 2) & 0xff;
|
|
|
|
err = m5602_write_sensor(sd, OV9650_AECH,
|
|
|
|
&i2c_data, 1);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
/* The 2 LSBs */
|
|
|
|
i2c_data = val & 0x03;
|
|
|
|
err = m5602_write_sensor(sd, OV9650_COM1, &i2c_data, 1);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ov9650_set_gain(struct gspca_dev *gspca_dev, __s32 val)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
u8 i2c_data;
|
|
|
|
struct sd *sd = (struct sd *) gspca_dev;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Setting gain to %d", val);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
/* The 2 MSB */
|
|
|
|
/* Read the OV9650_VREF register first to avoid
|
|
|
|
corrupting the VREF high and low bits */
|
|
|
|
err = m5602_read_sensor(sd, OV9650_VREF, &i2c_data, 1);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
/* Mask away all uninteresting bits */
|
|
|
|
i2c_data = ((val & 0x0300) >> 2) |
|
|
|
|
(i2c_data & 0x3f);
|
|
|
|
err = m5602_write_sensor(sd, OV9650_VREF, &i2c_data, 1);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
/* The 8 LSBs */
|
|
|
|
i2c_data = val & 0xff;
|
|
|
|
err = m5602_write_sensor(sd, OV9650_GAIN, &i2c_data, 1);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ov9650_set_red_balance(struct gspca_dev *gspca_dev, __s32 val)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
u8 i2c_data;
|
|
|
|
struct sd *sd = (struct sd *) gspca_dev;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Set red gain to %d", val);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
i2c_data = val & 0xff;
|
|
|
|
err = m5602_write_sensor(sd, OV9650_RED, &i2c_data, 1);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ov9650_set_blue_balance(struct gspca_dev *gspca_dev, __s32 val)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
u8 i2c_data;
|
|
|
|
struct sd *sd = (struct sd *) gspca_dev;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Set blue gain to %d", val);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
i2c_data = val & 0xff;
|
|
|
|
err = m5602_write_sensor(sd, OV9650_BLUE, &i2c_data, 1);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
static int ov9650_set_hvflip(struct gspca_dev *gspca_dev)
|
2024-09-09 08:52:07 +00:00
|
|
|
{
|
|
|
|
int err;
|
|
|
|
u8 i2c_data;
|
|
|
|
struct sd *sd = (struct sd *) gspca_dev;
|
2024-09-09 08:57:42 +00:00
|
|
|
int hflip = sd->hflip->val;
|
|
|
|
int vflip = sd->vflip->val;
|
2024-09-09 08:52:07 +00:00
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Set hvflip to %d %d", hflip, vflip);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
if (dmi_check_system(ov9650_flip_dmi_table))
|
2024-09-09 08:57:42 +00:00
|
|
|
vflip = !vflip;
|
2024-09-09 08:52:07 +00:00
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
i2c_data = (hflip << 5) | (vflip << 4);
|
2024-09-09 08:52:07 +00:00
|
|
|
err = m5602_write_sensor(sd, OV9650_MVFP, &i2c_data, 1);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
/* When vflip is toggled we need to readjust the bridge hsync/vsync */
|
|
|
|
if (gspca_dev->streaming)
|
|
|
|
err = ov9650_start(sd);
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ov9650_set_auto_exposure(struct gspca_dev *gspca_dev,
|
|
|
|
__s32 val)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
u8 i2c_data;
|
|
|
|
struct sd *sd = (struct sd *) gspca_dev;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Set auto exposure control to %d", val);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
val = (val == V4L2_EXPOSURE_AUTO);
|
2024-09-09 08:52:07 +00:00
|
|
|
i2c_data = ((i2c_data & 0xfe) | ((val & 0x01) << 0));
|
|
|
|
|
|
|
|
return m5602_write_sensor(sd, OV9650_COM8, &i2c_data, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ov9650_set_auto_white_balance(struct gspca_dev *gspca_dev,
|
|
|
|
__s32 val)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
u8 i2c_data;
|
|
|
|
struct sd *sd = (struct sd *) gspca_dev;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Set auto white balance to %d", val);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
i2c_data = ((i2c_data & 0xfd) | ((val & 0x01) << 1));
|
|
|
|
err = m5602_write_sensor(sd, OV9650_COM8, &i2c_data, 1);
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ov9650_set_auto_gain(struct gspca_dev *gspca_dev, __s32 val)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
u8 i2c_data;
|
|
|
|
struct sd *sd = (struct sd *) gspca_dev;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
PDEBUG(D_CONF, "Set auto gain control to %d", val);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
i2c_data = ((i2c_data & 0xfb) | ((val & 0x01) << 2));
|
|
|
|
|
|
|
|
return m5602_write_sensor(sd, OV9650_COM8, &i2c_data, 1);
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
static int ov9650_s_ctrl(struct v4l2_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct gspca_dev *gspca_dev =
|
|
|
|
container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
|
|
|
|
struct sd *sd = (struct sd *) gspca_dev;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
if (!gspca_dev->streaming)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
switch (ctrl->id) {
|
|
|
|
case V4L2_CID_AUTO_WHITE_BALANCE:
|
|
|
|
err = ov9650_set_auto_white_balance(gspca_dev, ctrl->val);
|
|
|
|
if (err || ctrl->val)
|
|
|
|
return err;
|
|
|
|
err = ov9650_set_red_balance(gspca_dev, sd->red_bal->val);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
err = ov9650_set_blue_balance(gspca_dev, sd->blue_bal->val);
|
|
|
|
break;
|
|
|
|
case V4L2_CID_EXPOSURE_AUTO:
|
|
|
|
err = ov9650_set_auto_exposure(gspca_dev, ctrl->val);
|
|
|
|
if (err || ctrl->val == V4L2_EXPOSURE_AUTO)
|
|
|
|
return err;
|
|
|
|
err = ov9650_set_exposure(gspca_dev, sd->expo->val);
|
|
|
|
break;
|
|
|
|
case V4L2_CID_AUTOGAIN:
|
|
|
|
err = ov9650_set_auto_gain(gspca_dev, ctrl->val);
|
|
|
|
if (err || ctrl->val)
|
|
|
|
return err;
|
|
|
|
err = ov9650_set_gain(gspca_dev, sd->gain->val);
|
|
|
|
break;
|
|
|
|
case V4L2_CID_HFLIP:
|
|
|
|
err = ov9650_set_hvflip(gspca_dev);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
static void ov9650_dump_registers(struct sd *sd)
|
|
|
|
{
|
|
|
|
int address;
|
|
|
|
pr_info("Dumping the ov9650 register state\n");
|
|
|
|
for (address = 0; address < 0xa9; address++) {
|
|
|
|
u8 value;
|
|
|
|
m5602_read_sensor(sd, address, &value, 1);
|
|
|
|
pr_info("register 0x%x contains 0x%x\n", address, value);
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_info("ov9650 register state dump complete\n");
|
|
|
|
|
|
|
|
pr_info("Probing for which registers that are read/write\n");
|
|
|
|
for (address = 0; address < 0xff; address++) {
|
|
|
|
u8 old_value, ctrl_value;
|
|
|
|
u8 test_value[2] = {0xff, 0xff};
|
|
|
|
|
|
|
|
m5602_read_sensor(sd, address, &old_value, 1);
|
|
|
|
m5602_write_sensor(sd, address, test_value, 1);
|
|
|
|
m5602_read_sensor(sd, address, &ctrl_value, 1);
|
|
|
|
|
|
|
|
if (ctrl_value == test_value[0])
|
|
|
|
pr_info("register 0x%x is writeable\n", address);
|
|
|
|
else
|
|
|
|
pr_info("register 0x%x is read only\n", address);
|
|
|
|
|
|
|
|
/* Restore original value */
|
|
|
|
m5602_write_sensor(sd, address, &old_value, 1);
|
|
|
|
}
|
|
|
|
}
|