2024-09-09 08:52:07 +00:00
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/*
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* psr.h: This file holds the macros for masking off various parts of
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* the processor status register on the Sparc. This is valid
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* for Version 8. On the V9 this is renamed to the PSTATE
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* register and its members are accessed as fields like
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* PSTATE.PRIV for the current CPU privilege level.
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*
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* Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
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*/
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#ifndef __LINUX_SPARC_PSR_H
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#define __LINUX_SPARC_PSR_H
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2024-09-09 08:57:42 +00:00
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#include <uapi/asm/psr.h>
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2024-09-09 08:52:07 +00:00
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#ifndef __ASSEMBLY__
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/* Get the %psr register. */
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static inline unsigned int get_psr(void)
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{
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unsigned int psr;
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__asm__ __volatile__(
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"rd %%psr, %0\n\t"
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"nop\n\t"
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"nop\n\t"
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"nop\n\t"
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: "=r" (psr)
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: /* no inputs */
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: "memory");
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return psr;
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}
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static inline void put_psr(unsigned int new_psr)
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{
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__asm__ __volatile__(
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"wr %0, 0x0, %%psr\n\t"
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"nop\n\t"
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"nop\n\t"
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"nop\n\t"
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: /* no outputs */
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: "r" (new_psr)
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: "memory", "cc");
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}
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/* Get the %fsr register. Be careful, make sure the floating point
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* enable bit is set in the %psr when you execute this or you will
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* incur a trap.
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*/
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extern unsigned int fsr_storage;
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static inline unsigned int get_fsr(void)
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{
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unsigned int fsr = 0;
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__asm__ __volatile__(
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"st %%fsr, %1\n\t"
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"ld %1, %0\n\t"
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: "=r" (fsr)
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: "m" (fsr_storage));
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return fsr;
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}
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#endif /* !(__ASSEMBLY__) */
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#endif /* !(__LINUX_SPARC_PSR_H) */
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