521 lines
15 KiB
C
521 lines
15 KiB
C
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* KVM/MIPS: Deliver/Emulate exceptions to the guest kernel
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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* Authors: Sanjay Lal <sanjayl@kymasys.com>
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*/
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/vmalloc.h>
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#include <linux/kvm_host.h>
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#include "opcode.h"
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#include "interrupt.h"
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static gpa_t kvm_trap_emul_gva_to_gpa_cb(gva_t gva)
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{
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gpa_t gpa;
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uint32_t kseg = KSEGX(gva);
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if ((kseg == CKSEG0) || (kseg == CKSEG1))
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gpa = CPHYSADDR(gva);
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else {
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kvm_err("%s: cannot find GPA for GVA: %#lx\n", __func__, gva);
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kvm_mips_dump_host_tlbs();
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gpa = KVM_INVALID_ADDR;
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}
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kvm_debug("%s: gva %#lx, gpa: %#llx\n", __func__, gva, gpa);
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return gpa;
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}
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static int kvm_trap_emul_handle_cop_unusable(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
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unsigned long cause = vcpu->arch.host_cp0_cause;
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enum emulation_result er = EMULATE_DONE;
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int ret = RESUME_GUEST;
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if (((cause & CAUSEF_CE) >> CAUSEB_CE) == 1)
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er = kvm_mips_emulate_fpu_exc(cause, opc, run, vcpu);
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else
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er = kvm_mips_emulate_inst(cause, opc, run, vcpu);
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switch (er) {
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case EMULATE_DONE:
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ret = RESUME_GUEST;
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break;
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case EMULATE_FAIL:
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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break;
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case EMULATE_WAIT:
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run->exit_reason = KVM_EXIT_INTR;
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ret = RESUME_HOST;
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break;
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default:
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BUG();
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}
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return ret;
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}
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static int kvm_trap_emul_handle_tlb_mod(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
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unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
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unsigned long cause = vcpu->arch.host_cp0_cause;
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enum emulation_result er = EMULATE_DONE;
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int ret = RESUME_GUEST;
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if (KVM_GUEST_KSEGX(badvaddr) < KVM_GUEST_KSEG0
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|| KVM_GUEST_KSEGX(badvaddr) == KVM_GUEST_KSEG23) {
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kvm_debug("USER/KSEG23 ADDR TLB MOD fault: cause %#lx, PC: %p, BadVaddr: %#lx\n",
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cause, opc, badvaddr);
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er = kvm_mips_handle_tlbmod(cause, opc, run, vcpu);
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if (er == EMULATE_DONE)
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ret = RESUME_GUEST;
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else {
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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} else if (KVM_GUEST_KSEGX(badvaddr) == KVM_GUEST_KSEG0) {
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/*
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* XXXKYMA: The guest kernel does not expect to get this fault
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* when we are not using HIGHMEM. Need to address this in a
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* HIGHMEM kernel
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*/
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kvm_err("TLB MOD fault not handled, cause %#lx, PC: %p, BadVaddr: %#lx\n",
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cause, opc, badvaddr);
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kvm_mips_dump_host_tlbs();
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kvm_arch_vcpu_dump_regs(vcpu);
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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} else {
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kvm_err("Illegal TLB Mod fault address , cause %#lx, PC: %p, BadVaddr: %#lx\n",
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cause, opc, badvaddr);
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kvm_mips_dump_host_tlbs();
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kvm_arch_vcpu_dump_regs(vcpu);
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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return ret;
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}
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static int kvm_trap_emul_handle_tlb_st_miss(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
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unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
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unsigned long cause = vcpu->arch.host_cp0_cause;
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enum emulation_result er = EMULATE_DONE;
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int ret = RESUME_GUEST;
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if (((badvaddr & PAGE_MASK) == KVM_GUEST_COMMPAGE_ADDR)
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&& KVM_GUEST_KERNEL_MODE(vcpu)) {
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if (kvm_mips_handle_commpage_tlb_fault(badvaddr, vcpu) < 0) {
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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} else if (KVM_GUEST_KSEGX(badvaddr) < KVM_GUEST_KSEG0
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|| KVM_GUEST_KSEGX(badvaddr) == KVM_GUEST_KSEG23) {
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kvm_debug("USER ADDR TLB LD fault: cause %#lx, PC: %p, BadVaddr: %#lx\n",
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cause, opc, badvaddr);
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er = kvm_mips_handle_tlbmiss(cause, opc, run, vcpu);
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if (er == EMULATE_DONE)
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ret = RESUME_GUEST;
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else {
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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} else if (KVM_GUEST_KSEGX(badvaddr) == KVM_GUEST_KSEG0) {
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/*
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* All KSEG0 faults are handled by KVM, as the guest kernel does
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* not expect to ever get them
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*/
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if (kvm_mips_handle_kseg0_tlb_fault
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(vcpu->arch.host_cp0_badvaddr, vcpu) < 0) {
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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} else {
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kvm_err("Illegal TLB LD fault address , cause %#lx, PC: %p, BadVaddr: %#lx\n",
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cause, opc, badvaddr);
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kvm_mips_dump_host_tlbs();
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kvm_arch_vcpu_dump_regs(vcpu);
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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return ret;
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}
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static int kvm_trap_emul_handle_tlb_ld_miss(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
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unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
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unsigned long cause = vcpu->arch.host_cp0_cause;
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enum emulation_result er = EMULATE_DONE;
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int ret = RESUME_GUEST;
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if (((badvaddr & PAGE_MASK) == KVM_GUEST_COMMPAGE_ADDR)
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&& KVM_GUEST_KERNEL_MODE(vcpu)) {
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if (kvm_mips_handle_commpage_tlb_fault(badvaddr, vcpu) < 0) {
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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} else if (KVM_GUEST_KSEGX(badvaddr) < KVM_GUEST_KSEG0
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|| KVM_GUEST_KSEGX(badvaddr) == KVM_GUEST_KSEG23) {
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kvm_debug("USER ADDR TLB ST fault: PC: %#lx, BadVaddr: %#lx\n",
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vcpu->arch.pc, badvaddr);
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/*
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* User Address (UA) fault, this could happen if
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* (1) TLB entry not present/valid in both Guest and shadow host
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* TLBs, in this case we pass on the fault to the guest
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* kernel and let it handle it.
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* (2) TLB entry is present in the Guest TLB but not in the
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* shadow, in this case we inject the TLB from the Guest TLB
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* into the shadow host TLB
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*/
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er = kvm_mips_handle_tlbmiss(cause, opc, run, vcpu);
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if (er == EMULATE_DONE)
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ret = RESUME_GUEST;
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else {
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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} else if (KVM_GUEST_KSEGX(badvaddr) == KVM_GUEST_KSEG0) {
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if (kvm_mips_handle_kseg0_tlb_fault
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(vcpu->arch.host_cp0_badvaddr, vcpu) < 0) {
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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} else {
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kvm_err("Illegal TLB ST fault address , cause %#lx, PC: %p, BadVaddr: %#lx\n",
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cause, opc, badvaddr);
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kvm_mips_dump_host_tlbs();
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kvm_arch_vcpu_dump_regs(vcpu);
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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return ret;
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}
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static int kvm_trap_emul_handle_addr_err_st(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
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unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
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unsigned long cause = vcpu->arch.host_cp0_cause;
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enum emulation_result er = EMULATE_DONE;
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int ret = RESUME_GUEST;
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if (KVM_GUEST_KERNEL_MODE(vcpu)
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&& (KSEGX(badvaddr) == CKSEG0 || KSEGX(badvaddr) == CKSEG1)) {
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kvm_debug("Emulate Store to MMIO space\n");
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er = kvm_mips_emulate_inst(cause, opc, run, vcpu);
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if (er == EMULATE_FAIL) {
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kvm_err("Emulate Store to MMIO space failed\n");
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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} else {
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run->exit_reason = KVM_EXIT_MMIO;
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ret = RESUME_HOST;
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}
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} else {
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kvm_err("Address Error (STORE): cause %#lx, PC: %p, BadVaddr: %#lx\n",
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cause, opc, badvaddr);
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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return ret;
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}
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static int kvm_trap_emul_handle_addr_err_ld(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
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unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
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unsigned long cause = vcpu->arch.host_cp0_cause;
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enum emulation_result er = EMULATE_DONE;
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int ret = RESUME_GUEST;
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if (KSEGX(badvaddr) == CKSEG0 || KSEGX(badvaddr) == CKSEG1) {
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kvm_debug("Emulate Load from MMIO space @ %#lx\n", badvaddr);
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er = kvm_mips_emulate_inst(cause, opc, run, vcpu);
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if (er == EMULATE_FAIL) {
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kvm_err("Emulate Load from MMIO space failed\n");
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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} else {
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run->exit_reason = KVM_EXIT_MMIO;
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ret = RESUME_HOST;
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}
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} else {
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kvm_err("Address Error (LOAD): cause %#lx, PC: %p, BadVaddr: %#lx\n",
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cause, opc, badvaddr);
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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er = EMULATE_FAIL;
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}
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return ret;
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}
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static int kvm_trap_emul_handle_syscall(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
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unsigned long cause = vcpu->arch.host_cp0_cause;
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enum emulation_result er = EMULATE_DONE;
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int ret = RESUME_GUEST;
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er = kvm_mips_emulate_syscall(cause, opc, run, vcpu);
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if (er == EMULATE_DONE)
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ret = RESUME_GUEST;
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else {
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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return ret;
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}
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static int kvm_trap_emul_handle_res_inst(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
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unsigned long cause = vcpu->arch.host_cp0_cause;
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enum emulation_result er = EMULATE_DONE;
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int ret = RESUME_GUEST;
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er = kvm_mips_handle_ri(cause, opc, run, vcpu);
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if (er == EMULATE_DONE)
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ret = RESUME_GUEST;
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else {
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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ret = RESUME_HOST;
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}
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return ret;
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}
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static int kvm_trap_emul_handle_break(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
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unsigned long cause = vcpu->arch.host_cp0_cause;
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enum emulation_result er = EMULATE_DONE;
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int ret = RESUME_GUEST;
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|
||
|
|
er = kvm_mips_emulate_bp_exc(cause, opc, run, vcpu);
|
||
|
|
if (er == EMULATE_DONE)
|
||
|
|
ret = RESUME_GUEST;
|
||
|
|
else {
|
||
|
|
run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
|
||
|
|
ret = RESUME_HOST;
|
||
|
|
}
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int kvm_trap_emul_handle_msa_disabled(struct kvm_vcpu *vcpu)
|
||
|
|
{
|
||
|
|
struct kvm_run *run = vcpu->run;
|
||
|
|
uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
|
||
|
|
unsigned long cause = vcpu->arch.host_cp0_cause;
|
||
|
|
enum emulation_result er = EMULATE_DONE;
|
||
|
|
int ret = RESUME_GUEST;
|
||
|
|
|
||
|
|
/* No MSA supported in guest, guest reserved instruction exception */
|
||
|
|
er = kvm_mips_emulate_ri_exc(cause, opc, run, vcpu);
|
||
|
|
|
||
|
|
switch (er) {
|
||
|
|
case EMULATE_DONE:
|
||
|
|
ret = RESUME_GUEST;
|
||
|
|
break;
|
||
|
|
|
||
|
|
case EMULATE_FAIL:
|
||
|
|
run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
|
||
|
|
ret = RESUME_HOST;
|
||
|
|
break;
|
||
|
|
|
||
|
|
default:
|
||
|
|
BUG();
|
||
|
|
}
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int kvm_trap_emul_vm_init(struct kvm *kvm)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int kvm_trap_emul_vcpu_init(struct kvm_vcpu *vcpu)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int kvm_trap_emul_vcpu_setup(struct kvm_vcpu *vcpu)
|
||
|
|
{
|
||
|
|
struct mips_coproc *cop0 = vcpu->arch.cop0;
|
||
|
|
uint32_t config1;
|
||
|
|
int vcpu_id = vcpu->vcpu_id;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Arch specific stuff, set up config registers properly so that the
|
||
|
|
* guest will come up as expected, for now we simulate a MIPS 24kc
|
||
|
|
*/
|
||
|
|
kvm_write_c0_guest_prid(cop0, 0x00019300);
|
||
|
|
kvm_write_c0_guest_config(cop0,
|
||
|
|
MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
|
||
|
|
(MMU_TYPE_R4000 << CP0C0_MT));
|
||
|
|
|
||
|
|
/* Read the cache characteristics from the host Config1 Register */
|
||
|
|
config1 = (read_c0_config1() & ~0x7f);
|
||
|
|
|
||
|
|
/* Set up MMU size */
|
||
|
|
config1 &= ~(0x3f << 25);
|
||
|
|
config1 |= ((KVM_MIPS_GUEST_TLB_SIZE - 1) << 25);
|
||
|
|
|
||
|
|
/* We unset some bits that we aren't emulating */
|
||
|
|
config1 &=
|
||
|
|
~((1 << CP0C1_C2) | (1 << CP0C1_MD) | (1 << CP0C1_PC) |
|
||
|
|
(1 << CP0C1_WR) | (1 << CP0C1_CA));
|
||
|
|
kvm_write_c0_guest_config1(cop0, config1);
|
||
|
|
|
||
|
|
kvm_write_c0_guest_config2(cop0, MIPS_CONFIG2);
|
||
|
|
/* MIPS_CONFIG2 | (read_c0_config2() & 0xfff) */
|
||
|
|
kvm_write_c0_guest_config3(cop0, MIPS_CONFIG3 | (0 << CP0C3_VInt) |
|
||
|
|
(1 << CP0C3_ULRI));
|
||
|
|
|
||
|
|
/* Set Wait IE/IXMT Ignore in Config7, IAR, AR */
|
||
|
|
kvm_write_c0_guest_config7(cop0, (MIPS_CONF7_WII) | (1 << 10));
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Setup IntCtl defaults, compatibilty mode for timer interrupts (HW5)
|
||
|
|
*/
|
||
|
|
kvm_write_c0_guest_intctl(cop0, 0xFC000000);
|
||
|
|
|
||
|
|
/* Put in vcpu id as CPUNum into Ebase Reg to handle SMP Guests */
|
||
|
|
kvm_write_c0_guest_ebase(cop0, KVM_GUEST_KSEG0 | (vcpu_id & 0xFF));
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int kvm_trap_emul_get_one_reg(struct kvm_vcpu *vcpu,
|
||
|
|
const struct kvm_one_reg *reg,
|
||
|
|
s64 *v)
|
||
|
|
{
|
||
|
|
switch (reg->id) {
|
||
|
|
case KVM_REG_MIPS_CP0_COUNT:
|
||
|
|
*v = kvm_mips_read_count(vcpu);
|
||
|
|
break;
|
||
|
|
case KVM_REG_MIPS_COUNT_CTL:
|
||
|
|
*v = vcpu->arch.count_ctl;
|
||
|
|
break;
|
||
|
|
case KVM_REG_MIPS_COUNT_RESUME:
|
||
|
|
*v = ktime_to_ns(vcpu->arch.count_resume);
|
||
|
|
break;
|
||
|
|
case KVM_REG_MIPS_COUNT_HZ:
|
||
|
|
*v = vcpu->arch.count_hz;
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int kvm_trap_emul_set_one_reg(struct kvm_vcpu *vcpu,
|
||
|
|
const struct kvm_one_reg *reg,
|
||
|
|
s64 v)
|
||
|
|
{
|
||
|
|
struct mips_coproc *cop0 = vcpu->arch.cop0;
|
||
|
|
int ret = 0;
|
||
|
|
|
||
|
|
switch (reg->id) {
|
||
|
|
case KVM_REG_MIPS_CP0_COUNT:
|
||
|
|
kvm_mips_write_count(vcpu, v);
|
||
|
|
break;
|
||
|
|
case KVM_REG_MIPS_CP0_COMPARE:
|
||
|
|
kvm_mips_write_compare(vcpu, v);
|
||
|
|
break;
|
||
|
|
case KVM_REG_MIPS_CP0_CAUSE:
|
||
|
|
/*
|
||
|
|
* If the timer is stopped or started (DC bit) it must look
|
||
|
|
* atomic with changes to the interrupt pending bits (TI, IRQ5).
|
||
|
|
* A timer interrupt should not happen in between.
|
||
|
|
*/
|
||
|
|
if ((kvm_read_c0_guest_cause(cop0) ^ v) & CAUSEF_DC) {
|
||
|
|
if (v & CAUSEF_DC) {
|
||
|
|
/* disable timer first */
|
||
|
|
kvm_mips_count_disable_cause(vcpu);
|
||
|
|
kvm_change_c0_guest_cause(cop0, ~CAUSEF_DC, v);
|
||
|
|
} else {
|
||
|
|
/* enable timer last */
|
||
|
|
kvm_change_c0_guest_cause(cop0, ~CAUSEF_DC, v);
|
||
|
|
kvm_mips_count_enable_cause(vcpu);
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
kvm_write_c0_guest_cause(cop0, v);
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
case KVM_REG_MIPS_COUNT_CTL:
|
||
|
|
ret = kvm_mips_set_count_ctl(vcpu, v);
|
||
|
|
break;
|
||
|
|
case KVM_REG_MIPS_COUNT_RESUME:
|
||
|
|
ret = kvm_mips_set_count_resume(vcpu, v);
|
||
|
|
break;
|
||
|
|
case KVM_REG_MIPS_COUNT_HZ:
|
||
|
|
ret = kvm_mips_set_count_hz(vcpu, v);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct kvm_mips_callbacks kvm_trap_emul_callbacks = {
|
||
|
|
/* exit handlers */
|
||
|
|
.handle_cop_unusable = kvm_trap_emul_handle_cop_unusable,
|
||
|
|
.handle_tlb_mod = kvm_trap_emul_handle_tlb_mod,
|
||
|
|
.handle_tlb_st_miss = kvm_trap_emul_handle_tlb_st_miss,
|
||
|
|
.handle_tlb_ld_miss = kvm_trap_emul_handle_tlb_ld_miss,
|
||
|
|
.handle_addr_err_st = kvm_trap_emul_handle_addr_err_st,
|
||
|
|
.handle_addr_err_ld = kvm_trap_emul_handle_addr_err_ld,
|
||
|
|
.handle_syscall = kvm_trap_emul_handle_syscall,
|
||
|
|
.handle_res_inst = kvm_trap_emul_handle_res_inst,
|
||
|
|
.handle_break = kvm_trap_emul_handle_break,
|
||
|
|
.handle_msa_disabled = kvm_trap_emul_handle_msa_disabled,
|
||
|
|
|
||
|
|
.vm_init = kvm_trap_emul_vm_init,
|
||
|
|
.vcpu_init = kvm_trap_emul_vcpu_init,
|
||
|
|
.vcpu_setup = kvm_trap_emul_vcpu_setup,
|
||
|
|
.gva_to_gpa = kvm_trap_emul_gva_to_gpa_cb,
|
||
|
|
.queue_timer_int = kvm_mips_queue_timer_int_cb,
|
||
|
|
.dequeue_timer_int = kvm_mips_dequeue_timer_int_cb,
|
||
|
|
.queue_io_int = kvm_mips_queue_io_int_cb,
|
||
|
|
.dequeue_io_int = kvm_mips_dequeue_io_int_cb,
|
||
|
|
.irq_deliver = kvm_mips_irq_deliver_cb,
|
||
|
|
.irq_clear = kvm_mips_irq_clear_cb,
|
||
|
|
.get_one_reg = kvm_trap_emul_get_one_reg,
|
||
|
|
.set_one_reg = kvm_trap_emul_set_one_reg,
|
||
|
|
};
|
||
|
|
|
||
|
|
int kvm_mips_emulation_init(struct kvm_mips_callbacks **install_callbacks)
|
||
|
|
{
|
||
|
|
*install_callbacks = &kvm_trap_emul_callbacks;
|
||
|
|
return 0;
|
||
|
|
}
|