272 lines
6.9 KiB
C
272 lines
6.9 KiB
C
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#ifndef _ASM_NATIVE_PVCHK_INST_H
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#define _ASM_NATIVE_PVCHK_INST_H
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/******************************************************************************
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* arch/ia64/include/asm/native/pvchk_inst.h
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* Checker for paravirtualizations of privileged operations.
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*
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* Copyright (C) 2005 Hewlett-Packard Co
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* Dan Magenheimer <dan.magenheimer@hp.com>
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*
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* Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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/**********************************************
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* Instructions paravirtualized for correctness
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**********************************************/
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/* "fc" and "thash" are privilege-sensitive instructions, meaning they
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* may have different semantics depending on whether they are executed
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* at PL0 vs PL!=0. When paravirtualized, these instructions mustn't
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* be allowed to execute directly, lest incorrect semantics result.
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*/
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#define fc .error "fc should not be used directly."
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#define thash .error "thash should not be used directly."
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/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
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* is not currently used (though it may be in a long-format VHPT system!)
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* and the semantics of cover only change if psr.ic is off which is very
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* rare (and currently non-existent outside of assembly code
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*/
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#define ttag .error "ttag should not be used directly."
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#define cover .error "cover should not be used directly."
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/* There are also privilege-sensitive registers. These registers are
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* readable at any privilege level but only writable at PL0.
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*/
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#define cpuid .error "cpuid should not be used directly."
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#define pmd .error "pmd should not be used directly."
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/*
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* mov ar.eflag =
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* mov = ar.eflag
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*/
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/**********************************************
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* Instructions paravirtualized for performance
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**********************************************/
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/*
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* Those instructions include '.' which can't be handled by cpp.
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* or can't be handled by cpp easily.
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* They are handled by sed instead of cpp.
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*/
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/* for .S
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* itc.i
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* itc.d
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*
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* bsw.0
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* bsw.1
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*
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* ssm psr.ic | PSR_DEFAULT_BITS
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* ssm psr.ic
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* rsm psr.ic
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* ssm psr.i
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* rsm psr.i
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* rsm psr.i | psr.ic
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* rsm psr.dt
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* ssm psr.dt
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*
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* mov = cr.ifa
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* mov = cr.itir
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* mov = cr.isr
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* mov = cr.iha
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* mov = cr.ipsr
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* mov = cr.iim
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* mov = cr.iip
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* mov = cr.ivr
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* mov = psr
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*
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* mov cr.ifa =
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* mov cr.itir =
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* mov cr.iha =
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* mov cr.ipsr =
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* mov cr.ifs =
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* mov cr.iip =
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* mov cr.kr =
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*/
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/* for intrinsics
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* ssm psr.i
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* rsm psr.i
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* mov = psr
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* mov = ivr
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* mov = tpr
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* mov cr.itm =
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* mov eoi =
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* mov rr[] =
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* mov = rr[]
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* mov = kr
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* mov kr =
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* ptc.ga
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*/
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/*************************************************************
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* define paravirtualized instrcution macros as nop to ingore.
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* and check whether arguments are appropriate.
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*************************************************************/
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/* check whether reg is a regular register */
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.macro is_rreg_in reg
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.ifc "\reg", "r0"
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nop 0
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.exitm
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.endif
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;;
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mov \reg = r0
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;;
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.endm
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#define IS_RREG_IN(reg) is_rreg_in reg ;
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#define IS_RREG_OUT(reg) \
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;; \
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mov reg = r0 \
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;;
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#define IS_RREG_CLOB(reg) IS_RREG_OUT(reg)
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/* check whether pred is a predicate register */
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#define IS_PRED_IN(pred) \
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;; \
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(pred) nop 0 \
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;;
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#define IS_PRED_OUT(pred) \
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;; \
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cmp.eq pred, p0 = r0, r0 \
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;;
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#define IS_PRED_CLOB(pred) IS_PRED_OUT(pred)
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#define DO_SAVE_MIN(__COVER, SAVE_IFS, EXTRA, WORKAROUND) \
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nop 0
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#define MOV_FROM_IFA(reg) \
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IS_RREG_OUT(reg)
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#define MOV_FROM_ITIR(reg) \
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IS_RREG_OUT(reg)
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#define MOV_FROM_ISR(reg) \
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IS_RREG_OUT(reg)
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#define MOV_FROM_IHA(reg) \
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IS_RREG_OUT(reg)
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#define MOV_FROM_IPSR(pred, reg) \
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IS_PRED_IN(pred) \
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IS_RREG_OUT(reg)
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#define MOV_FROM_IIM(reg) \
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IS_RREG_OUT(reg)
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#define MOV_FROM_IIP(reg) \
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IS_RREG_OUT(reg)
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#define MOV_FROM_IVR(reg, clob) \
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IS_RREG_OUT(reg) \
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IS_RREG_CLOB(clob)
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#define MOV_FROM_PSR(pred, reg, clob) \
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IS_PRED_IN(pred) \
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IS_RREG_OUT(reg) \
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IS_RREG_CLOB(clob)
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#define MOV_FROM_ITC(pred, pred_clob, reg, clob) \
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IS_PRED_IN(pred) \
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IS_PRED_CLOB(pred_clob) \
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IS_RREG_OUT(reg) \
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IS_RREG_CLOB(clob)
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#define MOV_TO_IFA(reg, clob) \
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IS_RREG_IN(reg) \
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IS_RREG_CLOB(clob)
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#define MOV_TO_ITIR(pred, reg, clob) \
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IS_PRED_IN(pred) \
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IS_RREG_IN(reg) \
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IS_RREG_CLOB(clob)
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#define MOV_TO_IHA(pred, reg, clob) \
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IS_PRED_IN(pred) \
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IS_RREG_IN(reg) \
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IS_RREG_CLOB(clob)
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#define MOV_TO_IPSR(pred, reg, clob) \
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IS_PRED_IN(pred) \
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IS_RREG_IN(reg) \
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IS_RREG_CLOB(clob)
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#define MOV_TO_IFS(pred, reg, clob) \
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IS_PRED_IN(pred) \
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IS_RREG_IN(reg) \
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IS_RREG_CLOB(clob)
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#define MOV_TO_IIP(reg, clob) \
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IS_RREG_IN(reg) \
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IS_RREG_CLOB(clob)
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#define MOV_TO_KR(kr, reg, clob0, clob1) \
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IS_RREG_IN(reg) \
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IS_RREG_CLOB(clob0) \
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IS_RREG_CLOB(clob1)
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#define ITC_I(pred, reg, clob) \
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IS_PRED_IN(pred) \
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IS_RREG_IN(reg) \
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IS_RREG_CLOB(clob)
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#define ITC_D(pred, reg, clob) \
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IS_PRED_IN(pred) \
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IS_RREG_IN(reg) \
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IS_RREG_CLOB(clob)
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#define ITC_I_AND_D(pred_i, pred_d, reg, clob) \
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IS_PRED_IN(pred_i) \
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IS_PRED_IN(pred_d) \
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IS_RREG_IN(reg) \
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IS_RREG_CLOB(clob)
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#define THASH(pred, reg0, reg1, clob) \
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IS_PRED_IN(pred) \
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IS_RREG_OUT(reg0) \
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IS_RREG_IN(reg1) \
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IS_RREG_CLOB(clob)
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#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \
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IS_RREG_CLOB(clob0) \
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IS_RREG_CLOB(clob1)
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#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \
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IS_RREG_CLOB(clob0) \
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IS_RREG_CLOB(clob1)
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#define RSM_PSR_IC(clob) \
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IS_RREG_CLOB(clob)
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#define SSM_PSR_I(pred, pred_clob, clob) \
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IS_PRED_IN(pred) \
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IS_PRED_CLOB(pred_clob) \
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IS_RREG_CLOB(clob)
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#define RSM_PSR_I(pred, clob0, clob1) \
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IS_PRED_IN(pred) \
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IS_RREG_CLOB(clob0) \
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IS_RREG_CLOB(clob1)
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#define RSM_PSR_I_IC(clob0, clob1, clob2) \
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IS_RREG_CLOB(clob0) \
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IS_RREG_CLOB(clob1) \
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IS_RREG_CLOB(clob2)
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#define RSM_PSR_DT \
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nop 0
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#define RSM_PSR_BE_I(clob0, clob1) \
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IS_RREG_CLOB(clob0) \
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IS_RREG_CLOB(clob1)
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#define SSM_PSR_DT_AND_SRLZ_I \
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nop 0
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#define BSW_0(clob0, clob1, clob2) \
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IS_RREG_CLOB(clob0) \
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IS_RREG_CLOB(clob1) \
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IS_RREG_CLOB(clob2)
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#define BSW_1(clob0, clob1) \
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IS_RREG_CLOB(clob0) \
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IS_RREG_CLOB(clob1)
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#define COVER \
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nop 0
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#define RFI \
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br.ret.sptk.many rp /* defining nop causes dependency error */
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#endif /* _ASM_NATIVE_PVCHK_INST_H */
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