2024-09-09 08:52:07 +00:00
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/*
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* linux/arch/arm/mach-omap2/board-n8x0.c
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*
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* Copyright (C) 2005-2009 Nokia Corporation
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* Author: Juha Yrjola <juha.yrjola@nokia.com>
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*
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* Modified from mach-omap2/board-generic.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/io.h>
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2024-09-09 08:57:42 +00:00
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#include <linux/irq.h>
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2024-09-09 08:52:07 +00:00
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#include <linux/stddef.h>
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#include <linux/i2c.h>
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#include <linux/spi/spi.h>
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#include <linux/usb/musb.h>
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2024-09-09 08:57:42 +00:00
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <linux/platform_data/mtd-onenand-omap2.h>
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#include <linux/mfd/menelaus.h>
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2024-09-09 08:52:07 +00:00
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#include <sound/tlv320aic3x.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include "common.h"
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2024-09-09 08:57:42 +00:00
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#include "mmc.h"
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#include "soc.h"
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#include "gpmc-onenand.h"
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#include "common-board-devices.h"
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2024-09-09 08:52:07 +00:00
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#define TUSB6010_ASYNC_CS 1
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#define TUSB6010_SYNC_CS 4
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#define TUSB6010_GPIO_INT 58
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#define TUSB6010_GPIO_ENABLE 0
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#define TUSB6010_DMACHAN 0x3f
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2024-09-09 08:57:42 +00:00
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#define NOKIA_N810_WIMAX (1 << 2)
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#define NOKIA_N810 (1 << 1)
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#define NOKIA_N800 (1 << 0)
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static u32 board_caps;
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#define board_is_n800() (board_caps & NOKIA_N800)
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#define board_is_n810() (board_caps & NOKIA_N810)
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#define board_is_n810_wimax() (board_caps & NOKIA_N810_WIMAX)
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static void board_check_revision(void)
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{
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if (of_have_populated_dt()) {
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if (of_machine_is_compatible("nokia,n800"))
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board_caps = NOKIA_N800;
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else if (of_machine_is_compatible("nokia,n810"))
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board_caps = NOKIA_N810;
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else if (of_machine_is_compatible("nokia,n810-wimax"))
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board_caps = NOKIA_N810_WIMAX;
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}
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if (!board_caps)
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pr_err("Unknown board\n");
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}
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2024-09-09 08:52:07 +00:00
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#if defined(CONFIG_USB_MUSB_TUSB6010) || defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
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/*
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* Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
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* 1.5 V voltage regulators of PM companion chip. Companion chip will then
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* provide then PGOOD signal to TUSB6010 which will release it from reset.
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*/
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static int tusb_set_power(int state)
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{
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int i, retval = 0;
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if (state) {
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gpio_set_value(TUSB6010_GPIO_ENABLE, 1);
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msleep(1);
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/* Wait until TUSB6010 pulls INT pin down */
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i = 100;
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while (i && gpio_get_value(TUSB6010_GPIO_INT)) {
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msleep(1);
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i--;
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}
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if (!i) {
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printk(KERN_ERR "tusb: powerup failed\n");
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retval = -ENODEV;
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}
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} else {
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gpio_set_value(TUSB6010_GPIO_ENABLE, 0);
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msleep(10);
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}
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return retval;
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}
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static struct musb_hdrc_config musb_config = {
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.multipoint = 1,
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.dyn_fifo = 1,
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.num_eps = 16,
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.ram_bits = 12,
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};
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static struct musb_hdrc_platform_data tusb_data = {
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.mode = MUSB_OTG,
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.set_power = tusb_set_power,
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.min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */
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.power = 100, /* Max 100 mA VBUS for host mode */
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.config = &musb_config,
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};
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static void __init n8x0_usb_init(void)
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{
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int ret = 0;
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static char announce[] __initdata = KERN_INFO "TUSB 6010\n";
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/* PM companion chip power control pin */
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ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW,
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"TUSB6010 enable");
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if (ret != 0) {
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printk(KERN_ERR "Could not get TUSB power GPIO%i\n",
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TUSB6010_GPIO_ENABLE);
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return;
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}
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tusb_set_power(0);
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ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
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TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
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TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
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if (ret != 0)
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goto err;
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printk(announce);
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return;
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err:
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gpio_free(TUSB6010_GPIO_ENABLE);
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}
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#else
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static void __init n8x0_usb_init(void) {}
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#endif /*CONFIG_USB_MUSB_TUSB6010 */
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static struct omap2_mcspi_device_config p54spi_mcspi_config = {
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.turbo_mode = 0,
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};
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static struct spi_board_info n800_spi_board_info[] __initdata = {
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{
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.modalias = "p54spi",
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.bus_num = 2,
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.chip_select = 0,
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.max_speed_hz = 48000000,
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.controller_data = &p54spi_mcspi_config,
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},
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};
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#if defined(CONFIG_MENELAUS) && \
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(defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE))
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/*
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* On both N800 and N810, only the first of the two MMC controllers is in use.
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* The two MMC slots are multiplexed via Menelaus companion chip over I2C.
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* On N800, both slots are powered via Menelaus. On N810, only one of the
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* slots is powered via Menelaus. The N810 EMMC is powered via GPIO.
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*
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* VMMC slot 1 on both N800 and N810
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* VDCDC3_APE and VMCS2_APE slot 2 on N800
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* GPIO23 and GPIO9 slot 2 EMMC on N810
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*
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*/
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#define N8X0_SLOT_SWITCH_GPIO 96
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#define N810_EMMC_VSD_GPIO 23
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#define N810_EMMC_VIO_GPIO 9
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static int slot1_cover_open;
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static int slot2_cover_open;
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static struct device *mmc_device;
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static int n8x0_mmc_switch_slot(struct device *dev, int slot)
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{
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#ifdef CONFIG_MMC_DEBUG
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dev_dbg(dev, "Choose slot %d\n", slot + 1);
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#endif
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gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot);
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return 0;
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}
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static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,
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int power_on, int vdd)
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{
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int mV;
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#ifdef CONFIG_MMC_DEBUG
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dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
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power_on ? "on" : "off", vdd);
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#endif
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if (slot == 0) {
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if (!power_on)
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return menelaus_set_vmmc(0);
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switch (1 << vdd) {
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case MMC_VDD_33_34:
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case MMC_VDD_32_33:
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case MMC_VDD_31_32:
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mV = 3100;
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break;
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case MMC_VDD_30_31:
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mV = 3000;
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break;
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case MMC_VDD_28_29:
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mV = 2800;
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break;
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case MMC_VDD_165_195:
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mV = 1850;
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break;
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default:
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BUG();
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}
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return menelaus_set_vmmc(mV);
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} else {
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if (!power_on)
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return menelaus_set_vdcdc(3, 0);
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switch (1 << vdd) {
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case MMC_VDD_33_34:
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case MMC_VDD_32_33:
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mV = 3300;
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break;
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case MMC_VDD_30_31:
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case MMC_VDD_29_30:
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mV = 3000;
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break;
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case MMC_VDD_28_29:
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case MMC_VDD_27_28:
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mV = 2800;
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break;
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case MMC_VDD_24_25:
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case MMC_VDD_23_24:
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mV = 2400;
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break;
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case MMC_VDD_22_23:
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case MMC_VDD_21_22:
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mV = 2200;
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break;
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case MMC_VDD_20_21:
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mV = 2000;
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break;
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case MMC_VDD_165_195:
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mV = 1800;
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break;
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default:
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BUG();
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}
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return menelaus_set_vdcdc(3, mV);
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}
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return 0;
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}
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static void n810_set_power_emmc(struct device *dev,
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int power_on)
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{
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dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off");
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if (power_on) {
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gpio_set_value(N810_EMMC_VSD_GPIO, 1);
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msleep(1);
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gpio_set_value(N810_EMMC_VIO_GPIO, 1);
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msleep(1);
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} else {
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gpio_set_value(N810_EMMC_VIO_GPIO, 0);
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msleep(50);
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gpio_set_value(N810_EMMC_VSD_GPIO, 0);
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msleep(50);
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}
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}
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static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on,
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int vdd)
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{
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2024-09-09 08:57:42 +00:00
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if (board_is_n800() || slot == 0)
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2024-09-09 08:52:07 +00:00
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return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd);
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n810_set_power_emmc(dev, power_on);
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return 0;
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}
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static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
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{
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int r;
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dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1,
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bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
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BUG_ON(slot != 0 && slot != 1);
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slot++;
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switch (bus_mode) {
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case MMC_BUSMODE_OPENDRAIN:
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r = menelaus_set_mmc_opendrain(slot, 1);
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break;
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case MMC_BUSMODE_PUSHPULL:
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r = menelaus_set_mmc_opendrain(slot, 0);
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break;
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default:
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BUG();
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}
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if (r != 0 && printk_ratelimit())
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dev_err(dev, "MMC: unable to set bus mode for slot %d\n",
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slot);
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return r;
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}
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static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
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{
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slot++;
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BUG_ON(slot != 1 && slot != 2);
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if (slot == 1)
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return slot1_cover_open;
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else
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return slot2_cover_open;
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}
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static void n8x0_mmc_callback(void *data, u8 card_mask)
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{
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int bit, *openp, index;
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2024-09-09 08:57:42 +00:00
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if (board_is_n800()) {
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2024-09-09 08:52:07 +00:00
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bit = 1 << 1;
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openp = &slot2_cover_open;
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index = 1;
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} else {
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bit = 1;
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openp = &slot1_cover_open;
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index = 0;
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}
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if (card_mask & bit)
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*openp = 1;
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else
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*openp = 0;
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#ifdef CONFIG_MMC_OMAP
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omap_mmc_notify_cover_event(mmc_device, index, *openp);
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#else
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pr_warn("MMC: notify cover event not available\n");
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#endif
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}
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static int n8x0_mmc_late_init(struct device *dev)
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{
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int r, bit, *openp;
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int vs2sel;
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mmc_device = dev;
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r = menelaus_set_slot_sel(1);
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if (r < 0)
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return r;
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2024-09-09 08:57:42 +00:00
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if (board_is_n800())
|
2024-09-09 08:52:07 +00:00
|
|
|
vs2sel = 0;
|
|
|
|
else
|
|
|
|
vs2sel = 2;
|
|
|
|
|
|
|
|
r = menelaus_set_mmc_slot(2, 0, vs2sel, 1);
|
|
|
|
if (r < 0)
|
|
|
|
return r;
|
|
|
|
|
|
|
|
n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */
|
|
|
|
n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16);
|
|
|
|
|
|
|
|
r = menelaus_set_mmc_slot(1, 1, 0, 1);
|
|
|
|
if (r < 0)
|
|
|
|
return r;
|
|
|
|
r = menelaus_set_mmc_slot(2, 1, vs2sel, 1);
|
|
|
|
if (r < 0)
|
|
|
|
return r;
|
|
|
|
|
|
|
|
r = menelaus_get_slot_pin_states();
|
|
|
|
if (r < 0)
|
|
|
|
return r;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (board_is_n800()) {
|
2024-09-09 08:52:07 +00:00
|
|
|
bit = 1 << 1;
|
|
|
|
openp = &slot2_cover_open;
|
|
|
|
} else {
|
|
|
|
bit = 1;
|
|
|
|
openp = &slot1_cover_open;
|
|
|
|
slot2_cover_open = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* All slot pin bits seem to be inversed until first switch change */
|
|
|
|
if (r == 0xf || r == (0xf & ~bit))
|
|
|
|
r = ~r;
|
|
|
|
|
|
|
|
if (r & bit)
|
|
|
|
*openp = 1;
|
|
|
|
else
|
|
|
|
*openp = 0;
|
|
|
|
|
|
|
|
r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL);
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void n8x0_mmc_shutdown(struct device *dev)
|
|
|
|
{
|
|
|
|
int vs2sel;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (board_is_n800())
|
2024-09-09 08:52:07 +00:00
|
|
|
vs2sel = 0;
|
|
|
|
else
|
|
|
|
vs2sel = 2;
|
|
|
|
|
|
|
|
menelaus_set_mmc_slot(1, 0, 0, 0);
|
|
|
|
menelaus_set_mmc_slot(2, 0, vs2sel, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void n8x0_mmc_cleanup(struct device *dev)
|
|
|
|
{
|
|
|
|
menelaus_unregister_mmc_callback();
|
|
|
|
|
|
|
|
gpio_free(N8X0_SLOT_SWITCH_GPIO);
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (board_is_n810()) {
|
2024-09-09 08:52:07 +00:00
|
|
|
gpio_free(N810_EMMC_VSD_GPIO);
|
|
|
|
gpio_free(N810_EMMC_VIO_GPIO);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* MMC controller1 has two slots that are multiplexed via I2C.
|
|
|
|
* MMC controller2 is not in use.
|
|
|
|
*/
|
|
|
|
static struct omap_mmc_platform_data mmc1_data = {
|
2024-09-09 08:57:42 +00:00
|
|
|
.nr_slots = 0,
|
2024-09-09 08:52:07 +00:00
|
|
|
.switch_slot = n8x0_mmc_switch_slot,
|
|
|
|
.init = n8x0_mmc_late_init,
|
|
|
|
.cleanup = n8x0_mmc_cleanup,
|
|
|
|
.shutdown = n8x0_mmc_shutdown,
|
|
|
|
.max_freq = 24000000,
|
|
|
|
.slots[0] = {
|
|
|
|
.wires = 4,
|
|
|
|
.set_power = n8x0_mmc_set_power,
|
|
|
|
.set_bus_mode = n8x0_mmc_set_bus_mode,
|
|
|
|
.get_cover_state = n8x0_mmc_get_cover_state,
|
|
|
|
.ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 |
|
|
|
|
MMC_VDD_32_33 | MMC_VDD_33_34,
|
|
|
|
.name = "internal",
|
|
|
|
},
|
|
|
|
.slots[1] = {
|
|
|
|
.set_power = n8x0_mmc_set_power,
|
|
|
|
.set_bus_mode = n8x0_mmc_set_bus_mode,
|
|
|
|
.get_cover_state = n8x0_mmc_get_cover_state,
|
|
|
|
.ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 |
|
|
|
|
MMC_VDD_21_22 | MMC_VDD_22_23 |
|
|
|
|
MMC_VDD_23_24 | MMC_VDD_24_25 |
|
|
|
|
MMC_VDD_27_28 | MMC_VDD_28_29 |
|
|
|
|
MMC_VDD_29_30 | MMC_VDD_30_31 |
|
|
|
|
MMC_VDD_32_33 | MMC_VDD_33_34,
|
|
|
|
.name = "external",
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
|
|
|
|
|
|
|
|
static struct gpio n810_emmc_gpios[] __initdata = {
|
|
|
|
{ N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" },
|
|
|
|
{ N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" },
|
|
|
|
};
|
|
|
|
|
|
|
|
static void __init n8x0_mmc_init(void)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (board_is_n810()) {
|
2024-09-09 08:52:07 +00:00
|
|
|
mmc1_data.slots[0].name = "external";
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Some Samsung Movinand chips do not like open-ended
|
|
|
|
* multi-block reads and fall to braind-dead state
|
|
|
|
* while doing so. Reducing the number of blocks in
|
|
|
|
* the transfer or delays in clock disable do not help
|
|
|
|
*/
|
|
|
|
mmc1_data.slots[1].name = "internal";
|
|
|
|
mmc1_data.slots[1].ban_openended = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW,
|
|
|
|
"MMC slot switch");
|
|
|
|
if (err)
|
|
|
|
return;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (board_is_n810()) {
|
2024-09-09 08:52:07 +00:00
|
|
|
err = gpio_request_array(n810_emmc_gpios,
|
|
|
|
ARRAY_SIZE(n810_emmc_gpios));
|
|
|
|
if (err) {
|
|
|
|
gpio_free(N8X0_SLOT_SWITCH_GPIO);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
mmc1_data.nr_slots = 2;
|
2024-09-09 08:52:07 +00:00
|
|
|
mmc_data[0] = &mmc1_data;
|
|
|
|
}
|
|
|
|
#else
|
2024-09-09 08:57:42 +00:00
|
|
|
static struct omap_mmc_platform_data mmc1_data;
|
2024-09-09 08:52:07 +00:00
|
|
|
void __init n8x0_mmc_init(void)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_MMC_OMAP */
|
|
|
|
|
|
|
|
#ifdef CONFIG_MENELAUS
|
|
|
|
|
|
|
|
static int n8x0_auto_sleep_regulators(void)
|
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \
|
|
|
|
| EN_VAUX_SLEEP | EN_VIO_SLEEP \
|
|
|
|
| EN_VMEM_SLEEP | EN_DC3_SLEEP \
|
|
|
|
| EN_VC_SLEEP | EN_DC2_SLEEP;
|
|
|
|
|
|
|
|
ret = menelaus_set_regulator_sleep(1, val);
|
|
|
|
if (ret < 0) {
|
2024-09-09 08:57:42 +00:00
|
|
|
pr_err("Could not set regulators to sleep on menelaus: %u\n",
|
|
|
|
ret);
|
2024-09-09 08:52:07 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int n8x0_auto_voltage_scale(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = menelaus_set_vcore_hw(1400, 1050);
|
|
|
|
if (ret < 0) {
|
2024-09-09 08:57:42 +00:00
|
|
|
pr_err("Could not set VCORE voltage on menelaus: %u\n", ret);
|
2024-09-09 08:52:07 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int n8x0_menelaus_late_init(struct device *dev)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = n8x0_auto_voltage_scale();
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
ret = n8x0_auto_sleep_regulators();
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
static int n8x0_menelaus_late_init(struct device *dev)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
|
2024-09-09 08:52:07 +00:00
|
|
|
.late_init = n8x0_menelaus_late_init,
|
|
|
|
};
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
struct aic3x_pdata n810_aic33_data __initdata = {
|
2024-09-09 08:52:07 +00:00
|
|
|
.gpio_reset = 118,
|
|
|
|
};
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
static int __init n8x0_late_initcall(void)
|
2024-09-09 08:52:07 +00:00
|
|
|
{
|
2024-09-09 08:57:42 +00:00
|
|
|
if (!board_caps)
|
|
|
|
return -ENODEV;
|
2024-09-09 08:52:07 +00:00
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
n8x0_mmc_init();
|
|
|
|
n8x0_usb_init();
|
2024-09-09 08:52:07 +00:00
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
return 0;
|
2024-09-09 08:52:07 +00:00
|
|
|
}
|
2024-09-09 08:57:42 +00:00
|
|
|
omap_late_initcall(n8x0_late_initcall);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
/*
|
|
|
|
* Legacy init pdata init for n8x0. Note that we want to follow the
|
|
|
|
* I2C bus numbering starting at 0 for device tree like other omaps.
|
|
|
|
*/
|
|
|
|
void * __init n8x0_legacy_init(void)
|
2024-09-09 08:52:07 +00:00
|
|
|
{
|
2024-09-09 08:57:42 +00:00
|
|
|
board_check_revision();
|
2024-09-09 08:52:07 +00:00
|
|
|
spi_register_board_info(n800_spi_board_info,
|
|
|
|
ARRAY_SIZE(n800_spi_board_info));
|
2024-09-09 08:57:42 +00:00
|
|
|
return &mmc1_data;
|
2024-09-09 08:52:07 +00:00
|
|
|
}
|