2024-09-09 08:52:07 +00:00
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Qualcomm SPMI Controller (PMIC Arbiter)
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Required properties:
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- cell-index : the bus identifier.
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- compatible : should be "qcom,spmi-pmic-arb".
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- reg-names : should be "core", "intr", "cnfg"
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- reg : offset and length of the PMIC Arbiter Core register map.
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- reg : offset and length of the PMIC Arbiter Interrupt controller register map.
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- reg : offset and length of the PMIC Arbiter Configuration register map.
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- interrupts : the PMIC Arbiter interrupt.
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- qcom,pmic-arb-ee : the execution environment (EE) identifier.
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- qcom,pmic-arb-channel : the assigned channel number for channel registers.
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Optional properties:
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- qcom,not-wakeup : boolean property which indicates that SPMI PMIC interrupts
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should not be treated as wakeup sources
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2024-09-09 08:57:42 +00:00
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- reg-names : may have "chnls", "obsrvr"
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- reg : offset and length of the PMIC Arbiter Core Channels register map.
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- reg : offset and length of the PMIC Arbiter Core Observer Channels reg map.
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- qcom,pmic-arb-max-peripherals : the max supported peripheral channels on device
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- qcom,pmic-arb-max-periph-interrupts : the max supported peripheral channels
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interrupts on device
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- qcom,reserved-channel : channel number that this driver should not touch.
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Used only for v2 hw.
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2024-09-09 08:52:07 +00:00
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Example:
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qcom,spmi@fc4c0000 {
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cell-index = <0>;
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compatible = "qcom,spmi-pmic-arb";
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2024-09-09 08:57:42 +00:00
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reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
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reg = <0x200f000 0x1000>,
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<0x2400000 0x400000>,
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<0x2c00000 0x400000>,
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<0x3800000 0x200000>,
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<0x200a000 0x2100>;
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interrupts = <0 190 0>;
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2024-09-09 08:52:07 +00:00
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qcom,pmic-arb-ee = <0>;
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qcom,pmic-arb-channel = <0>;
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};
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