32 lines
1.1 KiB
Plaintext
32 lines
1.1 KiB
Plaintext
|
TI SOC based PWM Subsystem
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
- compatible: Must be "ti,am33xx-pwmss";
|
||
|
|
- reg: physical base address and size of the registers map.
|
||
|
|
- address-cells: Specify the number of u32 entries needed in child nodes.
|
||
|
|
Should set to 1.
|
||
|
|
- size-cells: specify number of u32 entries needed to specify child nodes size
|
||
|
|
in reg property. Should set to 1.
|
||
|
|
- ranges: describes the address mapping of a memory-mapped bus. Should set to
|
||
|
|
physical address map of child's base address, physical address within
|
||
|
|
parent's address space and length of the address map. For am33xx,
|
||
|
|
3 set of child register maps present, ECAP register space, EQEP
|
||
|
|
register space, EHRPWM register space.
|
||
|
|
|
||
|
|
Also child nodes should also populated under PWMSS DT node.
|
||
|
|
|
||
|
|
Example:
|
||
|
|
pwmss0: pwmss@48300000 {
|
||
|
|
compatible = "ti,am33xx-pwmss";
|
||
|
|
reg = <0x48300000 0x10>;
|
||
|
|
ti,hwmods = "epwmss0";
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
status = "disabled";
|
||
|
|
ranges = <0x48300100 0x48300100 0x80 /* ECAP */
|
||
|
|
0x48300180 0x48300180 0x80 /* EQEP */
|
||
|
|
0x48300200 0x48300200 0x80>; /* EHRPWM */
|
||
|
|
|
||
|
|
/* child nodes go here */
|
||
|
|
};
|