2024-09-09 08:52:07 +00:00
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Qualcomm Internet Packet Accelerator
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Internet Packet Accelerator (IPA) is a programmable protocol
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processor HW block. It is designed to support generic HW processing
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of UL/DL IP packets for various use cases independent of radio technology.
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Required properties:
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IPA node:
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- compatible : "qcom,ipa"
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- reg: Specifies the base physical addresses and the sizes of the IPA
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registers.
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- reg-names: "ipa-base" - string to identify the IPA CORE base registers.
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"bam-base" - string to identify the IPA BAM base registers.
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"a2-bam-base" - string to identify the A2 BAM base registers.
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- interrupts: Specifies the interrupt associated with IPA.
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- interrupt-names: "ipa-irq" - string to identify the IPA core interrupt.
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"bam-irq" - string to identify the IPA BAM interrupt.
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"a2-bam-irq" - string to identify the A2 BAM interrupt.
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- qcom,ipa-hw-ver: Specifies the IPA hardware version.
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2024-09-09 08:57:42 +00:00
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Optional:
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- qcom,wan-rx-ring-size: size of WAN rx ring, default is 32
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- qcom,arm-smmu: SMMU is present and ARM SMMU driver is used
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- qcom,msm-smmu: SMMU is present and QSMMU driver is used
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- ipa_smmu_ap: AP general purpose SMMU device
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compatible "qcom,ipa-smmu-ap-cb"
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- ipa_smmu_wlan: WDI SMMU device
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compatible "qcom,ipa-smmu-wlan-cb"
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- ipa_smmu_uc: uc SMMU device
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compatible "qcom,ipa-smmu-uc-cb"
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- qcom,smmu-disable-htw: boolean value to turn off SMMU page table caching
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- qcom,use-a2-service: determine if A2 service will be used
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- qcom,use-ipa-tethering-bridge: determine if tethering bridge will be used
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- qcom,use-ipa-bamdma-a2-bridge: determine if a2/ipa hw bridge will be used
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- qcom,ee: which EE is assigned to (non-secure) APPS from IPA-BAM POV. This
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is a number
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- qcom,ipa-hw-mode: IPA hardware mode - Normal, Virtual memory allocation,
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memory allocation over a PCIe bridge
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- qcom,msm-bus,name: String representing the client-name
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- qcom,msm-bus,num-cases: Total number of usecases
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- qcom,msm-bus,active-only: Boolean context flag for requests in active or
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dual (active & sleep) contex
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- qcom,msm-bus,num-paths: Total number of master-slave pairs
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- qcom,msm-bus,vectors-KBps: Arrays of unsigned integers representing:
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master-id, slave-id, arbitrated bandwidth
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in KBps, instantaneous bandwidth in KBps
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- qcom,ipa-bam-remote-mode: Boolean context flag to determine if ipa bam
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is in remote mode.
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- qcom,modem-cfg-emb-pipe-flt: Boolean context flag to determine if modem
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configures embedded pipe filtering rules
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- qcom,skip-uc-pipe-reset: Boolean context flag to indicate whether
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a pipe reset via the IPA uC is required
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- qcom,use-dma-zone: Boolean context flag to indicate whether memory
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allocations controlled by IPA driver that do not
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specify a struct device * should use GFP_DMA to
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workaround IPA HW limitations
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- qcom,use-gsi: Boolean context flag to indicate if the
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transport protocol is GSI
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- qcom,use-rg10-limitation-mitigation: Boolean context flag to activate
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the mitigation to register group 10
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AP access limitation
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- qcom,tethered-flow-control: Boolean context flag to indicate whether
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apps based flow control is needed for tethered
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call.
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2024-09-09 08:52:07 +00:00
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IPA pipe sub nodes (A2 static pipes configurations):
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-label: two labels are supported, a2-to-ipa and ipa-to-a2 which
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supply static configuration for A2-IPA connection.
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-qcom,src-bam-physical-address: The physical address of the source BAM
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-qcom,ipa-bam-mem-type:The memory type:
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0(Pipe memory), 1(Private memory), 2(System memory)
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-qcom,src-bam-pipe-index: Source pipe index
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-qcom,dst-bam-physical-address: The physical address of the
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destination BAM
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-qcom,dst-bam-pipe-index: Destination pipe index
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-qcom,data-fifo-offset: Data fifo base offset
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-qcom,data-fifo-size: Data fifo size (bytes)
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-qcom,descriptor-fifo-offset: Descriptor fifo base offset
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-qcom,descriptor-fifo-size: Descriptor fifo size (bytes)
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Optional properties:
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-qcom,ipa-pipe-mem: Specifies the base physical address and the
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size of the IPA pipe memory region.
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Pipe memory is a feature which may be supported by the
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target (HW platform). The Driver support using pipe
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memory instead of system memory. In case this property
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will not appear in the IPA DTS entry, the driver will
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use system memory.
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2024-09-09 08:57:42 +00:00
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- clocks: This property shall provide a list of entries each of which
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contains a phandle to clock controller device and a macro that is
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the clock's name in hardware.This should be "clock_rpm" as clock
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controller phandle and "clk_ipa_clk" as macro for "iface_clk"
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- clock-names: This property shall contain the clock input names used
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by driver in same order as the clocks property.This should be "iface_clk"
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2024-09-09 08:52:07 +00:00
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Example:
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qcom,ipa@fd4c0000 {
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compatible = "qcom,ipa";
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reg = <0xfd4c0000 0x26000>,
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<0xfd4c4000 0x14818>;
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<0xfc834000 0x7000>;
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reg-names = "ipa-base", "bam-base"; "a2-bam-base";
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interrupts = <0 252 0>,
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<0 253 0>;
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<0 29 1>;
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interrupt-names = "ipa-irq", "bam-irq"; "a2-bam-irq";
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qcom,ipa-hw-ver = <1>;
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2024-09-09 08:57:42 +00:00
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clocks = <&clock_rpm clk_ipa_clk>;
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clock-names = "iface_clk";
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qcom,msm-bus,name = "ipa";
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qcom,msm-bus,num-cases = <3>;
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qcom,msm-bus,num-paths = <2>;
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qcom,msm-bus,vectors-KBps =
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<90 512 0 0>, <90 585 0 0>, /* No vote */
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<90 512 100000 800000>, <90 585 100000 800000>, /* SVS */
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<90 512 100000 1200000>, <90 585 100000 1200000>; /* PERF */
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qcom,bus-vector-names = "MIN", "SVS", "PERF";
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2024-09-09 08:52:07 +00:00
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qcom,pipe1 {
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label = "a2-to-ipa";
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qcom,src-bam-physical-address = <0xfc834000>;
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qcom,ipa-bam-mem-type = <0>;
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qcom,src-bam-pipe-index = <1>;
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qcom,dst-bam-physical-address = <0xfd4c0000>;
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qcom,dst-bam-pipe-index = <6>;
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qcom,data-fifo-offset = <0x1000>;
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qcom,data-fifo-size = <0xd00>;
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qcom,descriptor-fifo-offset = <0x1d00>;
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qcom,descriptor-fifo-size = <0x300>;
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};
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qcom,pipe2 {
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label = "ipa-to-a2";
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qcom,src-bam-physical-address = <0xfd4c0000>;
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qcom,ipa-bam-mem-type = <0>;
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qcom,src-bam-pipe-index = <7>;
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qcom,dst-bam-physical-address = <0xfc834000>;
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qcom,dst-bam-pipe-index = <0>;
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qcom,data-fifo-offset = <0x00>;
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qcom,data-fifo-size = <0xd00>;
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qcom,descriptor-fifo-offset = <0xd00>;
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qcom,descriptor-fifo-size = <0x300>;
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};
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};
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