76 lines
2.1 KiB
Plaintext
76 lines
2.1 KiB
Plaintext
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Properties for an MDIO bus multiplexer controlled by a memory-mapped device
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This is a special case of a MDIO bus multiplexer. A memory-mapped device,
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like an FPGA, is used to control which child bus is connected. The mdio-mux
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node must be a child of the memory-mapped device. The driver currently only
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supports devices with eight-bit registers.
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Required properties in addition to the generic multiplexer properties:
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- compatible : string, must contain "mdio-mux-mmioreg"
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- reg : integer, contains the offset of the register that controls the bus
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multiplexer. The size field in the 'reg' property is the size of
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register, and must therefore be 1.
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- mux-mask : integer, contains an eight-bit mask that specifies which
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bits in the register control the actual bus multiplexer. The
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'reg' property of each child mdio-mux node must be constrained by
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this mask.
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Example:
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The FPGA node defines a memory-mapped FPGA with a register space of 0x30 bytes.
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For the "EMI2" MDIO bus, register 9 (BRDCFG1) controls the mux on that bus.
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A bitmask of 0x6 means that bits 1 and 2 (bit 0 is lsb) are the bits on
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BRDCFG1 that control the actual mux.
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/* The FPGA node */
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fpga: board-control@3,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis";
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reg = <3 0 0x30>;
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ranges = <0 3 0 0x30>;
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mdio-mux-emi2 {
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compatible = "mdio-mux-mmioreg", "mdio-mux";
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mdio-parent-bus = <&xmdio0>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <9 1>; // BRDCFG1
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mux-mask = <0x6>; // EMI2
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emi2_slot1: mdio@0 { // Slot 1 XAUI (FM2)
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy_xgmii_slot1: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <4>;
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};
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};
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emi2_slot2: mdio@2 { // Slot 2 XAUI (FM1)
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reg = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy_xgmii_slot2: ethernet-phy@4 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <0>;
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};
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};
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};
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};
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/* The parent MDIO bus. */
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xmdio0: mdio@f1000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,fman-xmdio";
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reg = <0xf1000 0x1000>;
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interrupts = <100 1 0 0>;
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};
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