81 lines
3.7 KiB
Plaintext
81 lines
3.7 KiB
Plaintext
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These properties are common to multiple MMC host controllers. Any host
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that requires the respective functionality should implement them using
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these definitions.
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Interpreted by the OF core:
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- reg: Registers location and length.
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- interrupts: Interrupts used by the MMC controller.
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Card detection:
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If no property below is supplied, host native card detect is used.
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Only one of the properties in this section should be supplied:
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- broken-cd: There is no card detection available; polling must be used.
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- cd-gpios: Specify GPIOs for card detection, see gpio binding
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- non-removable: non-removable slot (like eMMC); assume always present.
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Optional properties:
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- bus-width: Number of data lines, can be <1>, <4>, or <8>. The default
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will be <1> if the property is absent.
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- wp-gpios: Specify GPIOs for write protection, see gpio binding
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- cd-inverted: when present, polarity on the CD line is inverted. See the note
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below for the case, when a GPIO is used for the CD line
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- wp-inverted: when present, polarity on the WP line is inverted. See the note
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below for the case, when a GPIO is used for the WP line
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- max-frequency: maximum operating clock frequency
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- no-1-8-v: when present, denotes that 1.8v card voltage is not supported on
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this system, even if the controller claims it is.
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- cap-sd-highspeed: SD high-speed timing is supported
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- cap-mmc-highspeed: MMC high-speed timing is supported
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- sd-uhs-sdr12: SD UHS SDR12 speed is supported
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- sd-uhs-sdr25: SD UHS SDR25 speed is supported
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- sd-uhs-sdr50: SD UHS SDR50 speed is supported
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- sd-uhs-sdr104: SD UHS SDR104 speed is supported
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- sd-uhs-ddr50: SD UHS DDR50 speed is supported
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- cap-power-off-card: powering off the card is safe
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- cap-sdio-irq: enable SDIO IRQ signalling on this interface
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- full-pwr-cycle: full power cycle of the card is supported
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- mmc-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported
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- mmc-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported
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- mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported
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- mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported
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- mmc-hs400-1_8v: eMMC HS400 mode(1.8V I/O) is supported
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- mmc-hs400-1_2v: eMMC HS400 mode(1.2V I/O) is supported
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- dsr: Value the card's (optional) Driver Stage Register (DSR) should be
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programmed with. Valid range: [0 .. 0xffff].
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*NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
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polarity properties, we have to fix the meaning of the "normal" and "inverted"
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line levels. We choose to follow the SDHCI standard, which specifies both those
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lines as "active low." Therefore, using the "cd-inverted" property means, that
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the CD line is active high, i.e. it is high, when a card is inserted. Similar
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logic applies to the "wp-inverted" property.
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CD and WP lines can be implemented on the hardware in one of two ways: as GPIOs,
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specified in cd-gpios and wp-gpios properties, or as dedicated pins. Polarity of
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dedicated pins can be specified, using *-inverted properties. GPIO polarity can
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also be specified using the OF_GPIO_ACTIVE_LOW flag. This creates an ambiguity
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in the latter case. We choose to use the XOR logic for GPIO CD and WP lines.
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This means, the two properties are "superimposed," for example leaving the
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OF_GPIO_ACTIVE_LOW flag clear and specifying the respective *-inverted
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property results in a double-inversion and actually means the "normal" line
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polarity is in effect.
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Optional SDIO properties:
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- keep-power-in-suspend: Preserves card power during a suspend/resume cycle
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- enable-sdio-wakeup: Enables wake up of host system on SDIO IRQ assertion
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Example:
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sdhci@ab000000 {
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compatible = "sdhci";
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reg = <0xab000000 0x200>;
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interrupts = <23>;
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bus-width = <4>;
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cd-gpios = <&gpio 69 0>;
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cd-inverted;
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wp-gpios = <&gpio 70 0>;
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max-frequency = <50000000>;
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keep-power-in-suspend;
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enable-sdio-wakeup;
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}
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