2024-09-09 08:52:07 +00:00
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* AHCI SATA Controller
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SATA nodes are defined to describe on-chip Serial ATA controllers.
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Each SATA controller should have its own node.
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2024-09-09 08:57:42 +00:00
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It is possible, but not required, to represent each port as a sub-node.
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It allows to enable each port independently when dealing with multiple
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PHYs.
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2024-09-09 08:52:07 +00:00
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Required properties:
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2024-09-09 08:57:42 +00:00
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- compatible : compatible string, one of:
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- "allwinner,sun4i-a10-ahci"
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- "hisilicon,hisi-ahci"
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- "ibm,476gtr-ahci"
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- "marvell,armada-380-ahci"
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- "snps,dwc-ahci"
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- "snps,exynos5440-ahci"
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- "snps,spear-ahci"
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- "generic-ahci"
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2024-09-09 08:52:07 +00:00
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- interrupts : <interrupt mapping for SATA IRQ>
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- reg : <registers mapping>
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2024-09-09 08:57:42 +00:00
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Please note that when using "generic-ahci" you must also specify a SoC specific
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compatible:
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compatible = "manufacturer,soc-model-ahci", "generic-ahci";
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Optional properties:
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- dma-coherent : Present if dma operations are coherent
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- clocks : a list of phandle + clock specifier pairs
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- target-supply : regulator for SATA target power
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- phys : reference to the SATA PHY node
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- phy-names : must be "sata-phy"
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Required properties when using sub-nodes:
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- #address-cells : number of cells to encode an address
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- #size-cells : number of cells representing the size of an address
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Sub-nodes required properties:
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- reg : the port number
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- phys : reference to the SATA PHY node
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Examples:
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2024-09-09 08:52:07 +00:00
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sata@ffe08000 {
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2024-09-09 08:57:42 +00:00
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compatible = "snps,spear-ahci";
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reg = <0xffe08000 0x1000>;
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interrupts = <115>;
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2024-09-09 08:52:07 +00:00
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};
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2024-09-09 08:57:42 +00:00
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ahci: sata@01c18000 {
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compatible = "allwinner,sun4i-a10-ahci";
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reg = <0x01c18000 0x1000>;
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interrupts = <56>;
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clocks = <&pll6 0>, <&ahb_gates 25>;
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target-supply = <®_ahci_5v>;
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};
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With sub-nodes:
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sata@f7e90000 {
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compatible = "marvell,berlin2q-achi", "generic-ahci";
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reg = <0xe90000 0x1000>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&chip CLKID_SATA>;
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#address-cells = <1>;
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#size-cells = <0>;
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sata0: sata-port@0 {
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reg = <0>;
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phys = <&sata_phy 0>;
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};
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sata1: sata-port@1 {
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reg = <1>;
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phys = <&sata_phy 1>;
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};
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};
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