56 lines
1.9 KiB
Plaintext
56 lines
1.9 KiB
Plaintext
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* LPM Workarounds
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The required properties are:
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- compatible: "qcom,lpm-workarounds"
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The optional properties are:
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- reg: The physical address and the size of the l1_l2_gcc and l2_pwr_sts
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regitsters of performance cluster.
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- reg-names: "l2_pwr_sts" - string to identify l2_pwr_sts physical address.
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"l1_l2_gcc" - string to identify l1_l2_gcc physical address.
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- qcom,lpm-wa-cx-turbo-unvote: Indicates the workaround to unvote CX turbo
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vote when system is coming out of rpm assisted power collaspe.
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lpm-cx-supply is required if this is present.
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- lpm-cx-supply: will hold handle for CX regulator supply which is used
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to unvote.
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- qcom,lpm-wa-skip-l2-spm: Due to a hardware bug on 8939 and 8909, secure
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world needs to disable and enable L2 SPM to get the proper context
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in secure watchdog bite cases. With this workaround there is a race
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in programming L2 SPM between HLOS and secure world. This leads to
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stability issues. To avoid this program L2 SPM only in secure world
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based on the L2 mode flag passed. Set lpm-wa-skip-l2-spm node if this
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is required.
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- qcom,lpm-wa-dynamic-clock-gating: Due to a hardware bug on 8952, L1/L2 dynamic
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clock gating needs to be enabled by software for performance cluster
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cores and L2. Set lpm-wa-dynamic-clock-gating node if this workaround is
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required.
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- qcom,cpu-offline-mask: Dynamic clock gating should be enabled when cluster is
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in L2 PC. Each bit of cpu-offline-mask lists the cpu no. to hotplug by KTM
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driver.
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- qcom,non-boot-cpu-index: will hold index of non boot cluster cpu.
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- qcom,l1-l2-gcc-secure: indicates L1/L2 clock enabling register is secure.
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Example:
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qcom,lpm-workarounds {
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compatible = "qcom,lpm-workarounds";
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reg = <0x0B011018 0x4>,
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<0x0B011088 0x4>;
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reg-names = "l2-pwr-sts", "l1-l2-gcc";
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lpm-cx-supply = <&pm8916_s2_corner>;
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qcom,lpm-wa-cx-turbo-unvote;
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qcom,lpm-wa-skip-l2-spm;
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qcom,lpm-wa-dynamic-clock-gating;
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qcom,cpu-offline-mask = "0xF";
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qcom,non-boot-cpu-index = <4>;
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}
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