253 lines
6.1 KiB
C
253 lines
6.1 KiB
C
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <debug.h>
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#include <platform/iomap.h>
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#include <reg.h>
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#include <target.h>
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#include <platform.h>
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#include <uart_dm.h>
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#include <mmc.h>
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#include <platform/gpio.h>
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#include <dev/keys.h>
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#include <spmi_v2.h>
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#include <pm8x41.h>
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#include <board.h>
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#include <baseband.h>
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#include <hsusb.h>
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#include <scm.h>
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#include <platform/gpio.h>
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#include <platform/gpio.h>
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#include <platform/irqs.h>
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#include <platform/clock.h>
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#include <crypto5_wrapper.h>
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#include <partition_parser.h>
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#include <stdlib.h>
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#if LONG_PRESS_POWER_ON
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#include <shutdown_detect.h>
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#endif
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#define PMIC_ARB_CHANNEL_NUM 0
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#define PMIC_ARB_OWNER_ID 0
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#define TLMM_VOL_UP_BTN_GPIO 85
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#define FASTBOOT_MODE 0x77665500
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#define PON_SOFT_RB_SPARE 0x88F
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static uint32_t mmc_sdc_base[] =
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{ MSM_SDC1_BASE, MSM_SDC2_BASE };
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void target_early_init(void)
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{
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#if WITH_DEBUG_UART
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uart_dm_init(1, 0, BLSP1_UART1_BASE);
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#endif
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}
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void target_mmc_caps(struct mmc_host *host)
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{
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host->caps.ddr_mode = 0;
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host->caps.hs200_mode = 0;
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host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT;
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host->caps.hs_clk_rate = MMC_CLK_50MHZ;
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}
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/* Return 1 if vol_up pressed */
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static int target_volume_up()
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{
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uint8_t status = 0;
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gpio_tlmm_config(TLMM_VOL_UP_BTN_GPIO, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA, GPIO_ENABLE);
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/* Wait for the gpio config to take effect - debounce time */
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thread_sleep(10);
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/* Get status of GPIO */
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status = gpio_status(TLMM_VOL_UP_BTN_GPIO);
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/* Active high signal. */
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return status;
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}
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/* Return 1 if vol_down pressed */
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uint32_t target_volume_down()
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{
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/* Volume down button tied in with PMIC RESIN. */
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return pm8x41_resin_status();
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}
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static void target_keystatus()
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{
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keys_init();
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if(target_volume_down())
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keys_post_event(KEY_VOLUMEDOWN, 1);
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if(target_volume_up())
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keys_post_event(KEY_VOLUMEUP, 1);
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}
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/* Configure PMIC and Drop PS_HOLD for shutdown */
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void shutdown_device()
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{
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dprintf(CRITICAL, "Going down for shutdown.\n");
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/* Configure PMIC for shutdown */
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pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN);
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/* Drop PS_HOLD for MSM */
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writel(0x00, MPM2_MPM_PS_HOLD);
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mdelay(5000);
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dprintf(CRITICAL, "shutdown failed\n");
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ASSERT(0);
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}
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void target_init(void)
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{
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uint32_t base_addr;
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uint8_t slot;
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dprintf(INFO, "target_init()\n");
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spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
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target_keystatus();
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/* Trying Slot 1*/
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slot = 1;
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base_addr = mmc_sdc_base[slot - 1];
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if (mmc_boot_main(slot, base_addr)) {
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/* Trying Slot 2 next */
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slot = 2;
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base_addr = mmc_sdc_base[slot - 1];
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if (mmc_boot_main(slot, base_addr)) {
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dprintf(CRITICAL, "mmc init failed!");
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ASSERT(0);
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}
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}
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#if LONG_PRESS_POWER_ON
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shutdown_detect();
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#endif
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}
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void target_serialno(unsigned char *buf)
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{
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uint32_t serialno;
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if (target_is_emmc_boot()) {
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serialno = mmc_get_psn();
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snprintf((char *)buf, 13, "%x", serialno);
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}
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}
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unsigned board_machtype(void)
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{
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}
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int set_download_mode(enum dload_mode mode)
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{
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int ret = 0;
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ret = scm_dload_mode(mode);
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pm8x41_clear_pmic_watchdog();
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return ret;
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}
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int emmc_recovery_init(void)
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{
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return _emmc_recovery_init();
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}
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unsigned target_pause_for_battery_charge(void)
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{
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uint8_t pon_reason = pm8x41_get_pon_reason();
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uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
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dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
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pon_reason, is_cold_boot);
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/* In case of fastboot reboot,adb reboot or if we see the power key
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* pressed we do not want go into charger mode.
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* fastboot reboot is warm boot with PON hard reset bit not set
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* adb reboot is a cold boot with PON hard reset bit set
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*/
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if (is_cold_boot &&
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(!(pon_reason & HARD_RST)) &&
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(!(pon_reason & KPDPWR_N)) &&
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((pon_reason & USB_CHG) || (pon_reason & DC_CHG) || (pon_reason & CBLPWR_N)))
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return 1;
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else
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return 0;
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}
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/* UTMI MUX configuration to connect PHY to SNPS controller:
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* Configure primary HS phy mux to use UTMI interface
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* (connected to usb30 controller).
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*/
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static void tcsr_hs_phy_mux_configure(void)
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{
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uint32_t reg;
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reg = readl(USB2_PHY_SEL);
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writel(reg | 0x1, USB2_PHY_SEL);
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}
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/* configure hs phy mux if using dwc controller */
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void target_usb_phy_mux_configure(void)
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{
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if(!strcmp(target_usb_controller(), "dwc"))
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{
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tcsr_hs_phy_mux_configure();
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}
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}
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/* Initialize target specific USB handlers */
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target_usb_iface_t* target_usb30_init()
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{
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target_usb_iface_t *t_usb_iface;
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t_usb_iface = calloc(1, sizeof(target_usb_iface_t));
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ASSERT(t_usb_iface);
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t_usb_iface->mux_config = target_usb_phy_mux_configure;
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//t_usb_iface->clock_init = clock_usb30_init;
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return t_usb_iface;
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}
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/* identify the usb controller to be used for the target */
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const char * target_usb_controller()
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{
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return "dwc";
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}
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