300 lines
9.2 KiB
C
300 lines
9.2 KiB
C
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef EDP_H
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#define EDP_H
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#include <reg.h>
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#include <debug.h>
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#include <err.h>
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#include <platform/iomap.h>
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#include <platform/clock.h>
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#include <platform/timer.h>
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#include "msm_panel.h"
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#define edp_read(offset) readl_relaxed((offset))
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#define edp_write(offset, data) writel_relaxed((data), (offset))
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#define EDP_MAX_LANE 4
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#define AUX_CMD_FIFO_LEN 144
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#define AUX_CMD_MAX 16
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#define AUX_CMD_I2C_MAX 128
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#define EDP_PORT_MAX 1
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#define EDP_SINK_CAP_LEN 16
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#define EDP_AUX_ERR_NONE 0
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#define EDP_AUX_ERR_ADDR -1
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#define EDP_AUX_ERR_TOUT -2
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#define EDP_AUX_ERR_NACK -3
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/* 4 bits of aux command */
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#define EDP_CMD_AUX_WRITE 0x8
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#define EDP_CMD_AUX_READ 0x9
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/* 4 bits of i2c command */
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#define EDP_CMD_I2C_MOT 0x4 /* i2c middle of transaction */
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#define EDP_CMD_I2C_WRITE 0x0
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#define EDP_CMD_I2C_READ 0x1
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#define EDP_CMD_I2C_STATUS 0x2 /* i2c write status request */
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/* cmd reply: bit 0, 1 for aux */
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#define EDP_AUX_ACK 0x0
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#define EDP_AUX_NACK 0x1
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#define EDP_AUX_DEFER 0x2
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/* cmd reply: bit 2, 3 for i2c */
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#define EDP_I2C_ACK 0x0
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#define EDP_I2C_NACK 0x4
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#define EDP_I2C_DEFER 0x8
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#define EDP_CMD_TIMEOUT 400 /* us */
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#define EDP_CMD_LEN 16
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/* isr */
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#define EDP_INTR_HPD BIT(0)
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#define EDP_INTR_AUX_I2C_DONE BIT(3)
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#define EDP_INTR_WRONG_ADDR BIT(6)
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#define EDP_INTR_TIMEOUT BIT(9)
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#define EDP_INTR_NACK_DEFER BIT(12)
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#define EDP_INTR_WRONG_DATA_CNT BIT(15)
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#define EDP_INTR_I2C_NACK BIT(18)
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#define EDP_INTR_I2C_DEFER BIT(21)
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#define EDP_INTR_PLL_UNLOCKED BIT(24)
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#define EDP_INTR_AUX_ERROR BIT(27)
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#define EDP_INTR_STATUS1 \
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(EDP_INTR_HPD | EDP_INTR_AUX_I2C_DONE| \
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EDP_INTR_WRONG_ADDR | EDP_INTR_TIMEOUT | \
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EDP_INTR_NACK_DEFER | EDP_INTR_WRONG_DATA_CNT | \
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EDP_INTR_I2C_NACK | EDP_INTR_I2C_DEFER | \
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EDP_INTR_PLL_UNLOCKED | EDP_INTR_AUX_ERROR)
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#define EDP_INTR_MASK1 (EDP_INTR_STATUS1 << 2)
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#define EDP_INTR_READY_FOR_VIDEO BIT(0)
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#define EDP_INTR_IDLE_PATTERNs_SENT BIT(3)
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#define EDP_INTR_FRAME_END BIT(6)
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#define EDP_INTR_CRC_UPDATED BIT(9)
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#define EDP_INTR_STATUS2 \
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(EDP_INTR_READY_FOR_VIDEO | EDP_INTR_IDLE_PATTERNs_SENT | \
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EDP_INTR_FRAME_END | EDP_INTR_CRC_UPDATED)
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#define EDP_INTR_MASK2 (EDP_INTR_STATUS2 << 2)
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#define EDP_MAINLINK_CTRL 0x004
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#define EDP_STATE_CTRL 0x008
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#define EDP_MAINLINK_READY 0x084
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#define EDP_AUX_CTRL 0x300
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#define EDP_INTERRUPT_STATUS 0x308
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#define EDP_INTERRUPT_STATUS_2 0x30c
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#define EDP_AUX_DATA 0x314
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#define EDP_AUX_TRANS_CTRL 0x318
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#define EDP_AUX_STATUS 0x324
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#define EDP_PHY_EDPPHY_GLB_VM_CFG0 0x510
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#define EDP_PHY_EDPPHY_GLB_VM_CFG1 0x514
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struct edp_cmd{
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char read; /* 1 == read, 0 == write */
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char i2c; /* 1 == i2c cmd, 0 == native cmd */
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int addr; /* 20 bits */
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char *datap;
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int len; /* len to be tx OR len to be rx for read */
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char next; /* next command */
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};
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struct edp_buf {
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char *start; /* buffer start addr */
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char *end; /* buffer end addr */
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int size; /* size of buffer */
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char *data; /* data pointer */
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int len; /* dara length */
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char trans_num; /* transaction number */
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char i2c; /* 1 == i2c cmd, 0 == native cmd */
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};
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#define DPCD_ENHANCED_FRAME BIT(0)
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#define DPCD_TPS3 BIT(1)
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#define DPCD_MAX_DOWNSPREAD_0_5 BIT(2)
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#define DPCD_NO_AUX_HANDSHAKE BIT(3)
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#define DPCD_PORT_0_EDID_PRESENTED BIT(4)
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#define DPCD_LINK_VOLTAGE_MAX 4
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#define DPCD_LINK_PRE_EMPHASIS_MAX 4
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struct dpcd_cap {
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char major;
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char minor;
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char max_lane_count;
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char num_rx_port;
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char i2c_speed_ctrl;
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char scrambler_reset;
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char enhanced_frame;
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int max_link_rate; /* 162, 270 and 540 Mb, divided by 10 */
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int flags;
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int rx_port0_buf_size;
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int training_read_interval;/* us */
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};
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struct display_timing_desc {
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uint32_t pclk;
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uint32_t h_addressable; /* addressable + boder = active */
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uint32_t h_border;
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uint32_t h_blank; /* fporch + bporch + sync_pulse = blank */
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uint32_t h_fporch;
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uint32_t h_sync_pulse;
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uint32_t v_addressable; /* addressable + boder = active */
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uint32_t v_border;
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uint32_t v_blank; /* fporch + bporch + sync_pulse = blank */
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uint32_t v_fporch;
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uint32_t v_sync_pulse;
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uint32_t width_mm;
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uint32_t height_mm;
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uint32_t interlaced;
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uint32_t stereo;
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uint32_t sync_type;
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uint32_t sync_separate;
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uint32_t vsync_pol;
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uint32_t hsync_pol;
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};
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struct edp_edid {
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char id_name[4];
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short id_product;
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char version;
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char revision;
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char video_intf; /* edp == 0x5 */
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char color_depth; /* 6, 8, 10, 12 and 14 bits */
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char color_format; /* RGB 4:4:4, YCrCb 4:4:4, Ycrcb 4:2:2 */
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char dpm; /* display power management */
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char sync_digital; /* 1 = digital */
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char sync_separate; /* 1 = separate */
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char vsync_pol; /* 0 = negative, 1 = positive */
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char hsync_pol; /* 0 = negative, 1 = positive */
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char ext_block_cnt;
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struct display_timing_desc timing[4];
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};
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struct dpcd_link_status {
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char lane_01_status;
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char lane_23_status;
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char interlane_align_done;
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char downstream_port_status_changed;
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char link_status_updated;
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char port_0_in_sync;
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char port_1_in_sync;
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char req_voltage_swing[4];
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char req_pre_emphasis[4];
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};
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struct edp_aux_ctrl {
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int aux_cmd_busy;
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int aux_cmd_i2c;
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int aux_trans_num;
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int aux_error_num;
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int aux_ctrl_reg;
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struct edp_buf txp;
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struct edp_buf rxp;
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char txbuf[256];
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char rxbuf[256];
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struct dpcd_link_status link_status;
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char link_rate;
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char lane_cnt;
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char v_level;
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char p_level;
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/* transfer unit */
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char tu_desired;
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char valid_boundary;
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char delay_start;
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int bpp;
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struct edp_edid edid;
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struct dpcd_cap dpcd;
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};
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void edp_phy_pll_reset(void);
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void edp_mainlink_reset(void);
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void edp_aux_reset(void);
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void edp_phy_powerup(int enable);
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void edp_lane_power_ctrl(int max_lane, int up);
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void edp_phy_sw_reset(void);
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void edp_pll_configure(unsigned int rate);
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void edp_enable_lane_bist(int lane, int enable);
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void edp_enable_mainlink(int enable);
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void edp_hw_powerup(int enable);
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void edp_config_clk(void);
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void edp_unconfig_clk(void);
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void edp_phy_misc_cfg(void);
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int edp_on(void);
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int edp_off(void);
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int edp_config(void *pdata);
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void mdss_edp_dpcd_cap_read(void);
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void mdss_edp_dpcd_status_read(void);
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void mdss_edp_edid_read(void);
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int mdss_edp_link_train(void);
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void mdss_edp_aux_init(void);
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void mdss_edp_irq_enable(void);
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void mdss_edp_irq_disable(void);
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void mdss_edp_wait_for_hpd(void);
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void mdss_edp_wait_for_video_ready(void);
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void mdss_edp_lane_power_ctrl(int up);
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int mdss_edp_phy_pll_ready(void);
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void mdss_edp_pll_configure(void);
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void edp_cap2pinfo(struct msm_panel_info *pinfo);
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void edp_edid2pinfo(struct msm_panel_info *pinfo);
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int edp_aux_write_cmds(struct edp_aux_ctrl *ep,
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struct edp_cmd *cmd);
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int edp_aux_read_cmds(struct edp_aux_ctrl *ep,
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struct edp_cmd *cmds);
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int edp_aux_write_buf(struct edp_aux_ctrl *ep, int addr,
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char *buf, int len, int i2c);
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int edp_aux_read_buf(struct edp_aux_ctrl *ep, int addr,
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int len, int i2c);
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char *edp_buf_init(struct edp_buf *eb, char *buf, int size);
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#endif /* EDP_H */
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