110 lines
4.8 KiB
C
110 lines
4.8 KiB
C
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/*
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* Copyright (c) 2011, The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __DEV_LCDC_H
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#define __DEV_LCDC_H
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#include <platform/iomap.h>
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#include <msm_panel.h>
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#define DEFAULT_LCD_TIMING 0
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#define MDP_DMA_P_CONFIG REG_MDP(0x90000)
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#define MDP_DMA_P_OUT_XY REG_MDP(0x90010)
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#define MDP_DMA_P_SIZE REG_MDP(0x90004)
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#define MDP_DMA_P_BUF_ADDR REG_MDP(0x90008)
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#define MDP_DMA_P_BUF_Y_STRIDE REG_MDP(0x9000C)
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#define MDP_DMA_P_OP_MODE REG_MDP(0x90070)
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#define MDP_LCDC_EN REG_MDP(LCDC_BASE + 0x00)
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#define MDP_LCDC_HSYNC_CTL REG_MDP(LCDC_BASE + 0x04)
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#define MDP_LCDC_VSYNC_PERIOD REG_MDP(LCDC_BASE + 0x08)
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#define MDP_LCDC_VSYNC_PULSE_WIDTH REG_MDP(LCDC_BASE + 0x0C)
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#define MDP_LCDC_DISPLAY_HCTL REG_MDP(LCDC_BASE + 0x10)
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#define MDP_LCDC_DISPLAY_V_START REG_MDP(LCDC_BASE + 0x14)
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#define MDP_LCDC_DISPLAY_V_END REG_MDP(LCDC_BASE + 0x18)
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#define MDP_LCDC_ACTIVE_HCTL REG_MDP(LCDC_BASE + 0x1C)
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#define MDP_LCDC_ACTIVE_V_START REG_MDP(LCDC_BASE + 0x20)
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#define MDP_LCDC_ACTIVE_V_END REG_MDP(LCDC_BASE + 0x24)
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#define MDP_LCDC_BORDER_CLR REG_MDP(LCDC_BASE + 0x28)
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#define MDP_LCDC_UNDERFLOW_CTL REG_MDP(LCDC_BASE + 0x2C)
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#define MDP_LCDC_HSYNC_SKEW REG_MDP(LCDC_BASE + 0x30)
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#define MDP_LCDC_TEST_CTL REG_MDP(LCDC_BASE + 0x34)
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#define MDP_LCDC_CTL_POLARITY REG_MDP(LCDC_BASE + 0x38)
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#define MDP_LCDC_TEST_COL_VAR1 REG_MDP(LCDC_BASE + 0x3C)
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#define MDP_LCDC_UNDERFLOW_HIDING_CTL REG_MDP(LCDC_BASE + 0x44)
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#define MDP_LCDC_LOST_PIXEL_CNT_VALUE REG_MDP(LCDC_BASE + 0x48)
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#define DMA_DSTC0G_8BITS (BIT(1)|BIT(0))
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#define DMA_DSTC1B_8BITS (BIT(3)|BIT(2))
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#define DMA_DSTC2R_8BITS (BIT(5)|BIT(4))
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#define DMA_DSTC0G_6BITS (BIT(1))
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#define DMA_DSTC1B_6BITS (BIT(3))
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#define DMA_DSTC2R_6BITS (BIT(5))
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#define DMA_DITHER_EN BIT(24)
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#define DMA_OUT_SEL_LCDC BIT(20)
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#define DMA_IBUF_FORMAT_RGB888 (0 << 25)
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#define DMA_IBUF_FORMAT_RGB565 (1 << 25)
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#define CLR_G 0x0
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#define CLR_B 0x1
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#define CLR_R 0x2
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#define DMA_PACK_ALIGN_LSB 0
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#define MDP_GET_PACK_PATTERN(a,x,y,z,bit) \
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(((a)<<(bit*3))|((x)<<(bit*2))|((y)<<bit)|(z))
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#define MDP_GET_PACK_PATTERN(a, x, y, z, bit) \
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(((a)<<(bit*3))|((x)<<(bit*2))|((y)<<bit)|(z))
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#define DMA_PACK_PATTERN_RGB \
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(MDP_GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 2)<<8)
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#define MDP_RGB_888_FORMAT \
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(BIT(17) | (1<<14) | (2<<9) | \
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(0<<8) | (0<<6) | (3<<4) | \
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(3<<2) | (3<<0))
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#define MDP_RGB_565_FORMAT \
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(BIT(17) | (1<<14) | (1<<9) | \
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(0<<8) | (0<<6) | (1<<4) | \
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(1<<2) | (2<<0))
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/* used for setting custom timing parameters for different panels */
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struct lcdc_timing_parameters
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{
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unsigned lcdc_fb_width;
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unsigned lcdc_fb_height;
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unsigned lcdc_hsync_pulse_width_dclk;
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unsigned lcdc_hsync_back_porch_dclk;
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unsigned lcdc_hsync_front_porch_dclk;
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unsigned lcdc_hsync_skew_dclk;
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unsigned lcdc_vsync_pulse_width_lines;
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unsigned lcdc_vsync_back_porch_lines;
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unsigned lcdc_vsync_front_porch_lines;
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};
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#endif /* __DEV_LCDC_H */
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