535 lines
18 KiB
C
535 lines
18 KiB
C
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/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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/*---------------------------------------------------------------------------*/
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/* HEADER files */
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/*---------------------------------------------------------------------------*/
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#include <stdint.h>
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#include <msm_panel.h>
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#include <mipi_dsi.h>
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#include <mdp5.h>
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#include <sys/types.h>
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#include <platform/iomap.h>
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#include <err.h>
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#include <reg.h>
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#include <string.h>
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/*---------------------------------------------------------------------------*/
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/* Panel Header */
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/*---------------------------------------------------------------------------*/
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#include "panel_display.h"
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#include "include/panel.h"
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#include "target/display.h"
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static int dsi_platform_base_offset_adjust(uint32_t base)
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{
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return target_display_get_base_offset(base);
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}
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static int dsi_panel_ctl_base_setup(struct msm_panel_info *pinfo,
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char *panel_destination)
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{
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int base_offset = 0, base1_offset = 0, base_phy_offset = 0,
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base1_phy_offset = 0, base_phy_pll_offset = 0,
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base1_phy_pll_offset = 0, base_phy_reg_offset = 0;
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/*
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* Base offsets may vary for few platforms. Add the difference to get
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* proper base offset for the respective platform.
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*/
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base_offset = dsi_platform_base_offset_adjust(MIPI_DSI0_BASE);
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base1_offset = dsi_platform_base_offset_adjust(MIPI_DSI1_BASE);
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base_phy_offset = dsi_platform_base_offset_adjust(DSI0_PHY_BASE);
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base1_phy_offset = dsi_platform_base_offset_adjust(DSI1_PHY_BASE);
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base_phy_pll_offset = dsi_platform_base_offset_adjust(DSI0_PLL_BASE);
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base1_phy_pll_offset = dsi_platform_base_offset_adjust(DSI1_PLL_BASE);
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base_phy_reg_offset = dsi_platform_base_offset_adjust(DSI0_REGULATOR_BASE);
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dprintf(SPEW, "base offset = %d, %x\n", base_offset, base_offset);
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if (!strcmp(panel_destination, "DISPLAY_1")) {
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pinfo->dest = DISPLAY_1;
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pinfo->mipi.ctl_base = MIPI_DSI0_BASE + base_offset;
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pinfo->mipi.phy_base = DSI0_PHY_BASE + base_phy_offset;
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pinfo->mipi.sctl_base = MIPI_DSI1_BASE + base1_offset;
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pinfo->mipi.sphy_base = DSI1_PHY_BASE + base1_phy_offset;
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if (pinfo->mipi.use_dsi1_pll) {
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dprintf(CRITICAL, "%s: Invalid combination: DSI0 controller + DSI1 PLL, using DSI0 PLL\n",
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__func__);
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pinfo->mipi.use_dsi1_pll = 0;
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}
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pinfo->mipi.pll_base = DSI0_PLL_BASE + base_phy_pll_offset;
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pinfo->mipi.spll_base = DSI1_PLL_BASE + base1_phy_pll_offset;
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} else if (!strcmp(panel_destination, "DISPLAY_2")) {
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pinfo->dest = DISPLAY_2;
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pinfo->mipi.ctl_base = MIPI_DSI1_BASE + base1_offset;
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pinfo->mipi.phy_base = DSI1_PHY_BASE + base1_phy_offset;
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pinfo->mipi.sctl_base = MIPI_DSI0_BASE + base_offset;
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pinfo->mipi.sphy_base = DSI0_PHY_BASE + base_phy_offset;
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if (pinfo->mipi.use_dsi1_pll) {
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pinfo->mipi.pll_base = DSI1_PLL_BASE + base1_phy_pll_offset;
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pinfo->mipi.spll_base = DSI0_PLL_BASE + base_phy_pll_offset;
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} else {
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pinfo->mipi.pll_base = DSI0_PLL_BASE + base_phy_pll_offset;
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pinfo->mipi.spll_base = DSI1_PLL_BASE + base1_phy_pll_offset;
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}
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} else {
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pinfo->dest = DISPLAY_UNKNOWN;
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dprintf(CRITICAL, "%s: Unkown panel destination: %d\n",
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__func__, pinfo->dest);
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return ERROR;
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}
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/* Both DSI0 and DSI1 use the same regulator */
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pinfo->mipi.reg_base = DSI0_REGULATOR_BASE + base_phy_reg_offset;
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pinfo->mipi.sreg_base = DSI0_REGULATOR_BASE + base_phy_reg_offset;
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dprintf(SPEW, "%s: panel dest=%s, ctl_base=0x%08x, phy_base=0x%08x\n",
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__func__, panel_destination, pinfo->mipi.ctl_base,
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pinfo->mipi.phy_base);
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dprintf(SPEW, "pll_base=%08x, spll_base=0x%08x, reg_base=0x%08x, sreg_base=%08x\n",
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pinfo->mipi.pll_base, pinfo->mipi.spll_base,
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pinfo->mipi.reg_base, pinfo->mipi.sreg_base);
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return NO_ERROR;
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}
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/*---------------------------------------------------------------------------*/
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/* Panel Init */
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/*---------------------------------------------------------------------------*/
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int dsi_panel_init(struct msm_panel_info *pinfo,
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struct panel_struct *pstruct)
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{
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int ret = NO_ERROR;
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/* Resolution setting*/
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pinfo->xres = pstruct->panelres->panel_width;
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pinfo->yres = pstruct->panelres->panel_height;
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pinfo->lcdc.h_back_porch = pstruct->panelres->hback_porch;
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pinfo->lcdc.h_front_porch = pstruct->panelres->hfront_porch;
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pinfo->lcdc.h_pulse_width = pstruct->panelres->hpulse_width;
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pinfo->lcdc.v_back_porch = pstruct->panelres->vback_porch;
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pinfo->lcdc.v_front_porch = pstruct->panelres->vfront_porch;
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pinfo->lcdc.v_pulse_width = pstruct->panelres->vpulse_width;
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pinfo->lcdc.hsync_skew = pstruct->panelres->hsync_skew;
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pinfo->border_top = pstruct->panelres->vtop_border;
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pinfo->border_bottom = pstruct->panelres->vbottom_border;
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pinfo->border_left = pstruct->panelres->hleft_border;
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pinfo->border_right = pstruct->panelres->hright_border;
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dprintf(SPEW, "%s: left=%d right=%d top=%d bottom=%d\n", __func__,
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pinfo->border_left, pinfo->border_right,
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pinfo->border_top, pinfo->border_bottom);
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pinfo->xres += (pinfo->border_left + pinfo->border_right);
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pinfo->yres += (pinfo->border_top + pinfo->border_bottom);
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if (pstruct->paneldata->panel_operating_mode & DUAL_PIPE_FLAG)
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pinfo->lcdc.dual_pipe = 1;
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if (pstruct->paneldata->panel_operating_mode & PIPE_SWAP_FLAG)
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pinfo->lcdc.pipe_swap = 1;
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if (pstruct->paneldata->panel_operating_mode & SPLIT_DISPLAY_FLAG)
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pinfo->lcdc.split_display = 1;
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if (pstruct->paneldata->panel_operating_mode & DST_SPLIT_FLAG)
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pinfo->lcdc.dst_split = 1;
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/* Color setting*/
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pinfo->lcdc.border_clr = pstruct->color->border_color;
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pinfo->lcdc.underflow_clr = pstruct->color->underflow_color;
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pinfo->mipi.rgb_swap = pstruct->color->color_order;
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pinfo->bpp = pstruct->color->color_format;
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switch (pinfo->bpp) {
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case BPP_16:
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pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB565;
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break;
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case BPP_18:
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if (pstruct->color->pixel_packing)
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pinfo->mipi.dst_format
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= DSI_VIDEO_DST_FORMAT_RGB666_LOOSE;
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else
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pinfo->mipi.dst_format
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= DSI_VIDEO_DST_FORMAT_RGB666;
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break;
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case BPP_24:
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default:
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pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
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break;
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}
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/* Panel generic info */
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pinfo->mipi.mode = pstruct->paneldata->panel_type;
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if (pinfo->mipi.mode) {
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pinfo->type = MIPI_CMD_PANEL;
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} else {
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pinfo->type = MIPI_VIDEO_PANEL;
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}
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pinfo->clk_rate = pstruct->paneldata->panel_clockrate;
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pinfo->orientation = pstruct->paneldata->panel_orientation;
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pinfo->mipi.interleave_mode = pstruct->paneldata->interleave_mode;
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pinfo->mipi.broadcast = pstruct->paneldata->panel_broadcast_mode;
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pinfo->mipi.vc = pstruct->paneldata->dsi_virtualchannel_id;
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pinfo->mipi.frame_rate = pstruct->paneldata->panel_framerate;
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pinfo->mipi.stream = pstruct->paneldata->dsi_stream;
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if (pstruct->paneldata->panel_operating_mode & DUAL_DSI_FLAG)
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pinfo->mipi.dual_dsi = 1;
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if (pstruct->paneldata->panel_operating_mode & USE_DSI1_PLL_FLAG)
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pinfo->mipi.use_dsi1_pll = 1;
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pinfo->mipi.mode_gpio_state = pstruct->paneldata->mode_gpio_state;
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pinfo->mipi.bitclock = pstruct->paneldata->panel_bitclock_freq;
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if (pinfo->mipi.bitclock) {
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/* panel_clockrate is depcrated in favor of bitclock_freq */
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pinfo->clk_rate = pinfo->mipi.bitclock;
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}
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pinfo->mipi.use_enable_gpio =
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pstruct->paneldata->panel_with_enable_gpio;
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ret = dsi_panel_ctl_base_setup(pinfo,
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pstruct->paneldata->panel_destination);
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if (ret)
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return ret;
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/* Video Panel configuration */
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pinfo->mipi.pulse_mode_hsa_he = pstruct->videopanel->hsync_pulse;
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pinfo->mipi.hfp_power_stop = pstruct->videopanel->hfp_power_mode;
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pinfo->mipi.hbp_power_stop = pstruct->videopanel->hbp_power_mode;
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pinfo->mipi.hsa_power_stop = pstruct->videopanel->hsa_power_mode;
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pinfo->mipi.eof_bllp_power_stop
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= pstruct->videopanel->bllp_eof_power_mode;
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pinfo->mipi.bllp_power_stop = pstruct->videopanel->bllp_power_mode;
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pinfo->mipi.traffic_mode = pstruct->videopanel->traffic_mode;
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pinfo->mipi.eof_bllp_power = pstruct->videopanel->bllp_eof_power;
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/* Command Panel configuratoin */
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pinfo->mipi.insert_dcs_cmd = pstruct->commandpanel->tedcs_command;
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pinfo->mipi.wr_mem_continue
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= pstruct->commandpanel->tevsync_continue_lines;
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pinfo->mipi.wr_mem_start
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= pstruct->commandpanel->tevsync_rdptr_irqline;
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pinfo->mipi.te_sel = pstruct->commandpanel->tepin_select;
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/* Data lane configuraiton */
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pinfo->mipi.num_of_lanes = pstruct->laneconfig->dsi_lanes;
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pinfo->mipi.data_lane0 = pstruct->laneconfig->lane0_state;
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pinfo->mipi.data_lane1 = pstruct->laneconfig->lane1_state;
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pinfo->mipi.data_lane2 = pstruct->laneconfig->lane2_state;
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pinfo->mipi.data_lane3 = pstruct->laneconfig->lane3_state;
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pinfo->mipi.lane_swap = pstruct->laneconfig->dsi_lanemap;
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pinfo->mipi.force_clk_lane_hs = pstruct->laneconfig->force_clk_lane_hs;
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pinfo->mipi.t_clk_post = pstruct->paneltiminginfo->tclk_post;
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pinfo->mipi.t_clk_pre = pstruct->paneltiminginfo->tclk_pre;
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pinfo->mipi.mdp_trigger = pstruct->paneltiminginfo->dsi_mdp_trigger;
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pinfo->mipi.dma_trigger = pstruct->paneltiminginfo->dsi_dma_trigger;
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pinfo->fbc.comp_ratio = 1;
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if (pinfo->compression_mode == COMPRESSION_DSC) {
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struct dsc_desc *dsc = NULL;
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pinfo->dsc.major = pstruct->dsc_paras.major;
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pinfo->dsc.minor = pstruct->dsc_paras.minor;
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pinfo->dsc.pps_id = pstruct->dsc_paras.pps_id;
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pinfo->dsc.slice_height = pstruct->dsc_paras.slice_height;
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pinfo->dsc.slice_width = pstruct->dsc_paras.slice_width;
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pinfo->dsc.bpp = pstruct->dsc_paras.bpp;
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pinfo->dsc.bpc = pstruct->dsc_paras.bpc;
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pinfo->dsc.slice_per_pkt = pstruct->dsc_paras.slice_per_pkt;
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pinfo->dsc.ich_reset_value = pstruct->dsc_paras.ich_reset_value;
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pinfo->dsc.ich_reset_override = pstruct->dsc_paras.ich_reset_override;
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pinfo->dsc.block_pred_enable = pstruct->dsc_paras.block_prediction;
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pinfo->dsc.enable_422 = 0;
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pinfo->dsc.convert_rgb = 1;
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pinfo->dsc.vbr_enable = 0;
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dsc = &pinfo->dsc;
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if (dsc) {
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if (dsc->parameter_calc)
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dsc->parameter_calc(pinfo);
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}
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} else if (pinfo->compression_mode == COMPRESSION_FBC) {
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pinfo->fbc.enabled = pstruct->fbcinfo.enabled;
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if (pinfo->fbc.enabled) {
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pinfo->fbc.comp_ratio= pstruct->fbcinfo.comp_ratio;
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pinfo->fbc.comp_mode = pstruct->fbcinfo.comp_mode;
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pinfo->fbc.qerr_enable = pstruct->fbcinfo.qerr_enable;
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pinfo->fbc.cd_bias = pstruct->fbcinfo.cd_bias;
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pinfo->fbc.pat_enable = pstruct->fbcinfo.pat_enable;
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pinfo->fbc.vlc_enable = pstruct->fbcinfo.vlc_enable;
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pinfo->fbc.bflc_enable = pstruct->fbcinfo.bflc_enable;
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pinfo->fbc.line_x_budget = pstruct->fbcinfo.line_x_budget;
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pinfo->fbc.block_x_budget = pstruct->fbcinfo.block_x_budget;
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pinfo->fbc.block_budget = pstruct->fbcinfo.block_budget;
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pinfo->fbc.lossless_mode_thd = pstruct->fbcinfo.lossless_mode_thd;
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pinfo->fbc.lossy_mode_thd = pstruct->fbcinfo.lossy_mode_thd;
|
||
|
|
pinfo->fbc.lossy_rgb_thd = pstruct->fbcinfo.lossy_rgb_thd;
|
||
|
|
pinfo->fbc.lossy_mode_idx = pstruct->fbcinfo.lossy_mode_idx;
|
||
|
|
pinfo->fbc.slice_height = pstruct->fbcinfo.slice_height;
|
||
|
|
pinfo->fbc.pred_mode = pstruct->fbcinfo.pred_mode;
|
||
|
|
pinfo->fbc.max_pred_err = pstruct->fbcinfo.max_pred_err;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
pinfo->pre_on = dsi_panel_pre_on;
|
||
|
|
pinfo->pre_off = dsi_panel_pre_off;
|
||
|
|
pinfo->on = dsi_panel_post_on;
|
||
|
|
pinfo->off = dsi_panel_post_off;
|
||
|
|
pinfo->rotate = dsi_panel_rotation;
|
||
|
|
pinfo->config = dsi_panel_config;
|
||
|
|
|
||
|
|
return NO_ERROR;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*---------------------------------------------------------------------------*/
|
||
|
|
/* Panel Callbacks */
|
||
|
|
/*---------------------------------------------------------------------------*/
|
||
|
|
|
||
|
|
int dsi_panel_pre_on()
|
||
|
|
{
|
||
|
|
return target_display_pre_on();
|
||
|
|
}
|
||
|
|
|
||
|
|
int dsi_panel_pre_off()
|
||
|
|
{
|
||
|
|
return target_display_pre_off();
|
||
|
|
}
|
||
|
|
|
||
|
|
int dsi_panel_post_on()
|
||
|
|
{
|
||
|
|
int ret = NO_ERROR;
|
||
|
|
|
||
|
|
ret = target_display_post_on();
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
return oem_panel_on();
|
||
|
|
}
|
||
|
|
|
||
|
|
int dsi_panel_post_off()
|
||
|
|
{
|
||
|
|
int ret = NO_ERROR;
|
||
|
|
|
||
|
|
ret = target_display_post_off();
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
return oem_panel_off();
|
||
|
|
}
|
||
|
|
|
||
|
|
int dsi_panel_rotation()
|
||
|
|
{
|
||
|
|
return oem_panel_rotation();
|
||
|
|
}
|
||
|
|
|
||
|
|
int dsi_video_panel_config(struct msm_panel_info *pinfo,
|
||
|
|
struct lcdc_panel_info *plcdc
|
||
|
|
)
|
||
|
|
{
|
||
|
|
int ret = NO_ERROR;
|
||
|
|
uint8_t lane_enable = 0;
|
||
|
|
uint32_t panel_width = pinfo->xres;
|
||
|
|
uint32_t final_xres, final_yres, final_width;
|
||
|
|
uint32_t final_height, final_hbp, final_hfp,final_vbp;
|
||
|
|
uint32_t final_vfp, final_hpw, final_vpw, low_pwr_stop;
|
||
|
|
struct dsc_desc *dsc = NULL;
|
||
|
|
|
||
|
|
if (pinfo->mipi.dual_dsi)
|
||
|
|
panel_width = panel_width / 2;
|
||
|
|
|
||
|
|
if (pinfo->mipi.data_lane0)
|
||
|
|
lane_enable |= (1 << 0);
|
||
|
|
if (pinfo->mipi.data_lane1)
|
||
|
|
lane_enable |= (1 << 1);
|
||
|
|
if (pinfo->mipi.data_lane2)
|
||
|
|
lane_enable |= (1 << 2);
|
||
|
|
if (pinfo->mipi.data_lane3)
|
||
|
|
lane_enable |= (1 << 3);
|
||
|
|
|
||
|
|
if (pinfo->compression_mode == COMPRESSION_DSC) {
|
||
|
|
dsc = &pinfo->dsc;
|
||
|
|
panel_width = dsc->pclk_per_line;
|
||
|
|
}
|
||
|
|
|
||
|
|
final_xres = panel_width;
|
||
|
|
final_width = panel_width + pinfo->lcdc.xres_pad;
|
||
|
|
|
||
|
|
if (pinfo->fbc.enabled && pinfo->fbc.comp_ratio) {
|
||
|
|
final_xres /= pinfo->fbc.comp_ratio;
|
||
|
|
final_width /= pinfo->fbc.comp_ratio;
|
||
|
|
dprintf(SPEW, "DSI xres =%d final_width=%d\n",
|
||
|
|
final_xres, final_width);
|
||
|
|
}
|
||
|
|
final_yres = pinfo->yres;
|
||
|
|
final_height = pinfo->yres + pinfo->lcdc.yres_pad;
|
||
|
|
final_hbp = pinfo->lcdc.h_back_porch;
|
||
|
|
final_hfp = pinfo->lcdc.h_front_porch;
|
||
|
|
final_vbp = pinfo->lcdc.v_back_porch;
|
||
|
|
final_vfp = pinfo->lcdc.v_front_porch;
|
||
|
|
final_hpw = pinfo->lcdc.h_pulse_width;
|
||
|
|
final_vpw = pinfo->lcdc.v_pulse_width;
|
||
|
|
low_pwr_stop = (pinfo->mipi.hfp_power_stop << 8) |
|
||
|
|
(pinfo->mipi.hbp_power_stop << 4) |
|
||
|
|
pinfo->mipi.hsa_power_stop;
|
||
|
|
|
||
|
|
ret = mdss_dsi_video_mode_config(pinfo,
|
||
|
|
final_width, final_height,
|
||
|
|
final_xres, final_yres,
|
||
|
|
final_hfp, final_hbp + final_hpw,
|
||
|
|
final_vfp, final_vbp + final_vpw,
|
||
|
|
final_hpw, final_vpw,
|
||
|
|
pinfo->mipi.dst_format,
|
||
|
|
pinfo->mipi.traffic_mode,
|
||
|
|
lane_enable,
|
||
|
|
pinfo->mipi.pulse_mode_hsa_he,
|
||
|
|
low_pwr_stop,
|
||
|
|
pinfo->mipi.eof_bllp_power,
|
||
|
|
pinfo->mipi.interleave_mode,
|
||
|
|
pinfo->mipi.ctl_base);
|
||
|
|
|
||
|
|
if (pinfo->mipi.dual_dsi)
|
||
|
|
ret = mdss_dsi_video_mode_config(pinfo,
|
||
|
|
final_width, final_height,
|
||
|
|
final_xres, final_yres,
|
||
|
|
final_hfp, final_hbp + final_hpw,
|
||
|
|
final_vfp, final_vbp + final_vpw,
|
||
|
|
final_hpw, final_vpw,
|
||
|
|
pinfo->mipi.dst_format,
|
||
|
|
pinfo->mipi.traffic_mode,
|
||
|
|
lane_enable,
|
||
|
|
pinfo->mipi.pulse_mode_hsa_he,
|
||
|
|
low_pwr_stop,
|
||
|
|
pinfo->mipi.eof_bllp_power,
|
||
|
|
pinfo->mipi.interleave_mode,
|
||
|
|
pinfo->mipi.sctl_base);
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
int dsi_cmd_panel_config (struct msm_panel_info *pinfo,
|
||
|
|
struct lcdc_panel_info *plcdc)
|
||
|
|
{
|
||
|
|
int ret = NO_ERROR;
|
||
|
|
uint8_t lane_en = 0;
|
||
|
|
uint8_t ystride = pinfo->bpp / 8;
|
||
|
|
uint32_t panel_width = pinfo->xres;
|
||
|
|
uint32_t final_xres, final_yres, final_width;
|
||
|
|
uint32_t final_height;
|
||
|
|
struct dsc_desc *dsc = NULL;
|
||
|
|
|
||
|
|
if (pinfo->mipi.dual_dsi)
|
||
|
|
panel_width = panel_width / 2;
|
||
|
|
|
||
|
|
if (pinfo->mipi.data_lane0)
|
||
|
|
lane_en |= (1 << 0);
|
||
|
|
if (pinfo->mipi.data_lane1)
|
||
|
|
lane_en |= (1 << 1);
|
||
|
|
if (pinfo->mipi.data_lane2)
|
||
|
|
lane_en |= (1 << 2);
|
||
|
|
if (pinfo->mipi.data_lane3)
|
||
|
|
lane_en |= (1 << 3);
|
||
|
|
|
||
|
|
if (pinfo->compression_mode == COMPRESSION_DSC) {
|
||
|
|
dsc = &pinfo->dsc;
|
||
|
|
panel_width = dsc->pclk_per_line;
|
||
|
|
}
|
||
|
|
|
||
|
|
final_xres = panel_width;
|
||
|
|
final_width = panel_width + pinfo->lcdc.xres_pad;
|
||
|
|
|
||
|
|
if (pinfo->compression_mode == COMPRESSION_FBC) {
|
||
|
|
if (pinfo->fbc.enabled && pinfo->fbc.comp_ratio) {
|
||
|
|
final_xres /= pinfo->fbc.comp_ratio;
|
||
|
|
final_width /= pinfo->fbc.comp_ratio;
|
||
|
|
dprintf(SPEW, "DSI xres =%d final_width=%d\n",
|
||
|
|
final_xres, final_width);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
final_yres = pinfo->yres;
|
||
|
|
final_height = pinfo->yres + pinfo->lcdc.yres_pad;
|
||
|
|
|
||
|
|
ret = mdss_dsi_cmd_mode_config(pinfo, final_width, final_height,
|
||
|
|
final_xres, final_yres,
|
||
|
|
pinfo->mipi.dst_format,
|
||
|
|
ystride, lane_en,
|
||
|
|
pinfo->mipi.interleave_mode,
|
||
|
|
pinfo->mipi.ctl_base);
|
||
|
|
|
||
|
|
if (pinfo->mipi.dual_dsi)
|
||
|
|
ret = mdss_dsi_cmd_mode_config(pinfo, final_width, final_height,
|
||
|
|
final_xres, final_yres,
|
||
|
|
pinfo->mipi.dst_format,
|
||
|
|
ystride, lane_en,
|
||
|
|
pinfo->mipi.interleave_mode,
|
||
|
|
pinfo->mipi.sctl_base);
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
int dsi_panel_config(void *pdata)
|
||
|
|
{
|
||
|
|
int ret = NO_ERROR;
|
||
|
|
struct msm_panel_info *pinfo = (struct msm_panel_info *)pdata;
|
||
|
|
struct lcdc_panel_info *plcdc = NULL;
|
||
|
|
|
||
|
|
if (pinfo == NULL)
|
||
|
|
return ERR_INVALID_ARGS;
|
||
|
|
|
||
|
|
plcdc = &(pinfo->lcdc);
|
||
|
|
if (plcdc == NULL)
|
||
|
|
return ERR_INVALID_ARGS;
|
||
|
|
|
||
|
|
|
||
|
|
if (pinfo->mipi.mode == DSI_VIDEO_MODE) {
|
||
|
|
ret = dsi_video_panel_config(pinfo, plcdc);
|
||
|
|
} else {
|
||
|
|
ret = dsi_cmd_panel_config(pinfo, plcdc);
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
int32_t panel_name_to_id(struct panel_list supp_panels[],
|
||
|
|
uint32_t supp_panels_size,
|
||
|
|
const char *panel_name)
|
||
|
|
{
|
||
|
|
uint32_t i;
|
||
|
|
int32_t panel_id = ERR_NOT_FOUND;
|
||
|
|
|
||
|
|
if (!panel_name) {
|
||
|
|
dprintf(CRITICAL, "Invalid panel name\n");
|
||
|
|
return panel_id;
|
||
|
|
}
|
||
|
|
|
||
|
|
for (i = 0; i < supp_panels_size; i++) {
|
||
|
|
if (!strncmp(panel_name, supp_panels[i].name,
|
||
|
|
MAX_PANEL_ID_LEN)) {
|
||
|
|
panel_id = supp_panels[i].id;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return panel_id;
|
||
|
|
}
|