104 lines
3.4 KiB
Groff
104 lines
3.4 KiB
Groff
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.TH CPUPOWER\-SET "1" "22/02/2011" "" "cpupower Manual"
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.SH NAME
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cpupower\-set \- Set processor power related kernel or hardware configurations
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.SH SYNOPSIS
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.ft B
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.B cpupower set [ \-b VAL ] [ \-s VAL ] [ \-m VAL ]
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.SH DESCRIPTION
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\fBcpupower set \fP sets kernel configurations or directly accesses hardware
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registers affecting processor power saving policies.
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Some options are platform wide, some affect single cores. By default values
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are applied on all cores. How to modify single core configurations is
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described in the cpupower(1) manpage in the \-\-cpu option section. Whether an
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option affects the whole system or can be applied to individual cores is
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described in the Options sections.
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Use \fBcpupower info \fP to read out current settings and whether they are
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supported on the system at all.
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.SH Options
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.PP
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\-\-perf-bias, \-b
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.RS 4
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Sets a register on supported Intel processore which allows software to convey
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its policy for the relative importance of performance versus energy savings to
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the processor.
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The range of valid numbers is 0-15, where 0 is maximum
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performance and 15 is maximum energy efficiency.
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The processor uses this information in model-specific ways
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when it must select trade-offs between performance and
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energy efficiency.
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This policy hint does not supersede Processor Performance states
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(P-states) or CPU Idle power states (C-states), but allows
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software to have influence where it would otherwise be unable
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to express a preference.
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For example, this setting may tell the hardware how
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aggressively or conservatively to control frequency
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in the "turbo range" above the explicitly OS-controlled
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P-state frequency range. It may also tell the hardware
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how aggressively it should enter the OS requested C-states.
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This option can be applied to individual cores only via the \-\-cpu option,
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cpupower(1).
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Setting the performance bias value on one CPU can modify the setting on
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related CPUs as well (for example all CPUs on one socket), because of
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hardware restrictions.
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Use \fBcpupower -c all info -b\fP to verify.
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This options needs the msr kernel driver (CONFIG_X86_MSR) loaded.
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.RE
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.PP
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\-\-sched\-mc, \-m [ VAL ]
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.RE
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\-\-sched\-smt, \-s [ VAL ]
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.RS 4
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\-\-sched\-mc utilizes cores in one processor package/socket first before
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processes are scheduled to other processor packages/sockets.
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\-\-sched\-smt utilizes thread siblings of one processor core first before
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processes are scheduled to other cores.
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The impact on power consumption and performance (positiv or negativ) heavily
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depends on processor support for deep sleep states, frequency scaling and
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frequency boost modes and their dependencies between other thread siblings
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and processor cores.
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Taken over from kernel documentation:
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Adjust the kernel's multi-core scheduler support.
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Possible values are:
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.RS 2
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0 - No power saving load balance (default value)
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1 - Fill one thread/core/package first for long running threads
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2 - Also bias task wakeups to semi-idle cpu package for power
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savings
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.RE
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sched_mc_power_savings is dependent upon SCHED_MC, which is
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itself architecture dependent.
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sched_smt_power_savings is dependent upon SCHED_SMT, which
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is itself architecture dependent.
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The two files are independent of each other. It is possible
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that one file may be present without the other.
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.SH "SEE ALSO"
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cpupower-info(1), cpupower-monitor(1), powertop(1)
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.PP
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.SH AUTHORS
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.nf
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\-\-perf\-bias parts written by Len Brown <len.brown@intel.com>
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Thomas Renninger <trenn@suse.de>
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