594 lines
17 KiB
C
594 lines
17 KiB
C
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <sound/soc.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
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#include "wcd9xxx-common.h"
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#define CLSH_COMPUTE_EAR 0x01
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#define CLSH_COMPUTE_HPH_L 0x02
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#define CLSH_COMPUTE_HPH_R 0x03
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#define BUCK_VREF_2V 0xFF
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#define BUCK_VREF_1P8V 0xE6
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#define NCP_FCLK_LEVEL_8 0x08
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#define NCP_FCLK_LEVEL_5 0x05
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#define BUCK_SETTLE_TIME_US 50
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#define NCP_SETTLE_TIME_US 50
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static inline void wcd9xxx_enable_clsh_block(
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struct snd_soc_codec *codec,
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bool on)
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{
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snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLSH_B1_CTL,
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0x01, on ? 0x01 : 0x00);
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}
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static inline void wcd9xxx_enable_anc_delay(
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struct snd_soc_codec *codec,
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bool on)
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{
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snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLSH_B1_CTL,
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0x02, on ? 0x02 : 0x00);
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}
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static inline void wcd9xxx_enable_ncp(
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struct snd_soc_codec *codec,
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bool on)
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{
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snd_soc_update_bits(codec, WCD9XXX_A_NCP_EN,
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0x01, on ? 0x01 : 0x00);
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}
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static inline void wcd9xxx_enable_buck(
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struct snd_soc_codec *codec,
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bool on)
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{
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snd_soc_update_bits(codec, WCD9XXX_A_BUCK_MODE_1,
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0x80, on ? 0x80 : 0x00);
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}
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static int cdc_lo_count;
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static void (*clsh_state_fp[NUM_CLSH_STATES])
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(struct snd_soc_codec *,
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struct wcd9xxx_clsh_cdc_data *,
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u8 req_state, bool req_type);
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static const char *state_to_str(u8 state)
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{
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if (state == WCD9XXX_CLSH_STATE_IDLE)
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return "STATE_IDLE";
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else if (state == WCD9XXX_CLSH_STATE_EAR)
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return "STATE_EAR";
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else if (state == WCD9XXX_CLSH_STATE_HPHL)
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return "STATE_HPH_L";
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else if (state == WCD9XXX_CLSH_STATE_HPHR)
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return "STATE_HPH_R";
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else if (state == (WCD9XXX_CLSH_STATE_HPHL
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| WCD9XXX_CLSH_STATE_HPHR))
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return "STATE_HPH_L_R";
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else if (state == WCD9XXX_CLSH_STATE_LO)
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return "STATE_LO";
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return "UNKNOWN_STATE";
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}
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static void wcd9xxx_cfg_clsh_buck(
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struct snd_soc_codec *codec)
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{
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int i;
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const struct wcd9xxx_reg_mask_val reg_set[] = {
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{WCD9XXX_A_BUCK_CTRL_CCL_4, 0x0B, 0x00},
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{WCD9XXX_A_BUCK_CTRL_CCL_1, 0xF0, 0x50},
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{WCD9XXX_A_BUCK_CTRL_CCL_3, 0x03, 0x00},
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{WCD9XXX_A_BUCK_CTRL_CCL_3, 0x0B, 0x00},
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};
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for (i = 0; i < ARRAY_SIZE(reg_set); i++)
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snd_soc_update_bits(codec, reg_set[i].reg, reg_set[i].mask,
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reg_set[i].val);
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dev_dbg(codec->dev, "%s: Programmed buck parameters", __func__);
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}
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static void wcd9xxx_cfg_clsh_param_common(
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struct snd_soc_codec *codec)
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{
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int i;
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const struct wcd9xxx_reg_mask_val reg_set[] = {
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{WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS, 0x3 << 0, 0},
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{WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS, 0x3 << 2, 1 << 2},
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{WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS, (0x1 << 4), 0},
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{WCD9XXX_A_CDC_CLSH_B2_CTL, (0x3 << 0), 0x01},
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{WCD9XXX_A_CDC_CLSH_B2_CTL, (0x3 << 2), (0x01 << 2)},
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{WCD9XXX_A_CDC_CLSH_B2_CTL, (0xf << 4), (0x03 << 4)},
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{WCD9XXX_A_CDC_CLSH_B3_CTL, (0xf << 4), (0x03 << 4)},
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{WCD9XXX_A_CDC_CLSH_B3_CTL, (0xf << 0), (0x0B)},
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{WCD9XXX_A_CDC_CLSH_B1_CTL, (0x1 << 5), (0x01 << 5)},
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{WCD9XXX_A_CDC_CLSH_B1_CTL, (0x1 << 1), (0x01 << 1)},
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};
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for (i = 0; i < ARRAY_SIZE(reg_set); i++)
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snd_soc_update_bits(codec, reg_set[i].reg, reg_set[i].mask,
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reg_set[i].val);
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dev_dbg(codec->dev, "%s: Programmed class H controller common parameters",
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__func__);
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}
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static void wcd9xxx_chargepump_request(
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struct snd_soc_codec *codec, bool on)
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{
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static int cp_count;
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if (on && (++cp_count == 1)) {
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snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLK_OTHR_CTL,
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0x01, 0x01);
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dev_dbg(codec->dev, "%s: Charge Pump enabled, count = %d\n",
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__func__, cp_count);
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}
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else if (!on) {
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if (--cp_count < 0) {
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dev_dbg(codec->dev, "%s: Unbalanced disable for charge pump\n",
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__func__);
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if (snd_soc_read(codec, WCD9XXX_A_CDC_CLK_OTHR_CTL)
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& 0x01) {
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dev_dbg(codec->dev, "%s: Actual chargepump is ON\n",
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__func__);
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}
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cp_count = 0;
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WARN_ON(1);
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}
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if (cp_count == 0) {
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snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLK_OTHR_CTL,
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0x01, 0x00);
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dev_dbg(codec->dev, "%s: Charge pump disabled, count = %d\n",
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__func__, cp_count);
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}
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}
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}
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static void wcd9xxx_clsh_comp_req(struct snd_soc_codec *codec,
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struct wcd9xxx_clsh_cdc_data *clsh_d,
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int compute_pa, bool on)
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{
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u8 shift;
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if (compute_pa == CLSH_COMPUTE_EAR) {
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snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLSH_B1_CTL, 0x10,
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(on ? 0x10 : 0));
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} else {
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if (compute_pa == CLSH_COMPUTE_HPH_L) {
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shift = 3;
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} else if (compute_pa == CLSH_COMPUTE_HPH_R) {
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shift = 2;
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} else {
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dev_dbg(codec->dev,
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"%s: classh computation request is incorrect\n",
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__func__);
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return;
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}
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if (on)
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wcd9xxx_resmgr_add_cond_update_bits(clsh_d->resmgr,
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WCD9XXX_COND_HPH,
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WCD9XXX_A_CDC_CLSH_B1_CTL,
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shift, false);
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else
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wcd9xxx_resmgr_rm_cond_update_bits(clsh_d->resmgr,
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WCD9XXX_COND_HPH,
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WCD9XXX_A_CDC_CLSH_B1_CTL,
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shift, false);
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}
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}
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static void wcd9xxx_enable_buck_mode(struct snd_soc_codec *codec,
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u8 buck_vref)
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{
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int i;
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const struct wcd9xxx_reg_mask_val reg_set[] = {
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{WCD9XXX_A_BUCK_MODE_5, 0x02, 0x03},
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{WCD9XXX_A_BUCK_MODE_4, 0xFF, buck_vref},
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{WCD9XXX_A_BUCK_MODE_1, 0x04, 0x04},
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{WCD9XXX_A_BUCK_MODE_1, 0x08, 0x00},
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{WCD9XXX_A_BUCK_MODE_3, 0x04, 0x00},
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{WCD9XXX_A_BUCK_MODE_3, 0x08, 0x00},
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{WCD9XXX_A_BUCK_MODE_1, 0x80, 0x80},
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};
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for (i = 0; i < ARRAY_SIZE(reg_set); i++)
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snd_soc_update_bits(codec, reg_set[i].reg,
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reg_set[i].mask, reg_set[i].val);
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dev_dbg(codec->dev, "%s: Done\n", __func__);
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usleep_range(BUCK_SETTLE_TIME_US, BUCK_SETTLE_TIME_US);
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}
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static void wcd9xxx_clsh_enable_post_pa(struct snd_soc_codec *codec)
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{
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int i;
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const struct wcd9xxx_reg_mask_val reg_set[] = {
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{WCD9XXX_A_BUCK_MODE_5, 0x02, 0x00},
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{WCD9XXX_A_NCP_STATIC, 0x20, 0x00},
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{WCD9XXX_A_BUCK_MODE_3, 0x04, 0x04},
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{WCD9XXX_A_BUCK_MODE_3, 0x08, 0x08},
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};
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for (i = 0; i < ARRAY_SIZE(reg_set); i++)
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snd_soc_update_bits(codec, reg_set[i].reg,
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reg_set[i].mask, reg_set[i].val);
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dev_dbg(codec->dev, "%s: completed clsh mode settings after PA enable\n",
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__func__);
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}
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static void wcd9xxx_set_fclk_enable_ncp(struct snd_soc_codec *codec,
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u8 fclk_level)
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{
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int i;
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const struct wcd9xxx_reg_mask_val reg_set[] = {
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{WCD9XXX_A_NCP_STATIC, 0x20, 0x20},
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{WCD9XXX_A_NCP_EN, 0x01, 0x01},
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};
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snd_soc_update_bits(codec, WCD9XXX_A_NCP_STATIC,
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0x010, 0x00);
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snd_soc_update_bits(codec, WCD9XXX_A_NCP_STATIC,
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0x0F, fclk_level);
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for (i = 0; i < ARRAY_SIZE(reg_set); i++)
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snd_soc_update_bits(codec, reg_set[i].reg,
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reg_set[i].mask, reg_set[i].val);
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usleep_range(NCP_SETTLE_TIME_US, NCP_SETTLE_TIME_US);
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dev_dbg(codec->dev, "%s: set ncp done\n", __func__);
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}
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static void wcd9xxx_cfg_clsh_param_ear(struct snd_soc_codec *codec)
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{
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int i;
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const struct wcd9xxx_reg_mask_val reg_set[] = {
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{WCD9XXX_A_CDC_CLSH_B1_CTL, (0x1 << 7), 0},
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{WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR, (0x3f << 0), 0x0D},
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{WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR, (0x3f << 0), 0x3A},
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/* Under assumption that EAR load is 10.7ohm */
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{WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD, (0x3f << 0), 0x26},
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{WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD, (0x3f << 0), 0x2C},
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{WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L, 0xff, 0xA9},
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{WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U, 0xff, 0x07},
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{WCD9XXX_A_CDC_CLSH_K_ADDR, (0x1 << 7), 0},
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{WCD9XXX_A_CDC_CLSH_K_ADDR, (0xf << 0), 0x08},
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{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x1b},
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{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
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{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x2d},
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{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
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{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x36},
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{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
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{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x37},
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{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
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};
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for (i = 0; i < ARRAY_SIZE(reg_set); i++)
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snd_soc_update_bits(codec, reg_set[i].reg,
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reg_set[i].mask, reg_set[i].val);
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dev_dbg(codec->dev, "%s: Programmed Class H controller EAR specific params\n",
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__func__);
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}
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static void wcd9xxx_cfg_clsh_param_hph(struct snd_soc_codec *codec)
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{
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int i;
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const struct wcd9xxx_reg_mask_val reg_set[] = {
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{WCD9XXX_A_CDC_CLSH_B1_CTL, (0x1 << 6), 0},
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{WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH, 0x3f, 0x0D},
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{WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH, 0x3f, 0x1D},
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/* Under assumption that HPH load is 16ohm per channel */
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{WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD, 0x3f, 0x13},
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{WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD, 0x1f, 0x19},
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{WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L, 0xff, 0x97},
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{WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U, 0xff, 0x05},
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{WCD9XXX_A_CDC_CLSH_K_ADDR, (0x1 << 7), 0},
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{WCD9XXX_A_CDC_CLSH_K_ADDR, 0x0f, 0},
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{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0xAE},
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{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x01},
|
||
|
|
{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x1C},
|
||
|
|
{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
|
||
|
|
{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x24},
|
||
|
|
{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
|
||
|
|
{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x25},
|
||
|
|
{WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
|
||
|
|
};
|
||
|
|
|
||
|
|
for (i = 0; i < ARRAY_SIZE(reg_set); i++)
|
||
|
|
snd_soc_update_bits(codec, reg_set[i].reg, reg_set[i].mask,
|
||
|
|
reg_set[i].val);
|
||
|
|
dev_dbg(codec->dev, "%s: Programmed Class H controller HPH specific params\n",
|
||
|
|
__func__);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void wcd9xxx_clsh_turnoff_postpa
|
||
|
|
(struct snd_soc_codec *codec)
|
||
|
|
{
|
||
|
|
|
||
|
|
int i;
|
||
|
|
|
||
|
|
const struct wcd9xxx_reg_mask_val reg_set[] = {
|
||
|
|
{WCD9XXX_A_NCP_EN, 0x01, 0x00},
|
||
|
|
{WCD9XXX_A_BUCK_MODE_1, 0x80, 0x00},
|
||
|
|
{WCD9XXX_A_CDC_CLSH_B1_CTL, 0x10, 0x00},
|
||
|
|
};
|
||
|
|
|
||
|
|
wcd9xxx_chargepump_request(codec, false);
|
||
|
|
|
||
|
|
for (i = 0; i < ARRAY_SIZE(reg_set); i++)
|
||
|
|
snd_soc_update_bits(codec, reg_set[i].reg,
|
||
|
|
reg_set[i].mask, reg_set[i].val);
|
||
|
|
|
||
|
|
wcd9xxx_enable_clsh_block(codec, false);
|
||
|
|
|
||
|
|
dev_dbg(codec->dev, "%s: Done\n", __func__);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void wcd9xxx_clsh_state_idle(struct snd_soc_codec *codec,
|
||
|
|
struct wcd9xxx_clsh_cdc_data *clsh_d,
|
||
|
|
u8 req_state, bool is_enable)
|
||
|
|
{
|
||
|
|
if (is_enable) {
|
||
|
|
dev_dbg(codec->dev, "%s: wrong transition, cannot enable IDLE state\n",
|
||
|
|
__func__);
|
||
|
|
} else {
|
||
|
|
if (req_state == WCD9XXX_CLSH_STATE_EAR) {
|
||
|
|
wcd9xxx_clsh_turnoff_postpa(codec);
|
||
|
|
} else if (req_state == WCD9XXX_CLSH_STATE_HPHL) {
|
||
|
|
wcd9xxx_clsh_comp_req(codec, clsh_d, CLSH_COMPUTE_HPH_L,
|
||
|
|
false);
|
||
|
|
wcd9xxx_clsh_turnoff_postpa(codec);
|
||
|
|
} else if (req_state == WCD9XXX_CLSH_STATE_HPHR) {
|
||
|
|
wcd9xxx_clsh_comp_req(codec, clsh_d, CLSH_COMPUTE_HPH_R,
|
||
|
|
false);
|
||
|
|
wcd9xxx_clsh_turnoff_postpa(codec);
|
||
|
|
} else if (req_state == WCD9XXX_CLSH_STATE_LO) {
|
||
|
|
wcd9xxx_enable_ncp(codec, false);
|
||
|
|
wcd9xxx_enable_buck(codec, false);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void wcd9xxx_clsh_state_ear(struct snd_soc_codec *codec,
|
||
|
|
struct wcd9xxx_clsh_cdc_data *clsh_d,
|
||
|
|
u8 req_state, bool is_enable)
|
||
|
|
{
|
||
|
|
if (is_enable) {
|
||
|
|
wcd9xxx_cfg_clsh_buck(codec);
|
||
|
|
wcd9xxx_cfg_clsh_param_common(codec);
|
||
|
|
wcd9xxx_cfg_clsh_param_ear(codec);
|
||
|
|
wcd9xxx_enable_clsh_block(codec, true);
|
||
|
|
wcd9xxx_chargepump_request(codec, true);
|
||
|
|
wcd9xxx_enable_anc_delay(codec, true);
|
||
|
|
wcd9xxx_clsh_comp_req(codec, clsh_d, CLSH_COMPUTE_EAR, true);
|
||
|
|
wcd9xxx_enable_buck_mode(codec, BUCK_VREF_2V);
|
||
|
|
wcd9xxx_set_fclk_enable_ncp(codec, NCP_FCLK_LEVEL_8);
|
||
|
|
|
||
|
|
dev_dbg(codec->dev, "%s: Enabled ear mode class h\n", __func__);
|
||
|
|
} else {
|
||
|
|
dev_dbg(codec->dev, "%s: stub fallback to ear\n", __func__);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void wcd9xxx_clsh_state_hph_l(struct snd_soc_codec *codec,
|
||
|
|
struct wcd9xxx_clsh_cdc_data *clsh_d,
|
||
|
|
u8 req_state, bool is_enable)
|
||
|
|
{
|
||
|
|
if (is_enable) {
|
||
|
|
wcd9xxx_cfg_clsh_buck(codec);
|
||
|
|
wcd9xxx_cfg_clsh_param_common(codec);
|
||
|
|
wcd9xxx_cfg_clsh_param_hph(codec);
|
||
|
|
wcd9xxx_enable_clsh_block(codec, true);
|
||
|
|
wcd9xxx_chargepump_request(codec, true);
|
||
|
|
wcd9xxx_enable_anc_delay(codec, true);
|
||
|
|
wcd9xxx_clsh_comp_req(codec, clsh_d, CLSH_COMPUTE_HPH_L, true);
|
||
|
|
wcd9xxx_enable_buck_mode(codec, BUCK_VREF_2V);
|
||
|
|
wcd9xxx_set_fclk_enable_ncp(codec, NCP_FCLK_LEVEL_8);
|
||
|
|
|
||
|
|
dev_dbg(codec->dev, "%s: Done\n", __func__);
|
||
|
|
} else {
|
||
|
|
if (req_state == WCD9XXX_CLSH_STATE_HPHR) {
|
||
|
|
wcd9xxx_clsh_comp_req(codec, clsh_d, CLSH_COMPUTE_HPH_R,
|
||
|
|
false);
|
||
|
|
} else {
|
||
|
|
dev_dbg(codec->dev, "%s: stub fallback to hph_l\n",
|
||
|
|
__func__);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void wcd9xxx_clsh_state_hph_r(struct snd_soc_codec *codec,
|
||
|
|
struct wcd9xxx_clsh_cdc_data *clsh_d,
|
||
|
|
u8 req_state, bool is_enable)
|
||
|
|
{
|
||
|
|
if (is_enable) {
|
||
|
|
|
||
|
|
wcd9xxx_cfg_clsh_buck(codec);
|
||
|
|
wcd9xxx_cfg_clsh_param_common(codec);
|
||
|
|
wcd9xxx_cfg_clsh_param_hph(codec);
|
||
|
|
wcd9xxx_enable_clsh_block(codec, true);
|
||
|
|
wcd9xxx_chargepump_request(codec, true);
|
||
|
|
wcd9xxx_enable_anc_delay(codec, true);
|
||
|
|
wcd9xxx_clsh_comp_req(codec, clsh_d, CLSH_COMPUTE_HPH_R, true);
|
||
|
|
wcd9xxx_enable_buck_mode(codec, BUCK_VREF_2V);
|
||
|
|
wcd9xxx_set_fclk_enable_ncp(codec, NCP_FCLK_LEVEL_8);
|
||
|
|
|
||
|
|
dev_dbg(codec->dev, "%s: Done\n", __func__);
|
||
|
|
} else {
|
||
|
|
if (req_state == WCD9XXX_CLSH_STATE_HPHL) {
|
||
|
|
wcd9xxx_clsh_comp_req(codec, clsh_d, CLSH_COMPUTE_HPH_L,
|
||
|
|
false);
|
||
|
|
} else {
|
||
|
|
dev_dbg(codec->dev, "%s: stub fallback to hph_r\n",
|
||
|
|
__func__);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void wcd9xxx_clsh_state_hph_st(struct snd_soc_codec *codec,
|
||
|
|
struct wcd9xxx_clsh_cdc_data *clsh_d,
|
||
|
|
u8 req_state, bool is_enable)
|
||
|
|
{
|
||
|
|
if (is_enable) {
|
||
|
|
wcd9xxx_clsh_comp_req(codec, clsh_d, CLSH_COMPUTE_HPH_L, true);
|
||
|
|
wcd9xxx_clsh_comp_req(codec, clsh_d, CLSH_COMPUTE_HPH_R, true);
|
||
|
|
} else {
|
||
|
|
dev_dbg(codec->dev, "%s: stub fallback to hph_st\n", __func__);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void wcd9xxx_clsh_state_lo(struct snd_soc_codec *codec,
|
||
|
|
struct wcd9xxx_clsh_cdc_data *clsh_d,
|
||
|
|
u8 req_state, bool is_enable)
|
||
|
|
{
|
||
|
|
if (is_enable) {
|
||
|
|
if (++cdc_lo_count > 1)
|
||
|
|
return;
|
||
|
|
|
||
|
|
wcd9xxx_enable_buck_mode(codec, BUCK_VREF_1P8V);
|
||
|
|
wcd9xxx_set_fclk_enable_ncp(codec, NCP_FCLK_LEVEL_5);
|
||
|
|
|
||
|
|
if (clsh_d->buck_mv == WCD9XXX_CDC_BUCK_MV_1P8) {
|
||
|
|
wcd9xxx_enable_buck(codec, false);
|
||
|
|
snd_soc_update_bits(codec, WCD9XXX_A_NCP_STATIC,
|
||
|
|
0x20, 0x01);
|
||
|
|
wcd9xxx_enable_ncp(codec, true);
|
||
|
|
msleep(NCP_SETTLE_TIME_US);
|
||
|
|
|
||
|
|
} else {
|
||
|
|
snd_soc_update_bits(codec, WCD9XXX_A_NCP_EN,
|
||
|
|
0x40, 0x00);
|
||
|
|
wcd9xxx_enable_ncp(codec, true);
|
||
|
|
msleep(NCP_SETTLE_TIME_US);
|
||
|
|
snd_soc_update_bits(codec, WCD9XXX_A_BUCK_MODE_5,
|
||
|
|
0x01, 0x01);
|
||
|
|
snd_soc_update_bits(codec, WCD9XXX_A_BUCK_MODE_5,
|
||
|
|
0xFB, (0x02 << 2));
|
||
|
|
}
|
||
|
|
snd_soc_update_bits(codec, WCD9XXX_A_BUCK_MODE_1,
|
||
|
|
0x04, 0x00);
|
||
|
|
} else {
|
||
|
|
dev_dbg(codec->dev, "%s: stub fallback to lineout\n", __func__);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void wcd9xxx_clsh_state_err(struct snd_soc_codec *codec,
|
||
|
|
struct wcd9xxx_clsh_cdc_data *clsh_d,
|
||
|
|
u8 req_state, bool is_enable)
|
||
|
|
{
|
||
|
|
dev_dbg(codec->dev, "%s Wrong request for class H state machine requested to %s %s"
|
||
|
|
, __func__, is_enable ? "enable" : "disable",
|
||
|
|
state_to_str(req_state));
|
||
|
|
WARN_ON(1);
|
||
|
|
}
|
||
|
|
|
||
|
|
void wcd9xxx_clsh_fsm(struct snd_soc_codec *codec,
|
||
|
|
struct wcd9xxx_clsh_cdc_data *cdc_clsh_d,
|
||
|
|
u8 req_state, bool req_type, u8 clsh_event)
|
||
|
|
{
|
||
|
|
u8 old_state, new_state;
|
||
|
|
|
||
|
|
switch (clsh_event) {
|
||
|
|
|
||
|
|
case WCD9XXX_CLSH_EVENT_PRE_DAC:
|
||
|
|
|
||
|
|
/* PRE_DAC event should be used only for Enable */
|
||
|
|
BUG_ON(req_type != WCD9XXX_CLSH_REQ_ENABLE);
|
||
|
|
|
||
|
|
old_state = cdc_clsh_d->state;
|
||
|
|
new_state = old_state | req_state;
|
||
|
|
|
||
|
|
(*clsh_state_fp[new_state]) (codec, cdc_clsh_d,
|
||
|
|
req_state, req_type);
|
||
|
|
cdc_clsh_d->state = new_state;
|
||
|
|
dev_dbg(codec->dev, "%s: ClassH state transition from %s to %s\n",
|
||
|
|
__func__, state_to_str(old_state),
|
||
|
|
state_to_str(cdc_clsh_d->state));
|
||
|
|
|
||
|
|
break;
|
||
|
|
|
||
|
|
case WCD9XXX_CLSH_EVENT_POST_PA:
|
||
|
|
|
||
|
|
if (req_type == WCD9XXX_CLSH_REQ_DISABLE) {
|
||
|
|
if (req_state == WCD9XXX_CLSH_STATE_LO
|
||
|
|
&& --cdc_lo_count > 0)
|
||
|
|
break;
|
||
|
|
|
||
|
|
old_state = cdc_clsh_d->state;
|
||
|
|
new_state = old_state & (~req_state);
|
||
|
|
|
||
|
|
if (new_state < NUM_CLSH_STATES) {
|
||
|
|
(*clsh_state_fp[new_state]) (codec, cdc_clsh_d,
|
||
|
|
req_state, req_type);
|
||
|
|
cdc_clsh_d->state = new_state;
|
||
|
|
dev_dbg(codec->dev, "%s: ClassH state transition from %s to %s\n",
|
||
|
|
__func__, state_to_str(old_state),
|
||
|
|
state_to_str(cdc_clsh_d->state));
|
||
|
|
|
||
|
|
} else {
|
||
|
|
dev_dbg(codec->dev, "%s: wrong new state = %x\n",
|
||
|
|
__func__, new_state);
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
} else if (req_state != WCD9XXX_CLSH_STATE_LO) {
|
||
|
|
wcd9xxx_clsh_enable_post_pa(codec);
|
||
|
|
}
|
||
|
|
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(wcd9xxx_clsh_fsm);
|
||
|
|
|
||
|
|
void wcd9xxx_clsh_init(struct wcd9xxx_clsh_cdc_data *clsh,
|
||
|
|
struct wcd9xxx_resmgr *resmgr)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
clsh->state = WCD9XXX_CLSH_STATE_IDLE;
|
||
|
|
clsh->resmgr = resmgr;
|
||
|
|
|
||
|
|
for (i = 0; i < NUM_CLSH_STATES; i++)
|
||
|
|
clsh_state_fp[i] = wcd9xxx_clsh_state_err;
|
||
|
|
|
||
|
|
clsh_state_fp[WCD9XXX_CLSH_STATE_IDLE] = wcd9xxx_clsh_state_idle;
|
||
|
|
clsh_state_fp[WCD9XXX_CLSH_STATE_EAR] = wcd9xxx_clsh_state_ear;
|
||
|
|
clsh_state_fp[WCD9XXX_CLSH_STATE_HPHL] =
|
||
|
|
wcd9xxx_clsh_state_hph_l;
|
||
|
|
clsh_state_fp[WCD9XXX_CLSH_STATE_HPHR] =
|
||
|
|
wcd9xxx_clsh_state_hph_r;
|
||
|
|
clsh_state_fp[WCD9XXX_CLSH_STATE_HPH_ST] =
|
||
|
|
wcd9xxx_clsh_state_hph_st;
|
||
|
|
clsh_state_fp[WCD9XXX_CLSH_STATE_LO] = wcd9xxx_clsh_state_lo;
|
||
|
|
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(wcd9xxx_clsh_init);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("WCD9XXX Common");
|
||
|
|
MODULE_LICENSE("GPL v2");
|