109 lines
3.2 KiB
C
109 lines
3.2 KiB
C
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/* Copyright (c) 2011, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "msm_fb.h"
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#include "mipi_dsi.h"
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#include "mipi_truly.h"
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static struct msm_panel_info pinfo;
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static struct mipi_dsi_phy_ctrl dsi_video_mode_phy_db = {
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/* DSI Bit Clock at 500 MHz, 2 lane, RGB888 */
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/* regulator */
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{0x03, 0x01, 0x01, 0x00},
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/* timing */
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{0xb9, 0x8e, 0x1f, 0x00, 0x98, 0x9c, 0x22, 0x90,
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0x18, 0x03, 0x04},
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/* phy ctrl */
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{0x7f, 0x00, 0x00, 0x00},
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/* strength */
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{0xbb, 0x02, 0x06, 0x00},
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/* pll control */
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{0x00, 0xec, 0x31, 0xd2, 0x00, 0x40, 0x37, 0x62,
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0x01, 0x0f, 0x07,
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0x05, 0x14, 0x03, 0x0, 0x0, 0x0, 0x20, 0x0, 0x02, 0x0},
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};
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static int __init mipi_video_truly_wvga_pt_init(void)
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{
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int ret;
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if (msm_fb_detect_client("mipi_video_truly_wvga"))
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return 0;
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pinfo.xres = 480;
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pinfo.yres = 800;
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pinfo.type = MIPI_VIDEO_PANEL;
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pinfo.pdest = DISPLAY_1;
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pinfo.wait_cycle = 0;
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pinfo.bpp = 24;
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pinfo.lcdc.h_back_porch = 100;
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pinfo.lcdc.h_front_porch = 100;
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pinfo.lcdc.h_pulse_width = 8;
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pinfo.lcdc.v_back_porch = 20;
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pinfo.lcdc.v_front_porch = 20;
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pinfo.lcdc.v_pulse_width = 1;
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pinfo.lcdc.border_clr = 0; /* blk */
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pinfo.lcdc.underflow_clr = 0xff; /* blue */
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/* number of dot_clk cycles HSYNC active edge
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is delayed from VSYNC active edge */
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pinfo.lcdc.hsync_skew = 0;
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pinfo.clk_rate = 499000000;
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pinfo.bl_max = 15;
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pinfo.bl_min = 1;
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pinfo.fb_num = 2;
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pinfo.mipi.mode = DSI_VIDEO_MODE;
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pinfo.mipi.pulse_mode_hsa_he = TRUE; /* send HSA and HE following
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VS/VE packet */
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pinfo.mipi.hfp_power_stop = TRUE; /* LP-11 during the HFP period */
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pinfo.mipi.hbp_power_stop = TRUE; /* LP-11 during the HBP period */
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pinfo.mipi.hsa_power_stop = TRUE; /* LP-11 during the HSA period */
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/* LP-11 or let Command Mode Engine send packets in
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HS or LP mode for the BLLP of the last line of a frame */
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pinfo.mipi.eof_bllp_power_stop = TRUE;
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/* LP-11 or let Command Mode Engine send packets in
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HS or LP mode for packets sent during BLLP period */
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pinfo.mipi.bllp_power_stop = TRUE;
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pinfo.mipi.traffic_mode = DSI_BURST_MODE;
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pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
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pinfo.mipi.vc = 0;
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pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB; /* RGB */
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pinfo.mipi.data_lane0 = TRUE;
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pinfo.mipi.data_lane1 = TRUE;
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pinfo.mipi.t_clk_post = 0x20;
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pinfo.mipi.t_clk_pre = 0x2f;
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pinfo.mipi.stream = 0; /* dma_p */
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pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
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pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
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pinfo.mipi.frame_rate = 60; /* FIXME */
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pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
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pinfo.mipi.dlane_swap = 0x01;
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pinfo.mipi.tx_eot_append = 0x01; /* append EOT at the end
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of data burst */
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ret = mipi_truly_device_register(&pinfo, MIPI_DSI_PRIM,
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MIPI_DSI_PANEL_WVGA_PT);
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if (ret)
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pr_err("%s: failed to register device!\n", __func__);
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return ret;
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}
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module_init(mipi_video_truly_wvga_pt_init);
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