214 lines
5.3 KiB
C
214 lines
5.3 KiB
C
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/* Copyright (c) 2010, 2012 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/time.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/hrtimer.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/semaphore.h>
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#include <linux/spinlock.h>
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#include <linux/fb.h>
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#include <asm/system.h>
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#include <asm/mach-types.h>
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#include <mach/hardware.h>
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#include "mdp.h"
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#include "msm_fb.h"
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#include "mdp4.h"
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static struct mdp4_overlay_pipe *atv_pipe;
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int mdp4_atv_on(struct platform_device *pdev)
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{
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uint8 *buf;
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unsigned int buf_offset;
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int bpp, ptype;
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struct fb_info *fbi;
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struct fb_var_screeninfo *var;
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struct msm_fb_data_type *mfd;
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struct mdp4_overlay_pipe *pipe;
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int ret;
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mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
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if (!mfd)
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return -ENODEV;
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if (mfd->key != MFD_KEY)
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return -EINVAL;
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fbi = mfd->fbi;
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var = &fbi->var;
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bpp = fbi->var.bits_per_pixel / 8;
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buf = (uint8 *) fbi->fix.smem_start;
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buf_offset = calc_fb_offset(mfd, fbi, bpp);
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if (atv_pipe == NULL) {
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ptype = mdp4_overlay_format2type(mfd->fb_imgType);
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pipe = mdp4_overlay_pipe_alloc(ptype, MDP4_MIXER1);
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if (pipe == NULL)
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return -EBUSY;
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pipe->pipe_used++;
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pipe->mixer_stage = MDP4_MIXER_STAGE_BASE;
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pipe->mixer_num = MDP4_MIXER1;
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pipe->src_format = mfd->fb_imgType;
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mdp4_overlay_panel_mode(pipe->mixer_num, MDP4_PANEL_ATV);
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mdp4_overlay_format2pipe(pipe);
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atv_pipe = pipe; /* keep it */
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} else {
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pipe = atv_pipe;
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}
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printk(KERN_INFO "mdp4_atv_overlay: pipe=%x ndx=%d\n",
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(int)pipe, pipe->pipe_ndx);
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/* MDP cmd block enable */
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mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
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/* Turn the next panel on, get correct resolution
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before configuring overlay pipe */
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ret = panel_next_on(pdev);
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pr_info("%s: fbi->var.yres: %d | fbi->var.xres: %d",
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__func__, fbi->var.yres, fbi->var.xres);
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/* MDP4 Config */
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pipe->src_height = fbi->var.yres;
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pipe->src_width = fbi->var.xres;
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pipe->src_h = fbi->var.yres;
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pipe->src_w = fbi->var.xres;
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pipe->src_y = 0;
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pipe->src_x = 0;
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if (mfd->map_buffer) {
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pipe->srcp0_addr = (unsigned int)mfd->map_buffer->iova[0] + \
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buf_offset;
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pr_debug("start 0x%lx srcp0_addr 0x%x\n", mfd->
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map_buffer->iova[0], pipe->srcp0_addr);
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} else {
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pipe->srcp0_addr = (uint32)(buf + buf_offset);
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}
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pipe->srcp0_ystride = fbi->fix.line_length;
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mdp4_overlay_dmae_xy(pipe); /* dma_e */
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mdp4_overlay_dmae_cfg(mfd, 1);
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mdp4_overlay_rgb_setup(pipe);
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mdp4_overlayproc_cfg(pipe);
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mdp4_overlay_reg_flush(pipe, 1);
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mdp4_mixer_stage_up(pipe, 0);
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mdp4_mixer_stage_commit(pipe->mixer_num);
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if (ret == 0)
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mdp_pipe_ctrl(MDP_OVERLAY1_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
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/* MDP cmd block disable */
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mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
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return ret;
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}
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int mdp4_atv_off(struct platform_device *pdev)
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{
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int ret = 0;
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mdp_pipe_ctrl(MDP_OVERLAY1_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
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ret = panel_next_off(pdev);
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/* delay to make sure the last frame finishes */
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msleep(100);
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/* dis-engage rgb2 from mixer1 */
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if (atv_pipe) {
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mdp4_mixer_stage_down(atv_pipe, 1);
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mdp4_iommu_unmap(atv_pipe);
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}
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return ret;
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}
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/*
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* mdp4_overlay1_done_atv: called from isr
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*/
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void mdp4_overlay1_done_atv()
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{
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complete(&atv_pipe->comp);
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}
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void mdp4_atv_overlay(struct msm_fb_data_type *mfd)
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{
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struct fb_info *fbi = mfd->fbi;
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uint8 *buf;
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unsigned int buf_offset;
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int bpp;
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unsigned long flag;
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struct mdp4_overlay_pipe *pipe;
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if (!mfd->panel_power_on)
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return;
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/* no need to power on cmd block since it's lcdc mode */
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bpp = fbi->var.bits_per_pixel / 8;
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buf = (uint8 *) fbi->fix.smem_start;
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buf_offset = calc_fb_offset(mfd, fbi, bpp);
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mutex_lock(&mfd->dma->ov_mutex);
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pipe = atv_pipe;
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if (mfd->map_buffer) {
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pipe->srcp0_addr = (unsigned int)mfd->map_buffer->iova[0] + \
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buf_offset;
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pr_debug("start 0x%lx srcp0_addr 0x%x\n", mfd->
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map_buffer->iova[0], pipe->srcp0_addr);
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} else {
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pipe->srcp0_addr = (uint32)(buf + buf_offset);
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}
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mdp_update_pm(mfd, vsync_ctrl_db[0].vsync_time);
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mdp4_overlay_mdp_perf_req(pipe, mfd);
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mdp4_overlay_mdp_perf_upd(mfd, 1);
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mdp4_overlay_rgb_setup(pipe);
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mdp4_overlay_reg_flush(pipe, 0);
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mdp4_mixer_stage_up(pipe, 0);
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mdp4_mixer_stage_commit(pipe->mixer_num);
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printk(KERN_INFO "mdp4_atv_overlay: pipe=%x ndx=%d\n",
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(int)pipe, pipe->pipe_ndx);
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/* enable irq */
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spin_lock_irqsave(&mdp_spin_lock, flag);
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mdp_enable_irq(MDP_OVERLAY1_TERM);
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INIT_COMPLETION(atv_pipe->comp);
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mfd->dma->waiting = TRUE;
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outp32(MDP_INTR_CLEAR, INTR_OVERLAY1_DONE);
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mdp_intr_mask |= INTR_OVERLAY1_DONE;
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outp32(MDP_INTR_ENABLE, mdp_intr_mask);
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spin_unlock_irqrestore(&mdp_spin_lock, flag);
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wait_for_completion_killable(&atv_pipe->comp);
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mdp_disable_irq(MDP_OVERLAY1_TERM);
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mdp4_overlay_mdp_perf_upd(mfd, 0);
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mdp4_stat.kickoff_atv++;
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mutex_unlock(&mfd->dma->ov_mutex);
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}
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